CA1079363A

CA1079363A - High frequency voltage source for induction heating apparatus

Info

Publication number: CA1079363A
Application number: CA257,501A
Authority: CA
Inventors: Donald F. Partridge
Original assignee: PPS MANUFACTURING
Current assignee: PPS MANUFACTURING
Priority date: 1975-08-21
Filing date: 1976-07-21
Publication date: 1980-06-10
Also published as: GB1564626A

Abstract

ABSTRACT

A circuit providing a voltage source in the frequency range of between 10 KHz and 200 KHz which is particularly applicable but not limited to use in induction heating apparatus. The circuit includes a dc source connected to supply current through an inductor to a load.
Connected in parallel with the load is a capacitor with a switching circuit for reversing the connections of the capacitor relative to the load. By reversing the capacitor connections, power levels supplied to the load from the dc source are controlled directly.

Description

7g3~3 Background of the Inven-tion The present invention relates in general to high frequency inverters that are especially applicable to induc-tion heating because the circuit enables the controlling of power at frequencies in the range of 10 KHz to 200 KHz and higher. Other uses for such circuits involve low frequency radio frequency generation and other areas in whlch high power at high frequencies is required including AM, FM, and code generation.
Such apparatus for commutatlng high frequency inverters have been disclosed in U.S. Patent 3,725,768, Brian R. Pelly, Issued April 3, 1973, and U.S. Patent No. 3,328,596, Fritz Germann, Issued June 27, 1967. Similar disclosures have also been made in the following publications:

1. General Electric SCR Manual, Fourth Edition, Page 254.

2. High Frequency, Silicon Controlled Rectifier Sinusoidal Inverter, by R. Thompson, in the Proceedings I.~.E. Vol. 110, No. 4, April 1963.

3. Adding SCR's to Get High Power Means Smaller Transmitters, by G. Brainerd, et al, ELECTRONICS, June 13, 1966.

. Developing True Solid State Static Alternators, by R. Murphy, ELECTRONICS, May 24, 1963.

5. Latest Developments in Static High . Frequency Power Sources for 1: 30 Induction Heating, by B. R. Pelly ~:: in IEEE Transactions on Industrial : Electronics and Control Instru- :
mentation, Vol. IECI-17, Pages ; 297,312, June 1970.
A review of the circuits described in the refer-ences and patents listed heretofore and a study of apparatus used today re~eals that all suffer from one or more of the following problems in attempting to control high frequency power.
:. - 2 -i~' ~ 363 1¦ 1. Where SCRs are used as switching 21 apparatus the reverse voltaye time on the SC~5 31 is limited to a time less than the period of 41 the frequency being generated.
~¦ 2. The frequency of the generated 6 I vol~ages is determined in whole or in part 71 by the characteristics of the load used with 8¦ the circuit.
9¦ 3. The Q of the load has to be controlled, 10¦ that is it must usually be above some value 11¦ which in many instAnces is not practical, 12¦ especially in induction heating appli~ations.
13¦ 4. Frequently at least two SCRs must be 1~¦ fired fox ~ach cycle of generated frequency.
15¦ 5. ~o provision is made for varying the 16 ¦ frequency of the generated voltage inde-17 ¦ pandently of the natural frequency at the 18 ¦ load.
19 ' 6. Where the circuit is used in induction heating applications the load cannot be tuned 21 to a harmonic at the generatad voltages.
2Z 7. No provision is made for controlling 23 independently o the generated frequency the 2~ power to thq load.
~. The dv/dt on the switching SCRs 26 ~ during commutation is high.
27 9. At times other than during commu-28 ;tation the Grltical dv/dt bn the SC~s is high.
2g ~10. The cost o the circuitry used in . ~ previous devices frequently is high especially 31 in those utilizing high ~requency magnetics.
32 / /~ / 3 I ~ , ; I

~ ~7~3~3 1 11. The general control cir~uitry is 2 expensive.
3 The present invention improves on the past circuits

4 in the first instance by allowing a reverse voltage ~ime on the switching devices such as SCRs that is much longer. The 6 circuit is therefore not limited in frequency by the turnoff 7 time of the switching devices used but instead may be used 8 at frequencies much higher. In addition, the frequency o~
the generated voltage can be completely controlled independent of the load and consequently, the Q of the load can be any 11 value. In addition, the firing of the SCRs generates a full 12 cycle of out~ut voltage, that is a full negative and positive 13 voltage - not just a neqative or positive voltage for each 14 one-half of the time period.
Thus by use of the subject circuit the switching 16 losses are decreased, a fact which becomes even more important 17 at higher frequencies. Thus the present invention provides 18 a voltage source system tas opposed to a current source) that is 19 ri_h in even and off harmonics. For this reason an induction heating load can be tuned to a harmonic oP the generated 21 voltage. Thus it is the purpose of the present invention to 22 provi~e a greatly improved circuit having wide application for ;~ 23 controlling power at frequencies up to 200 KH~ or higher.
2~
2~ ~ Summary of the Invention 26 A circuit for supplying a hiyh frequency voltage comprising in co~bination, a DC source, an inductor connected 28 in series with said DC source, a load connected to ~he 29 lnductor, a capacitor, a switchiNg circuit connecting said capacitor dynamically in parallel relationship across ~aid ~ ~ 31 load, said switching circuit being operable to reverse the ; I connections of said capacitor relative to the load periodically ~ 33¦ to qGner-C- an A- .oltaq- ~ o-s the load.

'' ~ '' . ' ; ~' . ' ' ' ~ , ' 7~3~

More pax-ticularly, -there is provided: a hiyh frequency voltage source, comprising in combination, a DC current source; an inductor connectecl to said DC curren-t source; a load connected to receive current from said DC
source through said induetor; a capacitor; a switching cir-cuit connecting said capacitor dynamieally in parallel relationship across said load, said switching circuit being operable to reverse the eonnections of said capaci-tor rela-tive to the load periodically to generate an AC voltage across the load; and control means to regulate the voltage exeursions on the eapaeitor thereby to regulate the power delivered to the load.
There is also provided: a eireuit Eor eontrol-ling power from a de souree, eomprising in eombination:
a load; a eapaeitor eonneeted to reeeive eurrent from the de souree; a switehing eireuit eonneeting only said eapaeitor dynamieally in parallel relationship aeross said load, said switehing eireuit being operable to re-verse the polarity of the voltage of said eapaeitor relative to the load periodieally to generate an ae voltage aeross the load as a result of the voltage exeursions aeross the eapaeitor; an induetor eonneeted between the de souree and the eapaeitor; and means to regulate the magnitude of the power delivered from the souree to the load ineluding eontrol means to regulate the magnitude of the voltage exeursions aeross the eapaeitor.

~.

- 4a -i, ~L~7~3~3 Description of the Drawings _ FIG. l is a schematic of one embodiment of the invention;
FIG. lA is ano-ther load configuration suitable for use with the circuit of FIG. l;
FIGS. 2A, 2B, 2C, 2D and 2E are selected waveforms of the circuit of FIG. l;
FIG. 3 is a circuit diagram of a second embodiment of the invention;
FIGS. 4A, 4B and 4C are selected waveforms indica-tive of those available from controls similar to that of FIG. 3;
FIGS. 5, 6 and 7 are circuit diagrams of o-ther embodiments of the invention;
FIG. 8 is a waveform from the circuit of FIG. 7;
and FIG. 9 is a circuit diagram of a further embodiment of the present invention.
Description of the Invention .
To first understand the inventiGn a brief descrip-tion will accompany the waveform of FIG. 2B. This figure shows a typical waveform that is rich in fundamental even and odd harmonics of the frequency fO. For instance the approximate rms component of the fundamental frequency is .45E where E is the peak voltage applied to the load. The approximate r;ms component of the second harmonic (2f ) is one-half (.225E) of the value of the fundamental frequency.
The third harmonic (3fO) is approximately one-third (.15E) of the fundamental frequency and -thus the greater harmonics ; are included in proportionate value.

If the waveform of FIG. 2B is applied across a high Q series tuned LC circuit tuned to a frequency equal to the . .:
frequency~ fO, then thé voltage across the series -tuned load _ 5 _ ~793~3 l and the current through the load appear as shown in FIG. 2B.
Hcwever if the voltage wavefor~ ~f FIG. 2B is applied across a high Q series tuned LC circuit which is tuned to twice the fundamental frequency (2fo) of the voltage, then the current and voltage waveforms of the tuned circuit load will appear as shown in FIG. 2C. With this understanding of the waveforms a description of the first embodiment of the invention follows.
Shown in FIG. 1 is a circuit 10 capable of generating the waveforms shown in FIGs. 2B and 2C. In circuit 10 a variable DC source 12 supplies the power and is connected to one terminal of an inductor 11. Connected to the oth~r end of the inductor for receiving power therethrough, is an .
equivalent series tuned induction heating load represented by :
a ca~acitor 13, an inductor 14 and a resistance 15. The other end of the load is connected to the negative terminal of the DC source through ground. As pointed out beore, while an induction heating load is shown in this example other types of loads will function equally well with the subject circuit. .
For instance in FIG. lA is shown a series-parallel type tuned load which might be representative of another type of induction .
heating load~ ~he load can be a ~imple re3~ 8tor . While there .
would be harmonic currenta in the resi~tor, still the clrcuit would .
unction a~ previously described. Further the load is linear in :
~ature, meaning that the load contain~ no ~witching components such a SCR~ or diodes which function to change the load .
characterlst~c. This is especially true wi~h loads ~imilar to .
: those ~hown in FIGS. 1 and lA ~ince there is a ~apacitor in ~eries .
with ~he load and the AC current must flow in vrder to deliver power to the load and i~ the load includes a capacitor, such ourrene flow would not r~lt.
, .

.
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, - , ~ .
, : . . . ~ .

~793~i3 For regulating the frequency of the voltage supplied to the loads there is connected in parallel with the load a switched low impedance switching circuit including at least one.capacitor 20 in combinatio~ with two sets of series-connected SCRs or switching devices 16, 17, 18 and 19. The SCRs are shown by way of~ example, however such switching devices could also be other types such as thyratron tubes, mercury-arc tubes and the like. The first set of series-connected SCRs are labeled SCR 16 and SCR 17 while the second set is labeled SCR 18 and SCR 19. Connected between the mid-points of the two sets of series-connected SCRs is a ca~acitor 20. Thus :
~, -6a- ~

: ~ '.~: -~ .. ;: .. , . , : . .. ,: . . : . .

~7~63 1 the four SCRs and capacitor can be referred to aq a low 2 impedance switching circuit or a bridge circuit.
3 As the circuit of FIG. 1 is switched, there ~ill be 4 generated the waveforms shown in FIG. 2B if the load is tuned to the basic frequency fO. The output voltage thus is low 6 in impedance and rich in harmonics. Further the frequency of ~ the voltage is independent of the resonant frequency of the 8 load as illustrated by one cycle of operation of this circuit, 9 which cycle is as follows. For purposes of the description of the ope~ation, the following assumptions are made which 11 are not necessarily required but which simplify the explanation.
12 Firstly the current in the inductor 11 is maintained at a 13 constant value by controlling the variable DC source 12. In 14- addi~ion the capacitance of the~capacitor 20 is sufficie~tlt~
large so that the voltage excursion across it during any one 16 cycle of operation of the circuit is small. As a result, the 17 current in the load will be small in comparison to the current 18 in the inductor 11.
19 With the preceding assumptions the waveforms shown in FIGs. 2A, 2B and 2D represent the actual waveforms of the 21 circuit of FIG. 1. In other words the current in the capacitor 22 during any one period will be a square wave of a magnitude I
23 (FIG. 2D) with a small sinusoidal current superimposed or 24 summed with it. On the next cyc~e the curr~nt waveform in the capacitor 20 will be in the same form except opposite in 26 polarity.
27 Thus a full cycle of operation of the circuit 10 28 genexates two full cycles of output voltage. The first cycle 29 of the output voltage is generated when the SCRs 16 and 19 3 are caused to conduct simultaneously~ As a result the 3 terminal X tFIG. 1), the output voltage across the load, will 3 be negative since the capacitor 20 will be charged with the ~ ~ :
., . ~.
~ .
.~: , . . .

3~3 polarities as shown in FIG. 1. The capacitor 20 will charge in a positive direction for generatiny a voltage waveform similar to that shown during the -time Tl to T2 in FIG. 2s.
At the occurrence of the time T2, the SCRs 17 and 18 are caused to conduct.
Illustrated in FIG. 2A is the voltage waveform across the SCR 16 occurring during the various cycles of operation of the circuit. Thus during the time Tl to T2, the voltage is shown as being near zero volts while the SCR
16 is actually conducting. At the time T2 when the SCRs 18 and 19 are caused to conduct the voltage on the aapacitor 20 will be applied across the SCR 16 as shown between the time periods T2 and T3. It should be noted that the time the reverse voltage is impressed across the SCR 16 is equal to one-half the period of the generated frequency. Thus for operation of the circuit at a 10 KHz rate the reverse voltage for the 5CR 16 is in the order of 50 microseconds. This time period is quite long for the operation of a standard high frequency inverter and if the load is tuned to the frequency generated,i.e. fO, then the load power factor is 1 with a turnoff time of 50 microseconds at a 10 KHz rate. Of course the waveforms across the other SCRs are similar to the wave-form across the SCR 16 but at different time intervals.
During the period of time that the SCRs 17 and 18 are in the conducting mode another complete cycle of output voltage is generated. Stated otherwise, with the firing of ; ~ each pair of SCRS, i.e. SCRS 16 and 19 or SCRs 17 and 18, there~is generated a complete cycle of output voltage. Thus i:
the SCRS are Xired in sets of two with the SCRs 17 and 18 and the SCRs ]L6 and 19 being placed in the conducting mode ; at alternate times.

~ - 8 -,~ , ,~;

3~3 To explain -the current flow, during the -time period T] to T2 when -the SCRS 16 and 19 are caused to conduct, -there are actually two sources which supply current which flows through the SCRs 16 and 19 and the capacitor 20. During the first half oE the period Tl to T2, i.e. until TlA [FIG. 2D
(assuming that the load is tuned to the fundamental fre~uency of the inverter)] the current in the SCRs 16 and l9 and the capacitor 20 is greater than the current in the inductor 11.
Thus the first current path starts at ground and passes through the DC source 12, the inductor ll, the SCR 16, the capacitor 20, the SCR 19 and back to ground. The second current is also initiated at ground to thereafter pass through the load resistor 15, the inductor 14, the capacitor 13, the SCR 16, the capacitor 20 and the SCR 19 back to the ground connection. If the inductor 11 is large, then the currents through the first path including the inductor ll will be at substantially a constant magnitude (I). The second current path will be sinusoidal in nature assuming a series resonant load of some reasonable Q value. Thus during the first per-iod Tl to TlA the current will be additive with the current in the inductor ll and during the second time period TlA to T2 the sinusoidal current will subtract from the current passing through the inductor ll.
With the conditions set forth for the preceding description of the invention the current in the capacitor 20 will appear as shown in FIG. 2D (1). As illustrated the Z~ current I is the magnitude of current in the inductor 11 and the mag~itude X represents the peak-to-peak current in the series tuned :Load. Thus for any one complete cycle of opera-; 30 tion of the circuit lO, two complete cycles of the output voltage are generated whereby the output impedance is rela--~- ~ tively low in value and the output frequency can be varied essentially `. :
^, _ g _ ~ ~ .

independent of the load value by alterirly the f iring rate of the switching SCRs.
Under the conditions set forth, there will ~e little power delivered to the load. This results because the current in the inductor 11 was held constant by regulation of the DC source 12 and the capacitance of the capacitor 20 was sufficiently large to limit to a small value the voltage excursion across the capacitor during any one-half cycle of operation for the circuit. One method of increasing the power delivered to the load i~ circuit 10 involves decreasing the size of the capacitor 29 while maintaining the current level substantially constant in the inductor 11. The current is maintained con-~tant by controlling the value of the variable DC source 12. The size of the capacitor 20 can be increased or decreased by the energization of mechanical switches 20Z
or similar switching devices such as SCRs functioning to add capacitance in parallel with the original capacitor. ~ny number of capacitors 20Y can be switched in and out of the circuit as determined by the power range that is to be controlled and the minimum resolution of the power steps that i~ required. A one-3tep change is ~hown in ~IG. 1 by the addition of the capacitor y. Thus with the smaller capacitance in the switching circuit, ~he voltage excursion acros~ the capacitor 20 will be larger, i.e.
tha voltage E in FIG. 2B will be at a ~reater magnitude. A8 a .. ~
result a larger current will flow in the load assuming th2 inductor current is maintained at a constant value. As a result ~he current flowing in the capacitor 20 will appear similar to that shown in F:IG. 2D ~2) wherein the magnitude X ~ill increase and the magnitu~de Y will decrease. Thus as the capacitive .
30 value of the capacitor 20 is dPcreased the peak-t~-peak value of X of the load current will increase and the power ~ t~e !

. . , ' : .

~l~7~363 load will increase as a result. As the peak value of the load increases, the minimum value Y of the current in the capacitor 20 will likewise decrease. For -the area of operation during which the minimum value of current ap-proaches but does not pass through zero, -this area of operation is referred to as "continuous current". As the current through the capacitor 20 increases, the output waveform and the SCR waveform will begin to distort. This distortion is due to the fact that as the capacitor 20 is decreased in size thereby resulting in more power being delivered to the load, the DC source 12 must be increased in value to maintain the current in the inductor ll as a constant value. However since the terminal X is on the opposite side of the inductor 11 from the DC source there must be present a DC offset voltage effectively equal to the DC source 12. This offset voltage is shown in FIG. 2E
(1) for a value near the full continuous current, i.e. the - lOa -, ' ~P793~3 maximum value for the peak--to-peak current X. The waveform shown is -typical of both the output waveform for any one cycle of operation, i.e. the time period from Tl to T2 and the voltage waveform across the SCR 16 during the period that this switching device is in the nonconducting mode. The offset voltage is shown to have a value O' volts in FIG. 2E
(1) however the shape of the waveform will vary depending upon how close the system is operating to full continuous current and also the resonant frequency of the load if an induction heating load is utilized. However the same general form for the voltage will be that shown in FIG. 2E.
Another mode of operating the circuit is called the discontinuous full-current mode shown in FIG. 2D (3).
For this condition the capacitor 20 is reduced in capacitive value sufficiently that a portion of each cycle of the load current is equal to the current in the inductor 11. The typical load voltage wa-veform for discontinuous full current for both the output voltage and the SCR voltage during the nonconductive period is shown in FIG. 2E (2). Note further that as shown in FIG. 2D (3) the value for Y is negative.
There will result similar waveform changes in FIG. 2C as the value of the capacitor 20 is decreased when the load is ~:~ tuned to the second harmonic of the generated voltages.
~ In actual operation the capacitor 20 is usually ;~ maintained at a fixed capacitive value and the voltage of ;~
the DC source 12 is varied to control the level of power supplied to the load. Under some conditions the output : frequency can~also be varied to regulate the power delivered to the load. Also while the,means for turning on or firing .:

~7~3~3 the switching devices or silicon controlled rectifiers is not shown, such circuits are well-known and commonly used in the industry.
Shown in FIG. 3 is a second embodiment of -the invention illustrated as circuit lOA. This circuit is a modification of that shown in FIG. 1 and includes a similar inductor llA, a DC power source 12A with a load including a capacitor 13A, an inductor 14A and a resistor 15A. As before, the assumption is made that the current in the in-ductor llA is maintained constant by regulation o~ the DC
source 12A.
In this circuit there is included a pair of switch-ed low impedance circuits Sl and S2 connected in parallel across the load. The switch Sl includes the bridge circuit comprising the SCRs 16A, 17A, 18A and l9A with the capacitor 20A connected to the common juncture between the SCRs 16A -and 17A and the SCRs 18A and l9A. Similarly the switch S2 comprises the SCRs 21, 22, 23 and 24 connected in bridge con-figuration with the capacitor 25 connected between the common terminals of the two pairs of series-connected SCRS.
The operation of this circuit is similar to that of FIG. 1 except the firing order for the pairs of SCRs of the bridges is consecutive. With each firing of the series-connected SCRs a full output voltage cycle is genera-ted. A
; typical firing order for the SCRs is for the SCRs 16A and l9A to be fired concurrently, followed by SCRs 21 and 24, SCRs 17A and 18A, SCRs 22 and 23~ and once again a repeat of the firing of SCRs 16A and 19A.
: :
~Withl the use of two bridge circuits as low imped-~30 ance switches the pairs of SCRs are caused to conduct at one-half the frequency of the SCRs of the circuit 10 in FIG. 1 for-the . .
,, ~ 12 ~
~ :

~ 93~3 1 same generated frequency. In a~dition the turnoff time for 2 the SCRs in this embodiment is three times that of FIG. 1 for 3 the same generated frequency.
4 The addition of the second bridge does not change substantially the output waveform. That is with each firing 6 of the bridge a full cycle of output voltages generated with 7 the circuit being capable of generating a frequency three 8 times that of the first embodiment with the same turno~f time 9 for the SCRs under similar loading conditions. Under prac~,ical conditions the two-bridge approach can generate as much as 11 four to five times the frequency o~ the circuit 10~
12 To explain one cycle of operation of the circuit lOA
13 the capacitors are initially charged as shown. When the SCRs 14 16A and l9A a~e caused to condu'ct, the ~urrent paths are~
through these SCRs and the capacitor 20A from the DC source 16 12A and the inductor llA. Similarly there is a current path 17 through the load,the SCR 16A, the capacitor 20A and ~he SC~ 19A
18 back to ground. As in the previous embodiment the second 19 current is substantially sinusoidal in nature assuming a series 21 resonant load of some reasonable Q value and the load i5 tuned to the operating frequency. When the voltage across 22 the capacitor 20A has reversed and charged to a voltage equal 23 in magnitude but opposite in polarity to the initial voltage, 24 the SCRs 21 and 24 are caused to conduct. Thus another full cycle of output voltage is generated. The current paths are 26 the same as for the previous firing except the current goes 27 through thesl_ SCRs and the associated capacitor. Following 28 this time period, the SCRs 17A and 18A are caused to conduct, ~9 followed in the next'period SCRs 22 and 23 and finally by a repeat of the firing of the SCRs 16A and l9A.
~1 The output voltage waveform during two plus cycles 32 of operation of the circuit lOA is shown in FIG. 4C. The SCRs ,~- . .
.. , . . , ~ , :

~793~3 that are conducting for each of the four ou-tput cycles are indicated beside the waveEorm. The voltages across a repre-sentative SCR 16A for a two-bridge circuit is shown in FIG, 4A. Note that the recovery time for any SCR in this circuit comprising two bridges is one and one-half time periods in comparison to the circuit of FIG. lOA.
With the addition of a third bridge and maintaining of the output frequency constant the voltage waveform across a representative SCR 16 would be similar tG the solid line waveform shown in FIG. 4B. The output voltage waveform i.s the same as for two brigdes in the circuit, i.e. the waveforrn shown in FIG. 4C. The circuit itself would appear as the circuit shown in FIG. 3 except with the addition of a third low impedance switching circuit S3 similar to the switching circuits Sl and S2. The firing times would be alternated as for the two-bridge circuit with the additional series-connected SCRs being fired at the appropriate times.
A representative voltage across the SCR 16A for a three bridge approach corresponding to the voltage curves previously described for the SCR 16 of the previous embodi-ments appears in FIG. 4B. As can be seen the turnoff time for the SCR or any of the other SCRs is approximately two and one-half time periods. If more turnoff time is required as for lower valued SCRs or if a higher output frequency is : required, then additional bridges can be added to extend the frequency of the basic system. In addition the load (if an : induction heat:ing circuit is the load) can be tuned to a.
harmonic o the fundamental frequency to further extend the range of the basic system. As can be seen in increase in the number of low impendance switching circuits can result ; in the generation of a very high frequency output. Keep in mind that the basic description of the two and three-bridge ~. , : - . . .

~C~75~3~;3 switching systems was based on the assump-tion tha-t the peak-to-peak current in the load is small compared to the constant current in -the inductor ll. As explained before, such a condition can be accomplished by maintaining the capacitance of the capacitors 20A and 25 at a very large value.
The current waveforms in multi-bridge systems just described appear similar to thal of FIG. 2B (l). Flowever the waveforms will distort as the load increases to full current as indicated by the dotted lines superimposed on the waveforms of FIG. 4B. In fact these waveforms may also be distorted somewhat based on whether or not the induction heating load is resonant at the generated frequency. Shown in FIG. ~B in dotted lines is a typical distorted waveform during the first three periods after the firing of the SCR
16A. This waveform indicates a three-bridge circuit and it should be noted that the turnoff time for all the SCRs is still maintained for a time in excess of two periods. The distorted waveforms for the output voltage would again ap-pear similar to that shown in FIG. 2E (1) and FIG. 2E (2) 20 for the circuit 10. However the advantage of the subsequent embodiments described in the higher frequencies generated in the same basic circuit.
From the foregoing it should be noted that there are two aspects of the present invention which provide speci-fic advantages over past controls. The first involves the connection of the load dynamically in parallel with the bridge switching circuit. In the past the load has been connected in series with a bridge switching circuit or in , ~ parallel with the bridge capacitor within the bridge itself ,~ 30 as defined in several of the references listed heretofore.
By the presenl: invention there is required only one firing of the bridge to complete a total ou-tput voltage cycle.

':
~ 15 -: ~ .
;~;, , . : - ~ ',, , - " ., : ' ',', , ' :' .: ' ~7~ ~ 3 1 The second imp~rtant at-tendant advantage to the 2 present invention involves the provi.s.ion for connecting several 3 bridge switching circuits in parallel with the first switching 4 c.ircuit. In this manner the frequency of operation and/or the turnoff time for the switching devices can be extended 6 greatly with little added expense. It is the combination of 7 these advantages along with mzmy others which allows the 8 subject invention to contribute significantly to the high 9 frequency inverter field.
Obviously there are many other embodiments of the 11 present invention which provide equally advantageous results 12 and also provide unique advantages which might be desirable 13 in specific applications. For instance shown in FIG. 5 is 1~ another modification o~ a circ~i.t identified as circuit lOB.
In a similar manner as previously, there i5 provided the 16 same DC source 12B, the inductor llB and a switching circuit 17 similar to those previously utilized which in this case is 18 identified as SlB. The low impedance switching bridge 19 incorporates the SCRs 16B, 17B, 18B and l9B connected in bridge con.iguration with the capacitor 20B connected at the 21 common terminals between the pairs of SCRs~ Thus to this 22 point the circuit lOB is identical to the circuit 10 previously 23 described.
24 . The difference between this circuit and émbodiments previously described.is the connecting point for the resistor 15B.
26 The load is identified hy a capaci~or 13B, an inductor 14B
27 and a resistor 15B as in the previous embodiment~, however 28 the load is connected in parallel with the inductor 11~ Thus 2g the load is still connected dynamically in parallel with the switching circuit because the DC source 12B is considered an 31 ~C short circuit from the standpoint of operation. The currents 32 in the SCRs, the capacitor 20 and the inductor 11 for a tuned 33 load are the sa~e as described for the circuit 10 of FIG. 1.

.
,, . : .
~, . .. :., .. . : . . . .
, - -: . , ~ 3~ 3 1 The basic operating difference between -this circui~ and 2 that previously described is that there is no DC offset voltage 3 across the series tuned induction heating load. This assumption 4 is based upon the premise that the IR drop across the inductor 11

5 is substantially 2ero. Thus there is rendered the specific

6 advantage of allowing an impedance match between the load and

7 the circuit while maintaining DC isolation between the load

8 and the DC source by use of a transformer.

9 A further modification of the present invention i5 illustrated in FIG. 6 in the circuit lOC. Herein the similar 11 components are illustrated as the DC source 12C, the inductor 12 llC and the switching device SlC comprisiny the SCRs 16C, 17C, 13 18C and l9C in bridge configuration with a capacitor 20C
14 connec-ted thereacross. In addi~ion the load is identified as -15 a capacitor 13C, an inductor 14C and a resistor 15C.
16 The operation of this circuit is similar to that of 17 FIG. 5 with the exception that a transformer 26 is interposed 18 between the load and the connections across the inductor llC.
19 The transformer 26 c~mprises a primary winding 2~ and a ~econdary winding 28 with the series tuned load being connected 21 across the terminals of the secondary winding. If the load 22 characteristics remain the same as the load of FIG. 5, the 23 transformer can be a 1;1 transformer. Under these conditions 24 the load current is the same as that for FIG. 1 or FIG. 5 with the same circuit conditions. However if a different load 26 impedance is required, the transformer turns ratio can be 27 altered to deliver the same power. In addition more bridge 28 switching circuits can be added to increase the frequency 29 range or turnoff time for the SCRs of FIG. 5 or FIG. 6.

While not shown, a further modification of that 31 circuit shown in FIG. 6 can incorporate the inductor llC within 32 the transformer unit. This modification can be accomplished : , .. -, . . . : . . :
. .
.. .. ~ , , ~LO~3~;3 by placing a tightly coupled secondaxy winding on -the inductor llC or in effect using the inductor as the primary Eor the transformer.
Another modification of the present invention is il-lustrated in FIG. 7 in the embodiment identified as circuit lOD.
This embodiment once again incorporates the DC source 12D, the inductor llD connected to supply a load voltage to a load re-presented by the capacitor 13D, thLe inductor 14D and the resis-tor 15D. In this embodiment the output voltage waveform is the same as that for previous circuits and -the waveforms across the SCRs are, while still in the same general form as that of FIG.
1, somewhat altered. Shown in FIG. 8 is the waveform for this circuit showing the voltage across one of the switchiny devicesO
The switching circuit SlD comprises a first SCR 29 connected in series with two circuits to form a parallel con-nection across the load. The first circuit includes an SCR 30 and an inductor 36 while the second circuit incorporates a capacitor 33.
In parallel with this first switching circuit is a second switching circuit of similar character utilizing an SCR
31 in series connection with a parallel combination of an SCR
32 and an inductor 35 in parallel with a capacitor 34. The waveform of FIG. 8 shows the voltage across either the SCR 29 or the SCR 31 under lightly loaded conditions described pre-viously.
Assuming the voltage shown in FIG. 8 is that of SCR
29 the following operating conditions are present. From the time Tl to T2 the SCR 39 is turned on. At the time T2 and SCR
31 is fired. ~Following the~firing of the SCR 31, at time T3 the -~ SCR 30 is fired to cause the resonant reversal of the voltage on the capacitor 33~ At the time AlA the SCR 29 is caused to conduct again to repeat the cycle.

~ . . .
~ - 18 -.: - ~. . . : . .: . - .

~>~''33~3 1 The current throu~h the capacitor 33 when the SCR 29 2 is conducting, is the same Eorm as the current through the 3 capacitor 20 of FIG. 1. Howevex one advantage of this circuit 4 is the fact that the two SCRs are not commutated in .series as in the circuit 10 with the attendant disadvantages. It must ~ be recognized however, that under the same load conditions 7 the voltages of the circuit 10D on the SCRs is approximately 8 twice that of the SCRs of FIG. 1.
9 Shown in FIG. 9 is still another embodiment of the present invention which can be referred to as a balanced one-h~lf 11 bridge circult. Once again the circuit utilizes a DC voltage source 12E and the load identified as a capacitor 13E, an 13 inductor 14E and a resistor 15E. In parallel connection across 14 the load is the switching device SlE comprising an SCR 40 and an SCR 41 in series connectionO However instead of an additional 16 pair of SCRs there is utilized a pair of capacitors in series connection identified as the capacitor 42 and the capacitor 43.
18 Once again connected in the bridge is a third capacitor 44 connected between the common terminals between the capacitors and the SCRs of the switching circuit.

22 The inductor while still being coupled is split into two parts with one-half being connected to the negative 23 terminal of the DC source 12E and the other half being 24 connected to the positive terminaL of the DC source.
The primary advantage of this circuit is that only 26 two SCRs are needed for the basic switching function, ho~7ever 27 each SCR must: carry twice the current of the SCRs utilizsd 28 in FIG. 1. l'his condition is assuming that the same load is .
2~ impressed on the circuit.. However by sequentially firing the SCRs substant:ially the s~ne waveforms are obta.ined with the 31 exception that the current passes through the capacitors instead of an~ther pair of SCRs in the s~itching ci.xcuit SlE. Thus '~ ~ . `

..

3~3 it can be seen -tha-t in each of the embodiments of the circuits are shown by way of example and the frequency or the turnoff times for the switching devices can be extended by adding additional switching circuits or low impedance bridge cir-cuits to the basic circuit illustrated. However in each instance the load is connected dynamically in parallel with the switching device serving as a low impedance switching circuit.
Other variations of bridge configurations suitable for use with the present invention are shown in U.S. Patent 3,406,325, John Rosa, Issued October 15, 1968; U.S. Pa-tent 3,460,021, Leland A. Schlabach, Issued August 5, 1969;
U.S. Patent 3,588,667, David L. Duf:E, et al, Issued June 28, 1971; and U.S. Patent 3,431,436, Kenneth G. King, Issued March 4, 1969.

.

:. ~ . :, . ........ . .
`'~' ' '' :' ;,, ,' .: ~

Claims

THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE PRO-PERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:

1. A high frequency voltage source, comprising in combination, a DC current source;
an inductor connected to said DC current source;
a load connected to receive current from said DC
source through said inductor;
a capacitor;
a switching circuit connecting said capacitor dynamically in parallel relationship across said load, said switching circuit being operable to reverse the connections of said capacitor relative to the load periodically to generate an AC voltage across the load; and control means to regulate the voltage excursions on the capacitor thereby to regulate the power delivered to the load.

2. A high frequency voltage source as defined in claim 1 wherein said switching circuit includes a plurality of switching devices connected in a bridge configuration with said capacitor.

3. A high frequency voltage source as defined in claim 2 wherein said switching devices are silicon controlled rectifiers.

4. A high frequency voltage source as defined in claim 1 including a plurality of said switching circuits, and means to operate said switching circuits to connect the capacitors consecutively across the load while reversing the connections of the capacitors alternately.

5. A high frequency voltage source, comprising, in combination, a DC current source;
an inductor connected to said DC current source;
a load connected to receive current from said DC source through said inductor;
a capacitor;
a switching circuit comprising a plurality of switching devices connected in a bridge configuration dynam-ically in parallel with said load, said capacitor being connected to at least one common terminal between said switch-ing devices; and means to operate said switching devices whereby said capacitor is connected in parallel with said load and the connections of said capacitor relative to said load are periodically reversed to generate an AC voltage across said load.

6. A high frequency voltage source as defined in claim 5 wherein said switching devices are silicon controlled rectifiers.

7. A high frequency voltage source as defined in claim 5 wherein said switching circuit comprises four switching devices with pairs of said switching devices being connected in series across said load and said capacitor being connected between the common terminals of said pairs of switching devices; and means to turn on said switching devices to connect said capacitor in parallel across said load and thereafter to reverse the switching devices turned on to connect the capacitor across the load with the terminals reversed.

.

8. A high frequency voltage source as defined in claim 7 wherein said switching devices are silicon control-led rectifiers.

9. A high frequency voltage source as defined in claim 7 including a plurality of switching circuits and said means to turn on said switching devices is operated to connect said capacitors across the load in consecutive order.

10. A high frequency voltage source as defined in claim 5 wherein said load is connected across the terminals of said inductor.

11. A high frequency voltage source as defined in claim 10 including a transformer having primary and secondary windings, and said primary winding is connected across said inductor and said secondary winding is connected across said load.

12. A high frequency voltage source as defined in claim 11 wherein said inductor forms a portion of one of said windings.

13. A circuit for controlling power from a dc source, comprising in combination:
a load;
a capacitor connected to receive current from the dc source;
a switching circuit connecting only said capaci-tor dynamically in parallel relationship across said load, said switching circuit being operable to reverse the polarity of the voltage of said capacitor relative to the load periodically to generate an ac voltage across the load as a result of the voltage excursions across the capacitor;
an inductor connected between the dc source and the capacitor; and means to regulate the magnitude of the power delivered from the source to the load including control means to regulate the magnitude of the voltage excursions across the capacitor.

14. A circuit for controlling power as defined in claim 13 wherein said control means to regulate the magnitude of the voltage excursions across said capacitor includes current control means to regulate the magnitude of current in said inductor.

15. A circuit for controlling power as defined in claim 13 wherein said control means includes frequency control means for regulating the frequency at which the switching circuit operates to reverse the connections of said capacitor relative to the load.

16. A circuit for controlling power as defined in claim 13 wherein said control means includes means to vary the capacitance of the capacitor.--.

17. A circuit for controlling power as defined in claim 13 wherein said switching circuit comprises a four terminal bridge circuit with the dc source connected to two opposing bridge terminals and said capacitor is connected across the other two bridge terminals; and said bridge circuit includes a high frequency switching device connecting each of the terminals

18. A circuit for controlling power as defined in claim 17 wherein said switching circuit includes a plurality of said four terminal bridge circuits each including a capacitor connected therein.

19. A circuit for controlling power as defined in claim 17 wherein said switching devices are silicon controlled rectifiers.

20. A circuit for controlling power as defined in claim 13 wherein said switching circuit includes a resonant reversal circuit connected across the capacitor for reversing the polarity of the capacitor voltage.