CA1103356A - Method of decoding waveforms - Google Patents
Method of decoding waveformsInfo
- Publication number
- CA1103356A CA1103356A CA278,019A CA278019A CA1103356A CA 1103356 A CA1103356 A CA 1103356A CA 278019 A CA278019 A CA 278019A CA 1103356 A CA1103356 A CA 1103356A
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- CA
- Canada
- Prior art keywords
- decoding
- data
- interval
- state
- indication
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
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Classifications
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/14—Digital recording or reproducing using self-clocking codes
- G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
- G11B20/1407—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol
- G11B20/1419—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol to or from biphase level coding, i.e. to or from codes where a one is coded as a transition from a high to a low level during the middle of a bit cell and a zero is encoded as a transition from a low to a high level during the middle of a bit cell or vice versa, e.g. split phase code, Manchester code conversion to or from biphase space or mark coding, i.e. to or from codes where there is a transition at the beginning of every bit cell and a one has no second transition and a zero has a second transition one half of a bit period later or vice versa, e.g. double frequency code, FM code
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
- H04L25/40—Transmitting circuits; Receiving circuits
- H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
- H04L25/4906—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes
- H04L25/4908—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using mBnB codes
- H04L25/491—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using mBnB codes using 1B2B codes
Abstract
A METHOD OF DECODING WAVEFORMS
ABSTRACT
A method for reading or decoding the self clocking encoded data content of digital data bits encoded in the standard F2F
or in phase shift format is described. The method is useful for decoding F2F or phase shift code signals presented in the form of optic, magnetic, or electric signal variations presented to a decoding apparatus for the extraction of data therefrom. The technique utilizes the measurement of the interval of time or distance elapsing between two like polarity signal transitions to determine the data content of that segment of the waveform bounded by the two similar polarity transitions. The data con-tent of that portion of the waveform or signal stream is defined in accordance with a logical matrix of values corresponding to the F2F or phase shift code formats used.
ABSTRACT
A method for reading or decoding the self clocking encoded data content of digital data bits encoded in the standard F2F
or in phase shift format is described. The method is useful for decoding F2F or phase shift code signals presented in the form of optic, magnetic, or electric signal variations presented to a decoding apparatus for the extraction of data therefrom. The technique utilizes the measurement of the interval of time or distance elapsing between two like polarity signal transitions to determine the data content of that segment of the waveform bounded by the two similar polarity transitions. The data con-tent of that portion of the waveform or signal stream is defined in accordance with a logical matrix of values corresponding to the F2F or phase shift code formats used.
Description
-16 FI~LD OF THE INVENTION
This invention relates to self clocking codes and to a code 18 reading technique in general. More specifically it relates to 19 the self clocking codes particularly known as F2F and phase shlft codes and to a method for interpretating such code waveforms.
22 Numerous techniques and devices have previously been de-23 veloped for the purpose of decoding self clocking bar or tran-24 sltion signal codes of the F2F or phase shift type in magnetic, optical and electrical signal forms. The techniques of decoding 26 these waveforms have generally been tailored specifically to the 27 type of system being used.
28 Many of the prior art techniques involve steps of measur-29 ing or detecting specific signals and/or a distance incorpo-rated in the code for deriving clock signals, synchronization .
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3~56 1 information, and dat~. One approach for a specific bar ~ode,
This invention relates to self clocking codes and to a code 18 reading technique in general. More specifically it relates to 19 the self clocking codes particularly known as F2F and phase shlft codes and to a method for interpretating such code waveforms.
22 Numerous techniques and devices have previously been de-23 veloped for the purpose of decoding self clocking bar or tran-24 sltion signal codes of the F2F or phase shift type in magnetic, optical and electrical signal forms. The techniques of decoding 26 these waveforms have generally been tailored specifically to the 27 type of system being used.
28 Many of the prior art techniques involve steps of measur-29 ing or detecting specific signals and/or a distance incorpo-rated in the code for deriving clock signals, synchronization .
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3~56 1 information, and dat~. One approach for a specific bar ~ode,
2 but which could be a general code reading technique, utilizes
3 a leading edge to leading edge and/or trailing edge to t ailing
4 edge measurement for the bars in the code stream and then de-fines data content of the code according to the relative sizes 6 of the measurements as compared ~o a reference distance or 7 measurement contained in each code character. Such a technique 8 may be found in U.S. Patent 3,723,710 for example. Howe~er, 9 this technique requires that a reference distance or space be incorporated in each string of code bits or in each character.
11 Furthermore, all of the spacings in the code stream or in each 12 character must be measured and compared to find out which of 13 the spacings is the reference. Remaining measurements are then 14 compared against the reference to categorize the leading to leading edge distances in terms of the reference and the trail-16 ing to trailing edge distance in terms of the reference so that 17 the code may be decoded.
18 This is a po~erful technique, but it has several undesir-19 able features. First, the entire sequence of code transitions, however long, must be scanned and measured; then the reference 2L spacing or measurement must be isolated from among the group of 22 measurements taken; then the remaining measurements must be 23 categorized in terms of the reference, and finally the data may 24 be decoded in accordance with the relative measurements dis-co~ered. This technique is subJect to accelerative or other 26 types of frequency distortion in the basic signal input so 27 that over a long string of data bits, the relative sizes of the 28 transitions or spacings may become distorted sufficiently that 29 some confusion as to the actual sizes as compared to a reference RA9-75-011 _2_ llQ3;~56 1 or even to the identity of the reference spacing itself may occur. Secondly, the technique requires that all of the spacings must be measured first and processed later. If a transition is inadvertently missed, its absence is not detected until the time that processing occurs. It would be more advantageous to detect errors at the bit level or at the pulse level as soon as they occur or are detected in the signal stream.
Various techniques have been developed for isolating individual pulses in the signal stream presented for decod-ing and the prior art is replete with examples of circuitry and technique for doing this. In general, these techniques involve setting up a search gate at an appropriate time to look for the occurrence of a pulse within the gate which is indicative of the data content of a bit cell. Some such techniques are quite powerful but are limited to the code being decoded. For example, U.S. Patents 3,723,710, 3,708,748, 3,886,521, or U.S. Patents 3,947,662 issued March 30, 1976, 3,969,613 issued July 13, 1976, 3,959,626 issued May 25, 1976 and particularly 3,976,319 issued August 31, 1976 are of interest.
Some of the code reading techniques in the prior art utilize a reference measurement or character or a set of transitions prior to each and every separate string of data bits and a good deal of attention has been focused, as noted by the aforementioned U.S. patents, on techniques for setting up search gates and decoding various types of self clocking code streams.
OBJECTS OF THE INVENTION
In light of the foregoing proliferation of techniques and problems encountered in the field, and of the short-comings in the known prior art, it is an object of this invention to provide ~75011 3 11(~3356 1 an improved, compatible self cloclcing code reading technique 2 for the F2~ and phase shift codes which utili~es the positive 3 to positive or negative to negative signal transition spacings 4 as indicia of t~le code content.
SUMMARY OF THE INVENTION
6 The technique of the present invention comprises steps of 7 detecting a positive going (or negative going) signal in an F2F
8 or phase shift signal stream presented for decoding. This is fol-9 lowed by detecting the next following like polarity signal to that detected in the first step; then the distance between the two 11 like polarity pulses which have been detected is characterized 12 in terms of the natural occurring minimum, intermediate and 13 maximum spacings possible in such a code stream. That is, the 14 transitions may be 1 symbol width apart, 1.5 symbol widths apart, or 2.0 symbol widths apart. Lastly, the data content of that 16 portion of the signal stream bounded by the two like polarity 17 pulses is decoded in accordance with the relative size of the 18 interval detected between said two pulses.
Figure 1 illustrates a representative example of F2F data 21 as it would appear encoded according to the usual convention in 22 which a transition occurring between the lF frequency points is 23 indicative of a data bit 1 and the absence of such a pulse is 24 indicative of a data bit 0. The transition points which are the cell or sy~bol boundaries are indicated by asterisks and the data 26 content of the cells is shown also.
27 Figure 2a illustrates a logical matrix for the interpreta-28 tion convention used to decode the data content as indicated in 29 Line A of Figure 1.
Figure ^b is illustrative of a table vf logical matrix 31 values to be decoded for the interpretation convention used to 32 decode the data content as indicated ln line B of Figure 1.
RA~-75-011 -4-11(~3356 1 Figure 3 illustrates a state diagram for decoding the waveform such as illustrated in Figure 1 (line A) which shows the change of state from a state 1 decode operation to a state 2 decode operation.
Figure 4 illustrates a decoding circuit for decoding the data signals in accordance with the invention.
Figure 5 illustrates an example of a phase shift coded signal.
Figure 6 illustrates a decode convention and state change convention for decoding phase shift two frequency code using the method of the invention.
Figure 7 illustrates an embodiment of a decoding circuit for decoding the data encoded in phase shift format in accordance with Figures 5 and 6.
Figure 8 illustrates another example of a phase shift encoding and decoding technique.
Figure 9 illustrates a decoding state diagram for the decoding techni~ue of Figure 8.
SPECIFICATION
A detailed description of a preferred embodiment of the invention together with examples of its application to F2F or phase shift waveforms will now be given. However, at the outset, reference will be made to the aforementioned U.S. Patent 3,978,319 assigned to the common assignee with the present application. The referenced patent illustrates appropriate demodulator circuitry for providing timing out-puts to isolate pulses occurring in an F2F or similar code stream at spacings identified as 1.0, 1.5~ and 2.0 times the nominal cell or lF transistion to lF transition width. Other devices 1103;356 1 or circuits may be e(lually useful, and it will be assumed at 2 the outset that such circuitr~ is provided and that the code 3 streams will be analyzed by such circuitry and that the present 4 invention will be provided with indications of where the pulses in the code stream are occurring, i.e., whether pulses of like 6 polarity are occurring at 1, 1.5, 2.0 times the normal lF signal 7 transition spacing T, otherwise known as the bit "cell width", 8 "symbol width", etc.
9 The terms "lF", "2F", "cell width", etc. are well known in the art of F2F encoding and decoding techniques and a typical 11 example identifying these terms is illustrated in Figure 1, where 12 F2F data, encoded with the usual convention, is illustrated as a 13 stream of ones and zeros represented as signal transitions occur-14 ring in time with intermediate transitions sometimes occurring at the 2F frequency. It will be observed that the interval be-16 tween like polarity pulses at the leading or at the trailing 17 edge of bars or spaces in the code stream of Figure 1 are spaced 18 apart at intervals T, 1.5T or 2T, these being the only combina-19 tions that can be made using lF and 2F signal transitions in the code stream.
21 Written above the signal stream of Figure 1 are the data 22 contents of the various bit cells. Bit cells are identified in 23 the line above the code stream as a series of evenly spaced seg-2~ ments of the waveform of nominally uniform width T between the symbol or cell boundaries. In the lines below the waveform of 26 Figure 1 are two alternative lines of code contents, identified 27 as lines A and B respectively, which can be decoded according to 28 the present invention according to conventions chosen as will 29 appear later.
11~3~S~;
1 The representative stream of` F2F signals ln Figure has 2 been drawn with small arrows indicating the occurrence o~ pos-3 itive going transitions. It will be assumed that some suitable 4 demodulator circult such as that in the aforementioned U.S. Patent No. 3,~78,319, for example, has been provided 6 and that signals will be received from such a circuit to indicate 7 to a decoder the time or distance found to exist between consec-8 utive like polarity signals, such as illustrated in Figure 1 by 9 the small arrows as occurring at T, 1.5T, or ?. OT, where T is the nominal cell or bit width in an F2F data stream.
11 A distinction is drawn between "demodulation" and "decoding"
12 as used herein. Demodulation refers to the process of surveying 13 an incoming signal waveform and isolating from it for output the 14 significant elements and their frequencey of occurrence (or spacing), polarity, etc. Decoding, on the other hand, refers to ]6 the process Or interpreting data meanings from the output indic-17 ations of a demodulator.
18 Turning to Figure 2A a chart is given in which, according to 19 whether the interval between succeeding like polarity transitions is T, 1.5T or 2T, the data output Or a decoder and instructions 21 as to which state of decoding to remain in, according to the preser,t 22 invention, are given. Figure 2B illustrates another similar chart 23 according to a second encoding or decoding convention as will be 24 discussedg and is similar to Figure 2A.
Given an F2F encoded bit stream, such as is illustrated 26 in Figure 1, a problem often arises in attempting to decode the 27 data in the presence cf certain forms of distortion, notably 28 known for printed media as "print spread". As it occurs, print 29 spread normally is associated with the spreading of ink in printed black bars of given width outward from the area in RA9-75-011 ~7~
.
B
1 which they were originally laid on the media. In an F2F code 2 stream of printed bars and spaces, the effect is that the lead-3 ing and trailing edges of bars grow, or the width of the bars 4 increases and the in~ervening space is appropriately decreased.
Spread distortion of this type typically adds a constant incre-6 ment of increased width to all leading and trailing edges in a 7 time varying waveform.
8 It has been recognized in the aforementioned U.S. Patent 9 3,723,710 that, given relatively constant spread, the distance from one leading edge to the next leading edge (or from trailing to 11 trailing edges) in the waveform will be the same as in the undis-12 torted waveforms without print spread. Thus, if data is contained 13 in an F2F waveform and can be decoded using only the leading to 14 leading edge or the trailing to trailing edge distances, the spread distortion will have no net effect and can thus be ignored.
16 The present invention describes a technique for decoding any 17 F2F waveform using only the leading edge to leading edge distances 18 or the trailing edge to trailing edge distances measured in the 19 waveform. It will be assumed that all of the leading edges, as indicated by arrows as illustrated in Figure 1, will be positive 21 going signal transitions, but negative transitions could be used in-22 stead. Assuming that a constant velocity scan operation is con-23 ducted on a printed F2F code or that a constant velocity input of 24 si~nals is provided to a demodulator, the minimum time between the successive positive going transitions may be defined as T, the cell, 26 bit or symbol width inherent in an F2F code. The minimum time T
27 corresponds n the example shown in Figure 1 to a one bit in which 28 two lF frequency transitions or positive going transitions are 29 interspersed by one 2F frequency transition. If the distance be-tween successive positive going transitions happens to be two times ~A9-75-011 -8-}3356 1 the minim~ll spacinP; T, then a pa r of zero bits would be indica~ed 2 according to the usu~l convention which indicates that a zero bit 3 is encoded by the absence of a 2F transition between two lF tran-4 sitions. Finally, if the time between two ad~acent positive going transitions happens to be 1.5T, one of two possible things may be 6 indicated:
7 1. Either a zero bit and one-half of a one bit are indicated 8 or one-half of one bit and a zero bit are indicated, with the 9 order of indication being important. A rule for determining which indication should be interpreted must be devised.
11 According to the present invention it has been decided 12 that if the last positive going transition falls other than on a 13 symbol boundary identified as a lF transition point, then a zero 14 bit and one-half of one bit are to be indicated.
2. Secondly, if the last positive going transition falls on 16 the lF or symbol boundary then one-half of a one bit and a zero 17 bit will be outputted.
18 Since the time between two like transitions of 1.5T may 19 have either of these two meanings, two decode states are implied.
These decoding states will be called State 1 and State 2 and will 21 be defined as follows:
22 State 1 is entered whenever a positive going transition 23 occurs on a symbol boundary (i.e., on the lF transition point as 24 identified in Figure 1). Secondly, State 2 will be entered whenever a positive going transition occurs between, but not on, 26 the lF symbol boundaries. Turning to Figure 2A the states and 27 the decode meanings are summarized for the various signal to 28 signal transition times that are possible ~or both states and the 29 rules for entering and exiting from a State 1 to a State 2 decode condition are also given.
~103356 1 Figure 3 illustrates a Stat~ diagram with the decoding rlles 2 to be applied t~ waveforms of the F2F type depending upon the 3 interval Or time detected between successive like polarity p~lses 4 or signals in the waveform.
In the chart of Figure 2A, a rule has been arbitarilY chosen 6 so as to emit a 01 dibit of information upon detection of 1.5T
7 interval spacing when State 1 is in existence during the decode 8 operation and to emit a 0 bit upon detection of 1.5T interval 9 while in State 2. In Chart 2B the alternate convention is illu-strated in which it is chosen to emit a 0 bit upon detection of 11 a 1.5T interval during a State 1 decode condition and to emit a 12 10 dibit upon detection of the 1.5T interval while in State 2.
13 As indicated in the example shown in Figure 1 in lines A and B, 14 either of these conventions will lead to the correct decode of the same information as contained in the top line of Figure 1.
16 The F2F code inherent in the example Or Figure 1 can be accurately 17 decoded using only the known intervals of space between like po-18 larity transitions which have been detected by a suitable detec-19 tor and demodulated and presented to the decoder.
Figure 4 illustrates one form of a logic system for decod-21 ing the F2F data in accordance with signals presented from a pr~-22 mary sensor and demodulator which provides information as to the 23 detection of like polarity transitions at 1, 1.5 or 2.0 times 24 the nominal interval or bit spacing.
The inputs in Figure 4 are presumed as coming from a suitable 26 demodulator having detection and isolation circuits, such as, for 27 example, that in the aforementioned U.S. Patent No. 3,978,313 28 which indicates the occurrence of like polarity pulses 29 as beirlg spaced at 1, 1.5 or 2.0 times the nominal bit spacing in an F2F code stream as understood in the art.
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11(~3356 1 'rurning to Figllre 4, an embc-diment of the F2F decod~r built 2 to recreate the output decode pattern of Figure 2A ls il~ustrated.
3 Incoming signals on lines 1, 2 and 3 would be timing indications 4 coming from a demodulator and signal detector, such as a suitable ~ scanner or receiver, which will have categorized the signal time 6 occurrences between like polarity transitions to be equal to 1, 1.5 7 or 2.OT, where T is the baslc wi~lth Or an F2F symbol. T is the 8 minimum width between two lF signal transitions in an F2F signal 9 stream. Apparatus Or this type for providing output signals in-dicative of finding a pulse at lT, 1.5T or 2T has been previously 11 described in the arorementioned U.S. Patent No. 3,978,319, 12 but other circuits for detecting the polarity of signal 13 transitions in an F2F signal stream and for categorizing the spac-14 ings between two like transitions as equal to the foregoing in-crements of time or distance would be suitable for providing this 16 input signal to the decoder in Figure 5 on llnes 1, 2 and 3, re-17 spectively.
18 The input on line 1, indicative of a spacing between two like 19 polarity transltions as equal to lT, (that is, equal to the mini-mum space between two lF transitions in an F2F signal stream) is 21 applied to lnverter 4 which drives the output of inverter 4 nega-22 tive and this is applied to set the latch 5 to drive its output 23 positive to indicate that the bit of data contained between the 24 last two signal transitions is a 1. The negative output from inverter 4 is also applied to reset latch 6 and set latch 7.
26 Latch 6 is reset to provide an indication that only a single bit 27 of data is present for output to the using system. At iatch 7 28 the output is raised to indicate that there is an output present 29 so that the using system can strobe the output latches 5, 9 and 6 to determine the number of bits and their identity that have 31 been decoded thus far.
r"~, 1~03356 1 The 1.5T spacing signal, if it occurs, is applied oll line 2 2 to double AND gates 8 and 12 which are activated by other inputs 3 from the state condition latch 11 as will be described further 4 below.
The state condition latch 11 keeps track of whether the 6 decode operation should be conducted in state 1 or state 2 as 7 illustrated in Figure 2A, for example. Normally, at starting 8 up the decode operation, a reset signal is applied to latch 13 9 as illustrated setting the output to AND gate 14 positive. The other input to AN~ gate 14 would come either from AND gate 8 or 11 12, both of which, in the absence of incoming signals on their 12 appropriate lines 2 or 3, would be positive at the output side, 13 thus fully conditioning AND gate 14. However, as noted the reset 14 line is applied to latch 13 to set only that half of double AND
gate 14 to the output condition which sets the latch 11 to the 16 state 1 condition. Therefore, at the start of reading a new 17 stream o~ data, the reset is pulsed and applled to latches 7, 18 13 and 15, thus preparing the decoder to begin operating on a 19 new received data stream.
Returning now to the condition which exists when the output 21 from AND gate 8 goes negative, it will be observed that the inputs 22 to latch 13 and AND gate 14 will both go negative. When the input ?3 from AND gate 8 to latch 13 goes negative, latch 13 will be set.
24 The AND gate 14 having an input coming from AND gate 8 will be partially enabled, but not totally, until the end of the timing 26 pulse coming in on line 2. At this time, the output from AND
27 gate 8 will go back to positive, fully conditioning AND gate 14 28 and applying an output to set state latch 11 to state 2, as is ~1(}3356 1 consistent with the decode matrix diagram in Figure 2A. The 2 positive level of signal applied at the input to latch 13 will 3 not change its state since it requires a negative going signal 4 to be set.
The state latch 11 will remain in state 2, which has the 6 effect of disenabling the AND gates 8 and enabling AND gates 12.
7 If a pulse should appear on line 2, AND gates 12 are then fully 8 conditioned and an output, a negative going signal, will be 9 applied to the latch 13 and AND gates 14. At the end of the pulse being applied from line 2, the state latch 11 will be reset 11 to state 1 as shown in the schematic diagram of Figure 4.
12 In the event that a pulse should appear on line 3 while AND
13 gates 12 are fully conditioned, this is the non-allowed or not-14 occurring decode condition and an error signal will be indicated at the output of AND gate 12 which is applied to latch 7 and to 16 latch 15 to indicate that there is an output and that there is an 17 error present so that the using system, not shown, can take ap-18 propriate action.
19 The normal outputs from AND gates 8 and AND gates 12 are used to indicate to their appropriate output latches the condition 21 of emitting a 1, 01, 00 or a 0 and a change to decode state 1 or 22 2, respectively, as indicated in the diagram.
23 Se~eral signal condition lines 16, 17 and la are shown as 24 a representative timing chart for the operation of the decoder apparatus illustrated schematically in Figure 4. Line 16 is the 26 "output present" condition state which is raised during the time 27 a T signal is present as illustrated in line 18; this must be 28 ended prior to the next T signal on line 18 by the negative 29 "system acknowledge" signal on line 17, normally provided by ~1()3356 1 feedback from the using system as a form of acknowledgement 2 signal saying the last bit(s) of data was received. Thls 3 would take the form of a negative going pulse occurring at 4 some time before the next positive going T signal. This is shown in line 17 as the signal which will be supplied by the using 6 system, for example, and it will be understood that other suit-7 able clock means for producing this signal to cut off the "output 8 present" signal in line 16 could also be provided. he negative 9 edge of the signal on line 17 is utilized to reset latches 7 and 15 as shown in Figure 4. Line 18 illustrates the T sign~l which 11 would actually be produced by a scanner scanning an F2F code 12 (and later demodulated) and it should be understood that the T
13 signals would appear variably spaced in time depending on scanner 14 velocity conditions, etc. and are shown here on line 18 only as representative examples.
16 Turning now to Figure 5, a comparison between F2F and phase 17 shift two frequency code will be made and then the decode conven-18 tions to decode phase code of this type, as illustrated in Fi~ure 19 6, will be discussed. Later3 an example of a decoder embodiment will also be described for use on this type of code using the 21 same decoding method as for F2F codes.
22 Turning to Figure 5, another type of code similar to F2F, but 23 utilizing the phase change of the signal is illustrated. Line A
24 of Figure 5 depicts the symbol or cell boundaries of this signal stream, intermediate which are written the encoded data contents 26 according to the convention normally used in phase code. In ~ne 27 B is shown a waveform encoded-with the phase code data of line A
28 and in which it can be seen that a transition in level from up to 29 down or from down to up intermediate cell boundaries is indicative Or the data. The convention chosen in line B to depict the zeros 1 as the transltion from up to down, (or a down golng pulse) is 2 indicated by the arrow in line B, whlle a 1 is indicated by a 3 positive going pulse in line B at the center point of each cell.
4 Line C illustrates a decoding change Or state pattern for decoding this code according to the present invention. Line D illustrates 6 the decoded data which would result using the decode method of the 7 present invention and it may be seen that this ls the same data 8 contained in line A of Figure 5. Line B~ ustrates the transl-9 tion to transition spacings inherent in line B from which the de-coded data of line D results.
11 Figure 6 illustrates a decoding state diagram and rules for 12 outputing the data decoded, utilizing the method Or the present 13 invention. F-lgure 7 shows an embodiment of the circuit meant to 14 follow the rules Or Figure 6 for decoding phase encoded data.
The structure and operation Or the circuitry in Figure 7 is sim-16 ilar to that of Figure 4 utilized for F2F data, however, addi-17 tional AND gates are required as illustrated by AND gates 8A and 18 12A.
19 In Figure 7, varlous components and signal lines are labeled with numbers parallel to those in Figure 4, but with the suffix A.
21 The operation is similiar to that given for Figure 4 and is easily 22 understood ~rom Figure 7 itself. As wlth Figure 4, the final out-23 put lndications from the various latches indicate the appropriate 24 number Or bits and identity as one or zero blts with the conven-tion arbitrarily chosen that an ~p level or positive signal indi-26 cates a one bit while the zero or negative level indicates a zero 27 blt.
28 Figure 8 illustrates another type of phase code which may 29 be encoded with a slightly different encoding convention but which may be decoded according to the same method as the present lnven-31 tion.
RA9-75-011 _15-~lU3356 1 In Figure 8, line A illustrates the interval of time between positive going transitions in line B, the phase encoded waveform that would be received for demodulation and later decoding. Also shown in line A by asterisks are the locations of the symbol or cell boundaries. Line B
illustrates the waveform and line C illustrates the change of decoding state between state 2 and state 1 that would be required to decode line B using the present technique.
Line D illustrates decoded data that could be decoded using the present invention where the phase code of line B
has been encoded with the following convention:
In line B, if the state (voltage level) of a cell (defined by asterisks in line A), i.e., the change in voltage level from up to down, is the same as it was in the previous cell it will be presumed to indicate a zero, while if the change of voltage level in a given cell is not the same as it was in the last cell, a one will be indicated.
Figure 9 illustrates the data output and change of state diagram associated with Figure 8 and the encoding, decoding convention used therein. As will be noted by comparing Figure 8 with Figure 5, different data may be incorporated using the same type of waveforms, but may be interpreted using the same method as the present invention where the interval between like polarity pulses is identified and categorized as equal to T, 1.5T, or 2T and then, according to which state of decoding the decoder is in, the data bit output may be determined.
ADVANTAGES
~hat has been descxibed in the preferred embodiment is a method of decoding F2F or phase shift waveforms utilizing only the positive to positive edge transition distance or alternatively, the negative to negative edge transition 1 distances. This results in an insensitivity to print spread, 2 which may be a problem in printed F2F codes, and performs the 3 decoding operation with a RA975011 16a ~ 1~
1 minimum of logic and circuitry since only a single channel, i.e., 2 single polarity pulses are needed.
3 Having described the invention in terms of a preferred em-4 bodiment thereof, it will be understood by those of skill in the art that many changes in the specific circuits utilized in 6 the preferred embodiment of the decoder apparatus could be made 7 without departing from the scope and spirit of the invention 8 or in the technique involved in decoding the code and embodied g in the apparatus as shown.
RA9~75-011 -17-
11 Furthermore, all of the spacings in the code stream or in each 12 character must be measured and compared to find out which of 13 the spacings is the reference. Remaining measurements are then 14 compared against the reference to categorize the leading to leading edge distances in terms of the reference and the trail-16 ing to trailing edge distance in terms of the reference so that 17 the code may be decoded.
18 This is a po~erful technique, but it has several undesir-19 able features. First, the entire sequence of code transitions, however long, must be scanned and measured; then the reference 2L spacing or measurement must be isolated from among the group of 22 measurements taken; then the remaining measurements must be 23 categorized in terms of the reference, and finally the data may 24 be decoded in accordance with the relative measurements dis-co~ered. This technique is subJect to accelerative or other 26 types of frequency distortion in the basic signal input so 27 that over a long string of data bits, the relative sizes of the 28 transitions or spacings may become distorted sufficiently that 29 some confusion as to the actual sizes as compared to a reference RA9-75-011 _2_ llQ3;~56 1 or even to the identity of the reference spacing itself may occur. Secondly, the technique requires that all of the spacings must be measured first and processed later. If a transition is inadvertently missed, its absence is not detected until the time that processing occurs. It would be more advantageous to detect errors at the bit level or at the pulse level as soon as they occur or are detected in the signal stream.
Various techniques have been developed for isolating individual pulses in the signal stream presented for decod-ing and the prior art is replete with examples of circuitry and technique for doing this. In general, these techniques involve setting up a search gate at an appropriate time to look for the occurrence of a pulse within the gate which is indicative of the data content of a bit cell. Some such techniques are quite powerful but are limited to the code being decoded. For example, U.S. Patents 3,723,710, 3,708,748, 3,886,521, or U.S. Patents 3,947,662 issued March 30, 1976, 3,969,613 issued July 13, 1976, 3,959,626 issued May 25, 1976 and particularly 3,976,319 issued August 31, 1976 are of interest.
Some of the code reading techniques in the prior art utilize a reference measurement or character or a set of transitions prior to each and every separate string of data bits and a good deal of attention has been focused, as noted by the aforementioned U.S. patents, on techniques for setting up search gates and decoding various types of self clocking code streams.
OBJECTS OF THE INVENTION
In light of the foregoing proliferation of techniques and problems encountered in the field, and of the short-comings in the known prior art, it is an object of this invention to provide ~75011 3 11(~3356 1 an improved, compatible self cloclcing code reading technique 2 for the F2~ and phase shift codes which utili~es the positive 3 to positive or negative to negative signal transition spacings 4 as indicia of t~le code content.
SUMMARY OF THE INVENTION
6 The technique of the present invention comprises steps of 7 detecting a positive going (or negative going) signal in an F2F
8 or phase shift signal stream presented for decoding. This is fol-9 lowed by detecting the next following like polarity signal to that detected in the first step; then the distance between the two 11 like polarity pulses which have been detected is characterized 12 in terms of the natural occurring minimum, intermediate and 13 maximum spacings possible in such a code stream. That is, the 14 transitions may be 1 symbol width apart, 1.5 symbol widths apart, or 2.0 symbol widths apart. Lastly, the data content of that 16 portion of the signal stream bounded by the two like polarity 17 pulses is decoded in accordance with the relative size of the 18 interval detected between said two pulses.
Figure 1 illustrates a representative example of F2F data 21 as it would appear encoded according to the usual convention in 22 which a transition occurring between the lF frequency points is 23 indicative of a data bit 1 and the absence of such a pulse is 24 indicative of a data bit 0. The transition points which are the cell or sy~bol boundaries are indicated by asterisks and the data 26 content of the cells is shown also.
27 Figure 2a illustrates a logical matrix for the interpreta-28 tion convention used to decode the data content as indicated in 29 Line A of Figure 1.
Figure ^b is illustrative of a table vf logical matrix 31 values to be decoded for the interpretation convention used to 32 decode the data content as indicated ln line B of Figure 1.
RA~-75-011 -4-11(~3356 1 Figure 3 illustrates a state diagram for decoding the waveform such as illustrated in Figure 1 (line A) which shows the change of state from a state 1 decode operation to a state 2 decode operation.
Figure 4 illustrates a decoding circuit for decoding the data signals in accordance with the invention.
Figure 5 illustrates an example of a phase shift coded signal.
Figure 6 illustrates a decode convention and state change convention for decoding phase shift two frequency code using the method of the invention.
Figure 7 illustrates an embodiment of a decoding circuit for decoding the data encoded in phase shift format in accordance with Figures 5 and 6.
Figure 8 illustrates another example of a phase shift encoding and decoding technique.
Figure 9 illustrates a decoding state diagram for the decoding techni~ue of Figure 8.
SPECIFICATION
A detailed description of a preferred embodiment of the invention together with examples of its application to F2F or phase shift waveforms will now be given. However, at the outset, reference will be made to the aforementioned U.S. Patent 3,978,319 assigned to the common assignee with the present application. The referenced patent illustrates appropriate demodulator circuitry for providing timing out-puts to isolate pulses occurring in an F2F or similar code stream at spacings identified as 1.0, 1.5~ and 2.0 times the nominal cell or lF transistion to lF transition width. Other devices 1103;356 1 or circuits may be e(lually useful, and it will be assumed at 2 the outset that such circuitr~ is provided and that the code 3 streams will be analyzed by such circuitry and that the present 4 invention will be provided with indications of where the pulses in the code stream are occurring, i.e., whether pulses of like 6 polarity are occurring at 1, 1.5, 2.0 times the normal lF signal 7 transition spacing T, otherwise known as the bit "cell width", 8 "symbol width", etc.
9 The terms "lF", "2F", "cell width", etc. are well known in the art of F2F encoding and decoding techniques and a typical 11 example identifying these terms is illustrated in Figure 1, where 12 F2F data, encoded with the usual convention, is illustrated as a 13 stream of ones and zeros represented as signal transitions occur-14 ring in time with intermediate transitions sometimes occurring at the 2F frequency. It will be observed that the interval be-16 tween like polarity pulses at the leading or at the trailing 17 edge of bars or spaces in the code stream of Figure 1 are spaced 18 apart at intervals T, 1.5T or 2T, these being the only combina-19 tions that can be made using lF and 2F signal transitions in the code stream.
21 Written above the signal stream of Figure 1 are the data 22 contents of the various bit cells. Bit cells are identified in 23 the line above the code stream as a series of evenly spaced seg-2~ ments of the waveform of nominally uniform width T between the symbol or cell boundaries. In the lines below the waveform of 26 Figure 1 are two alternative lines of code contents, identified 27 as lines A and B respectively, which can be decoded according to 28 the present invention according to conventions chosen as will 29 appear later.
11~3~S~;
1 The representative stream of` F2F signals ln Figure has 2 been drawn with small arrows indicating the occurrence o~ pos-3 itive going transitions. It will be assumed that some suitable 4 demodulator circult such as that in the aforementioned U.S. Patent No. 3,~78,319, for example, has been provided 6 and that signals will be received from such a circuit to indicate 7 to a decoder the time or distance found to exist between consec-8 utive like polarity signals, such as illustrated in Figure 1 by 9 the small arrows as occurring at T, 1.5T, or ?. OT, where T is the nominal cell or bit width in an F2F data stream.
11 A distinction is drawn between "demodulation" and "decoding"
12 as used herein. Demodulation refers to the process of surveying 13 an incoming signal waveform and isolating from it for output the 14 significant elements and their frequencey of occurrence (or spacing), polarity, etc. Decoding, on the other hand, refers to ]6 the process Or interpreting data meanings from the output indic-17 ations of a demodulator.
18 Turning to Figure 2A a chart is given in which, according to 19 whether the interval between succeeding like polarity transitions is T, 1.5T or 2T, the data output Or a decoder and instructions 21 as to which state of decoding to remain in, according to the preser,t 22 invention, are given. Figure 2B illustrates another similar chart 23 according to a second encoding or decoding convention as will be 24 discussedg and is similar to Figure 2A.
Given an F2F encoded bit stream, such as is illustrated 26 in Figure 1, a problem often arises in attempting to decode the 27 data in the presence cf certain forms of distortion, notably 28 known for printed media as "print spread". As it occurs, print 29 spread normally is associated with the spreading of ink in printed black bars of given width outward from the area in RA9-75-011 ~7~
.
B
1 which they were originally laid on the media. In an F2F code 2 stream of printed bars and spaces, the effect is that the lead-3 ing and trailing edges of bars grow, or the width of the bars 4 increases and the in~ervening space is appropriately decreased.
Spread distortion of this type typically adds a constant incre-6 ment of increased width to all leading and trailing edges in a 7 time varying waveform.
8 It has been recognized in the aforementioned U.S. Patent 9 3,723,710 that, given relatively constant spread, the distance from one leading edge to the next leading edge (or from trailing to 11 trailing edges) in the waveform will be the same as in the undis-12 torted waveforms without print spread. Thus, if data is contained 13 in an F2F waveform and can be decoded using only the leading to 14 leading edge or the trailing to trailing edge distances, the spread distortion will have no net effect and can thus be ignored.
16 The present invention describes a technique for decoding any 17 F2F waveform using only the leading edge to leading edge distances 18 or the trailing edge to trailing edge distances measured in the 19 waveform. It will be assumed that all of the leading edges, as indicated by arrows as illustrated in Figure 1, will be positive 21 going signal transitions, but negative transitions could be used in-22 stead. Assuming that a constant velocity scan operation is con-23 ducted on a printed F2F code or that a constant velocity input of 24 si~nals is provided to a demodulator, the minimum time between the successive positive going transitions may be defined as T, the cell, 26 bit or symbol width inherent in an F2F code. The minimum time T
27 corresponds n the example shown in Figure 1 to a one bit in which 28 two lF frequency transitions or positive going transitions are 29 interspersed by one 2F frequency transition. If the distance be-tween successive positive going transitions happens to be two times ~A9-75-011 -8-}3356 1 the minim~ll spacinP; T, then a pa r of zero bits would be indica~ed 2 according to the usu~l convention which indicates that a zero bit 3 is encoded by the absence of a 2F transition between two lF tran-4 sitions. Finally, if the time between two ad~acent positive going transitions happens to be 1.5T, one of two possible things may be 6 indicated:
7 1. Either a zero bit and one-half of a one bit are indicated 8 or one-half of one bit and a zero bit are indicated, with the 9 order of indication being important. A rule for determining which indication should be interpreted must be devised.
11 According to the present invention it has been decided 12 that if the last positive going transition falls other than on a 13 symbol boundary identified as a lF transition point, then a zero 14 bit and one-half of one bit are to be indicated.
2. Secondly, if the last positive going transition falls on 16 the lF or symbol boundary then one-half of a one bit and a zero 17 bit will be outputted.
18 Since the time between two like transitions of 1.5T may 19 have either of these two meanings, two decode states are implied.
These decoding states will be called State 1 and State 2 and will 21 be defined as follows:
22 State 1 is entered whenever a positive going transition 23 occurs on a symbol boundary (i.e., on the lF transition point as 24 identified in Figure 1). Secondly, State 2 will be entered whenever a positive going transition occurs between, but not on, 26 the lF symbol boundaries. Turning to Figure 2A the states and 27 the decode meanings are summarized for the various signal to 28 signal transition times that are possible ~or both states and the 29 rules for entering and exiting from a State 1 to a State 2 decode condition are also given.
~103356 1 Figure 3 illustrates a Stat~ diagram with the decoding rlles 2 to be applied t~ waveforms of the F2F type depending upon the 3 interval Or time detected between successive like polarity p~lses 4 or signals in the waveform.
In the chart of Figure 2A, a rule has been arbitarilY chosen 6 so as to emit a 01 dibit of information upon detection of 1.5T
7 interval spacing when State 1 is in existence during the decode 8 operation and to emit a 0 bit upon detection of 1.5T interval 9 while in State 2. In Chart 2B the alternate convention is illu-strated in which it is chosen to emit a 0 bit upon detection of 11 a 1.5T interval during a State 1 decode condition and to emit a 12 10 dibit upon detection of the 1.5T interval while in State 2.
13 As indicated in the example shown in Figure 1 in lines A and B, 14 either of these conventions will lead to the correct decode of the same information as contained in the top line of Figure 1.
16 The F2F code inherent in the example Or Figure 1 can be accurately 17 decoded using only the known intervals of space between like po-18 larity transitions which have been detected by a suitable detec-19 tor and demodulated and presented to the decoder.
Figure 4 illustrates one form of a logic system for decod-21 ing the F2F data in accordance with signals presented from a pr~-22 mary sensor and demodulator which provides information as to the 23 detection of like polarity transitions at 1, 1.5 or 2.0 times 24 the nominal interval or bit spacing.
The inputs in Figure 4 are presumed as coming from a suitable 26 demodulator having detection and isolation circuits, such as, for 27 example, that in the aforementioned U.S. Patent No. 3,978,313 28 which indicates the occurrence of like polarity pulses 29 as beirlg spaced at 1, 1.5 or 2.0 times the nominal bit spacing in an F2F code stream as understood in the art.
r~
11(~3356 1 'rurning to Figllre 4, an embc-diment of the F2F decod~r built 2 to recreate the output decode pattern of Figure 2A ls il~ustrated.
3 Incoming signals on lines 1, 2 and 3 would be timing indications 4 coming from a demodulator and signal detector, such as a suitable ~ scanner or receiver, which will have categorized the signal time 6 occurrences between like polarity transitions to be equal to 1, 1.5 7 or 2.OT, where T is the baslc wi~lth Or an F2F symbol. T is the 8 minimum width between two lF signal transitions in an F2F signal 9 stream. Apparatus Or this type for providing output signals in-dicative of finding a pulse at lT, 1.5T or 2T has been previously 11 described in the arorementioned U.S. Patent No. 3,978,319, 12 but other circuits for detecting the polarity of signal 13 transitions in an F2F signal stream and for categorizing the spac-14 ings between two like transitions as equal to the foregoing in-crements of time or distance would be suitable for providing this 16 input signal to the decoder in Figure 5 on llnes 1, 2 and 3, re-17 spectively.
18 The input on line 1, indicative of a spacing between two like 19 polarity transltions as equal to lT, (that is, equal to the mini-mum space between two lF transitions in an F2F signal stream) is 21 applied to lnverter 4 which drives the output of inverter 4 nega-22 tive and this is applied to set the latch 5 to drive its output 23 positive to indicate that the bit of data contained between the 24 last two signal transitions is a 1. The negative output from inverter 4 is also applied to reset latch 6 and set latch 7.
26 Latch 6 is reset to provide an indication that only a single bit 27 of data is present for output to the using system. At iatch 7 28 the output is raised to indicate that there is an output present 29 so that the using system can strobe the output latches 5, 9 and 6 to determine the number of bits and their identity that have 31 been decoded thus far.
r"~, 1~03356 1 The 1.5T spacing signal, if it occurs, is applied oll line 2 2 to double AND gates 8 and 12 which are activated by other inputs 3 from the state condition latch 11 as will be described further 4 below.
The state condition latch 11 keeps track of whether the 6 decode operation should be conducted in state 1 or state 2 as 7 illustrated in Figure 2A, for example. Normally, at starting 8 up the decode operation, a reset signal is applied to latch 13 9 as illustrated setting the output to AND gate 14 positive. The other input to AN~ gate 14 would come either from AND gate 8 or 11 12, both of which, in the absence of incoming signals on their 12 appropriate lines 2 or 3, would be positive at the output side, 13 thus fully conditioning AND gate 14. However, as noted the reset 14 line is applied to latch 13 to set only that half of double AND
gate 14 to the output condition which sets the latch 11 to the 16 state 1 condition. Therefore, at the start of reading a new 17 stream o~ data, the reset is pulsed and applled to latches 7, 18 13 and 15, thus preparing the decoder to begin operating on a 19 new received data stream.
Returning now to the condition which exists when the output 21 from AND gate 8 goes negative, it will be observed that the inputs 22 to latch 13 and AND gate 14 will both go negative. When the input ?3 from AND gate 8 to latch 13 goes negative, latch 13 will be set.
24 The AND gate 14 having an input coming from AND gate 8 will be partially enabled, but not totally, until the end of the timing 26 pulse coming in on line 2. At this time, the output from AND
27 gate 8 will go back to positive, fully conditioning AND gate 14 28 and applying an output to set state latch 11 to state 2, as is ~1(}3356 1 consistent with the decode matrix diagram in Figure 2A. The 2 positive level of signal applied at the input to latch 13 will 3 not change its state since it requires a negative going signal 4 to be set.
The state latch 11 will remain in state 2, which has the 6 effect of disenabling the AND gates 8 and enabling AND gates 12.
7 If a pulse should appear on line 2, AND gates 12 are then fully 8 conditioned and an output, a negative going signal, will be 9 applied to the latch 13 and AND gates 14. At the end of the pulse being applied from line 2, the state latch 11 will be reset 11 to state 1 as shown in the schematic diagram of Figure 4.
12 In the event that a pulse should appear on line 3 while AND
13 gates 12 are fully conditioned, this is the non-allowed or not-14 occurring decode condition and an error signal will be indicated at the output of AND gate 12 which is applied to latch 7 and to 16 latch 15 to indicate that there is an output and that there is an 17 error present so that the using system, not shown, can take ap-18 propriate action.
19 The normal outputs from AND gates 8 and AND gates 12 are used to indicate to their appropriate output latches the condition 21 of emitting a 1, 01, 00 or a 0 and a change to decode state 1 or 22 2, respectively, as indicated in the diagram.
23 Se~eral signal condition lines 16, 17 and la are shown as 24 a representative timing chart for the operation of the decoder apparatus illustrated schematically in Figure 4. Line 16 is the 26 "output present" condition state which is raised during the time 27 a T signal is present as illustrated in line 18; this must be 28 ended prior to the next T signal on line 18 by the negative 29 "system acknowledge" signal on line 17, normally provided by ~1()3356 1 feedback from the using system as a form of acknowledgement 2 signal saying the last bit(s) of data was received. Thls 3 would take the form of a negative going pulse occurring at 4 some time before the next positive going T signal. This is shown in line 17 as the signal which will be supplied by the using 6 system, for example, and it will be understood that other suit-7 able clock means for producing this signal to cut off the "output 8 present" signal in line 16 could also be provided. he negative 9 edge of the signal on line 17 is utilized to reset latches 7 and 15 as shown in Figure 4. Line 18 illustrates the T sign~l which 11 would actually be produced by a scanner scanning an F2F code 12 (and later demodulated) and it should be understood that the T
13 signals would appear variably spaced in time depending on scanner 14 velocity conditions, etc. and are shown here on line 18 only as representative examples.
16 Turning now to Figure 5, a comparison between F2F and phase 17 shift two frequency code will be made and then the decode conven-18 tions to decode phase code of this type, as illustrated in Fi~ure 19 6, will be discussed. Later3 an example of a decoder embodiment will also be described for use on this type of code using the 21 same decoding method as for F2F codes.
22 Turning to Figure 5, another type of code similar to F2F, but 23 utilizing the phase change of the signal is illustrated. Line A
24 of Figure 5 depicts the symbol or cell boundaries of this signal stream, intermediate which are written the encoded data contents 26 according to the convention normally used in phase code. In ~ne 27 B is shown a waveform encoded-with the phase code data of line A
28 and in which it can be seen that a transition in level from up to 29 down or from down to up intermediate cell boundaries is indicative Or the data. The convention chosen in line B to depict the zeros 1 as the transltion from up to down, (or a down golng pulse) is 2 indicated by the arrow in line B, whlle a 1 is indicated by a 3 positive going pulse in line B at the center point of each cell.
4 Line C illustrates a decoding change Or state pattern for decoding this code according to the present invention. Line D illustrates 6 the decoded data which would result using the decode method of the 7 present invention and it may be seen that this ls the same data 8 contained in line A of Figure 5. Line B~ ustrates the transl-9 tion to transition spacings inherent in line B from which the de-coded data of line D results.
11 Figure 6 illustrates a decoding state diagram and rules for 12 outputing the data decoded, utilizing the method Or the present 13 invention. F-lgure 7 shows an embodiment of the circuit meant to 14 follow the rules Or Figure 6 for decoding phase encoded data.
The structure and operation Or the circuitry in Figure 7 is sim-16 ilar to that of Figure 4 utilized for F2F data, however, addi-17 tional AND gates are required as illustrated by AND gates 8A and 18 12A.
19 In Figure 7, varlous components and signal lines are labeled with numbers parallel to those in Figure 4, but with the suffix A.
21 The operation is similiar to that given for Figure 4 and is easily 22 understood ~rom Figure 7 itself. As wlth Figure 4, the final out-23 put lndications from the various latches indicate the appropriate 24 number Or bits and identity as one or zero blts with the conven-tion arbitrarily chosen that an ~p level or positive signal indi-26 cates a one bit while the zero or negative level indicates a zero 27 blt.
28 Figure 8 illustrates another type of phase code which may 29 be encoded with a slightly different encoding convention but which may be decoded according to the same method as the present lnven-31 tion.
RA9-75-011 _15-~lU3356 1 In Figure 8, line A illustrates the interval of time between positive going transitions in line B, the phase encoded waveform that would be received for demodulation and later decoding. Also shown in line A by asterisks are the locations of the symbol or cell boundaries. Line B
illustrates the waveform and line C illustrates the change of decoding state between state 2 and state 1 that would be required to decode line B using the present technique.
Line D illustrates decoded data that could be decoded using the present invention where the phase code of line B
has been encoded with the following convention:
In line B, if the state (voltage level) of a cell (defined by asterisks in line A), i.e., the change in voltage level from up to down, is the same as it was in the previous cell it will be presumed to indicate a zero, while if the change of voltage level in a given cell is not the same as it was in the last cell, a one will be indicated.
Figure 9 illustrates the data output and change of state diagram associated with Figure 8 and the encoding, decoding convention used therein. As will be noted by comparing Figure 8 with Figure 5, different data may be incorporated using the same type of waveforms, but may be interpreted using the same method as the present invention where the interval between like polarity pulses is identified and categorized as equal to T, 1.5T, or 2T and then, according to which state of decoding the decoder is in, the data bit output may be determined.
ADVANTAGES
~hat has been descxibed in the preferred embodiment is a method of decoding F2F or phase shift waveforms utilizing only the positive to positive edge transition distance or alternatively, the negative to negative edge transition 1 distances. This results in an insensitivity to print spread, 2 which may be a problem in printed F2F codes, and performs the 3 decoding operation with a RA975011 16a ~ 1~
1 minimum of logic and circuitry since only a single channel, i.e., 2 single polarity pulses are needed.
3 Having described the invention in terms of a preferred em-4 bodiment thereof, it will be understood by those of skill in the art that many changes in the specific circuits utilized in 6 the preferred embodiment of the decoder apparatus could be made 7 without departing from the scope and spirit of the invention 8 or in the technique involved in decoding the code and embodied g in the apparatus as shown.
RA9~75-011 -17-
Claims (8)
1. In a decoder apparatus having logic means for com-paring signal indications from a demodulator and also having at least two alternative decode value tables called states in which data contents may be interpreted in accordance with said indications from said demodulator, a method of decoding the data contents of F2F or two phase shift encoded data streams which have been demodulated in a demodulator to extract the characteristic 1F and 2F frequency pulses con-tained in such codes and between which pulses said demod-ulator has performed measurements and comparisons to charac-terize the intervals of time or distance contained between each pair of like polarity pulses as being equal to 1T, 1.5T, or 2T, where T is the nominal minimum distance or time normally occurring between two 1F pulses in said codes, said decoder also being provided with an indication of the type of code to be decoded and with the indications of the results of said interval characterization from said demodu-lator, the method of selecting a decoding state in said decoder and decoding said data contents in accordance with said interval indications comprising steps performed in said decoder of:
controlling the decoding state of said decoder in accordance with said interval indication received from said demodulator for the two most recently received like polarity pulses in said encoded stream of data;
selecting a set of possible data contents for the por-tion of said code stream encompassed by said two most re-cently received like polarity pulses in accordance with said decoding state of said decoder; and selecting and outputting the particular data content from said set of possible data contents in said state in accordance with said interval indication, thereby decoding the portion of said code lying between said two last received like polarity pulses.
controlling the decoding state of said decoder in accordance with said interval indication received from said demodulator for the two most recently received like polarity pulses in said encoded stream of data;
selecting a set of possible data contents for the por-tion of said code stream encompassed by said two most re-cently received like polarity pulses in accordance with said decoding state of said decoder; and selecting and outputting the particular data content from said set of possible data contents in said state in accordance with said interval indication, thereby decoding the portion of said code lying between said two last received like polarity pulses.
2. The method of claim 1, wherein said controlling step further includes:
changing said decoding state from one state to another after each indication of an interval equal to 1.5T.
changing said decoding state from one state to another after each indication of an interval equal to 1.5T.
3. The method of claim 1, wherein said selecting and out-puting step further comprises:
outputing two data bits whenever said interval indica-tion is 2T, ouputing a single data bit whenever said interval indication is 1T, and outputing one or two data bits as de-termined by the state of said decoder, whenever said interval indication is 1.5T.
outputing two data bits whenever said interval indica-tion is 2T, ouputing a single data bit whenever said interval indication is 1T, and outputing one or two data bits as de-termined by the state of said decoder, whenever said interval indication is 1.5T.
4. The method of claim 2, wherein said selecting and out-putting step further comprises:
outputing two data bits whenever said interval indicat-ion is 2T, outputing a single data bit whenever said interval indication is 1T, and outputing one or two data bits as determined by the state Or said decoder, whenever said interval indication is 1.5T.
outputing two data bits whenever said interval indicat-ion is 2T, outputing a single data bit whenever said interval indication is 1T, and outputing one or two data bits as determined by the state Or said decoder, whenever said interval indication is 1.5T.
5. The method of claim 1, wherein said selecting and output-ing step further comprises:
outputing an error indication signal and no data bits whenever said interval indication is 2T and one of said decoding states selected according to a chosen convention coexist.
-Claims 2, 3, 4 and 5-
outputing an error indication signal and no data bits whenever said interval indication is 2T and one of said decoding states selected according to a chosen convention coexist.
-Claims 2, 3, 4 and 5-
6. The method of claim 2, wherein said selecting and out-puting steps further comprises:
outputing an error indication signal and no data bits whenever said interval indication is 2T and one of said decoding states selected according to a chosen coding convention coexist.
outputing an error indication signal and no data bits whenever said interval indication is 2T and one of said decoding states selected according to a chosen coding convention coexist.
7. The method of claim 3, wherein said selecting and out-puting steps further comprises:
outputing an error indication signal and no data bits whenever said interval indication is 2T and one of said decoding states selected according to a chosen coding convention coexist.
outputing an error indication signal and no data bits whenever said interval indication is 2T and one of said decoding states selected according to a chosen coding convention coexist.
8. The method of claim 4, wherein said selecting and out-puting steps further comprises:
outputing an error indication signal and no data bits whenever said interval indication is 2T and one of said decoding states selected according to a chosen coding convention coexist.
-Claims 6, 7 and 8-
outputing an error indication signal and no data bits whenever said interval indication is 2T and one of said decoding states selected according to a chosen coding convention coexist.
-Claims 6, 7 and 8-
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|---|---|---|---|
| US691,739 | 1976-06-01 | ||
| US05/691,739 US4027267A (en) | 1976-06-01 | 1976-06-01 | Method of decoding data content of F2F and phase shift encoded data streams |
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|---|---|
| CA1103356A true CA1103356A (en) | 1981-06-16 |
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| CA278,019A Expired CA1103356A (en) | 1976-06-01 | 1977-05-10 | Method of decoding waveforms |
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| JP (1) | JPS52147023A (en) |
| CA (1) | CA1103356A (en) |
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| FR (1) | FR2353999A1 (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4965825A (en) | 1981-11-03 | 1990-10-23 | The Personalized Mass Media Corporation | Signal processing apparatus and methods |
| USRE47642E1 (en) | 1981-11-03 | 2019-10-08 | Personalized Media Communications LLC | Signal processing apparatus and methods |
| US7831204B1 (en) | 1981-11-03 | 2010-11-09 | Personalized Media Communications, Llc | Signal processing apparatus and methods |
| US4502142A (en) * | 1982-09-07 | 1985-02-26 | Lockheed Electronics Company, Inc. | Apparatus for detecting errors in a digital data stream encoded in a double density code |
| US4638359A (en) * | 1983-05-19 | 1987-01-20 | Westinghouse Electric Corp. | Remote control switching of television sources |
| US4547764A (en) * | 1983-10-31 | 1985-10-15 | Burroughs Corporation | Pulse width decoder for double frequency encoded serial data |
| DE3728655A1 (en) * | 1987-08-27 | 1989-03-09 | Thomson Brandt Gmbh | METHOD AND / OR DEVICE FOR DEMODULATING A BIPHASE SIGNAL |
| KR910007815B1 (en) * | 1988-12-31 | 1991-10-02 | 삼성전자 주식회사 | Decoding method of biphase encoding data |
| DE4006426C2 (en) * | 1990-03-01 | 1993-11-18 | Siemens Nixdorf Inf Syst | Method for evaluating binary information from a magnetic memory card |
| SE466725B (en) * | 1990-07-18 | 1992-03-23 | Goeran Krook | PROCEDURES TO LIMIT THE BANDWIDTH OF AN APPROPRIATE BINARY SIGNAL |
| EP0474908A1 (en) * | 1990-09-13 | 1992-03-18 | Siemens Aktiengesellschaft | Method of evaluating information bits contained in biphase coded pulse sequences |
| JP3521239B2 (en) * | 1994-12-20 | 2004-04-19 | シャープ株式会社 | Disk drive device |
| WO2011146651A1 (en) * | 2010-05-18 | 2011-11-24 | Dynamics Inc | Systems and methods for cards and devices operable to communicate via light pulses and touch sensitive displays |
| CN102522996B (en) * | 2011-12-08 | 2015-07-01 | 北京握奇数据系统有限公司 | Decoding method and decoding device of FM0 coded data |
| CN102522997B (en) * | 2011-12-08 | 2015-09-02 | 北京握奇数据系统有限公司 | The coding/decoding method of FM0 coded data and device |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3708748A (en) * | 1970-04-27 | 1973-01-02 | Ibm | Retrospective pulse modulation and apparatus therefor |
| US3713140A (en) * | 1970-10-08 | 1973-01-23 | Rca Corp | Decoder for delay modulation signals |
| US3723710A (en) * | 1971-06-28 | 1973-03-27 | Ibm | Method and device for reading and decoding a high density self-clocking bar code |
| US3784792A (en) * | 1972-03-29 | 1974-01-08 | Monarch Marking Systems Inc | Coded record and methods of and apparatus for encoding and decoding records |
| US3902129A (en) * | 1972-09-07 | 1975-08-26 | Ibm | Demodulating circuitry for pulse rate modulation data reproduction |
| JPS505569A (en) * | 1973-05-18 | 1975-01-21 | ||
| US3947662A (en) * | 1974-12-31 | 1976-03-30 | International Business Machines Corporation | Distorted two frequency coded data interpreting method and apparatus |
| US3959626A (en) * | 1975-02-03 | 1976-05-25 | International Business Machines Corporation | Distorted two frequency coded data interpreting method and apparatus |
| US3982195A (en) * | 1975-05-29 | 1976-09-21 | Teletype Corporation | Method and apparatus for decoding diphase signals |
-
1976
- 1976-06-01 US US05/691,739 patent/US4027267A/en not_active Expired - Lifetime
-
1977
- 1977-04-26 FR FR7713445A patent/FR2353999A1/en active Granted
- 1977-04-26 DE DE2718490A patent/DE2718490C2/en not_active Expired
- 1977-05-06 IT IT23261/77A patent/IT1115468B/en active
- 1977-05-10 CA CA278,019A patent/CA1103356A/en not_active Expired
- 1977-05-10 JP JP5274877A patent/JPS52147023A/en active Granted
- 1977-05-27 GB GB22587/77A patent/GB1563377A/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| FR2353999A1 (en) | 1977-12-30 |
| JPS6112417B2 (en) | 1986-04-08 |
| JPS52147023A (en) | 1977-12-07 |
| US4027267A (en) | 1977-05-31 |
| DE2718490A1 (en) | 1977-12-15 |
| DE2718490C2 (en) | 1985-09-05 |
| FR2353999B1 (en) | 1980-02-08 |
| IT1115468B (en) | 1986-02-03 |
| GB1563377A (en) | 1980-03-26 |
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