CA2026592A1 - Display control device - Google Patents
Display control deviceInfo
- Publication number
- CA2026592A1 CA2026592A1 CA002026592A CA2026592A CA2026592A1 CA 2026592 A1 CA2026592 A1 CA 2026592A1 CA 002026592 A CA002026592 A CA 002026592A CA 2026592 A CA2026592 A CA 2026592A CA 2026592 A1 CA2026592 A1 CA 2026592A1
- Authority
- CA
- Canada
- Prior art keywords
- character
- address
- display
- line buffer
- common memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/22—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of characters or indicia using display control signals derived from coded signals representing the characters or indicia, e.g. with a character-code memory
- G09G5/222—Control of the character-code memory
Abstract
Abstract of the Disclosure:
A display control device according to the present invention includes a common memory having two funtions, one as a refresh memory for outputting a character code and the other as a character generator for generating a character font, an output character code from which is stored in a line buffer. In this case, a display address generator circuit generates a character address for generating the character code and a raster address for designating the character font, which are in turn switched by an address selector and outputted to said common memory which then outputs a video signal to a video control circuit based upon said character font. Additionally, there is provided a line buffer control circuit for outputting a read/write access control signal to said line buffer based upon the raster address.
A display control device according to the present invention includes a common memory having two funtions, one as a refresh memory for outputting a character code and the other as a character generator for generating a character font, an output character code from which is stored in a line buffer. In this case, a display address generator circuit generates a character address for generating the character code and a raster address for designating the character font, which are in turn switched by an address selector and outputted to said common memory which then outputs a video signal to a video control circuit based upon said character font. Additionally, there is provided a line buffer control circuit for outputting a read/write access control signal to said line buffer based upon the raster address.
Description
2~2~9~2 n ISI)I.~Y CONTI~OI, I)EVICE
~ack~ro_nd oF l!!e_lnventlo Q
(l~ield of tlle Invention) The present invention relates to a code refreshing display control device for dis~laying character information on various displays such as a raster scanning CRT
display and a ~iquid crystal, etc.
(Description of the Prior nrt~
R0ferring to ~IG. 2, the construction of a character display system of a prior code refreshing display control device is illustrated in the form of a block diagram In the figure, designated at 1 is a display address generator circuit for generating a display address in given display timing, 7 is a refresh memory into wnich character code information is written corresponding to a display position on a display screen and o~ which tlle same is read out fol~owing a character address from said display address generator circuit 1, o i9 a character generator in which a specific stylfl character font i~ stored in a ROM or a n~M
corres~onding to a character code and which is lo generàte a corresponding character font by a character code read from the refresh memory 7, and 6 is a video control circuit into which output data from the character generator ~ is inputted for generating various video signals suitable for a display device.
' ' -, - 2 - 202~2 llere ~ill he described o~eration of tlle prior display control device. The display address generator circuit 1 generates in a predetermined period a ctlaracter address as an address of the refrestl memory 7 corresponding to a display screen, and a raster address of a character to the character generator 8, The refresh memory 1, in whicll a character code has previously heen written corresponding to a display position on a display screen, and outputs as data a character code in an area addressed by the foregoing cllaracter address. The character code is inputted into lhe characler generator $ together with tlle foregoing raster address as a character address of a corresponding character font, She character generator o then outputs the character font as data, The video co~trol circuit 6 converts the olllput data from the charac~er generator 8 to a video signal for display, and supplies a si~nal suitable for the display device to lhe sam0. IlerchY, lhe rlisplay dev;ce displays tlle ,haracter on its display screcn, Th~ prior code refreslling display control rlev;ce is constructed as described above, and ~enerally incorporates a RAM as the refresh memory and a ROM or a R~M as the character ~enerator, requiring physically a plurality of types of indipendent memories and hence a compl;cated control circuit for a plurality of memory accesses, ~urttler, use of a plurality of types of memories makes ' :`
, - 3 - 2~2~
diflicult tlle realization of space saving Or a par~s packagillg area, of cost reduction, lowering of troubles, and so on.
Summary of the lnvention In view of tlle drawbacks with the prior art, it is an object of the present invention to provide a display control device which is capable of reduction of the number of parts as an entire device, space saving, cost reduction, and reliability improvement as a result of lowering troubles by providing a common mernory serving as the refresh memory and the character generator.
To achieve the above object, a display control device according to the present invention comprises a common memory 4 having functions as a refresh memory for outputting a character code and a character generator for generating a character font, a display address generator circuit 1 for generating a character address for designating a character code stored in said common memory 4 and a raster address for designating a character font, a line buffer 5 for stor;ng therein a character code outputted from said common memory 4, an address selector 3 for switching the character add.ress from said display address generator circuit 1 and the character code from said line buffer 5, and outputting a so-switchted signal to said common memory 4, a video control circuit 6 for .outputting a video signal based upon the - ~ - 202~
character font from said common memory 4, and a line buffer control circuit 2 for outputting a read/write access control signal tllat is to perform read/write operation with respect to said line buffer 5 based upon the raster address from said d i9p lay address eenerator circuit 1.
The above and other ohjects, features, and advanta~es of lhe invention will become more a~parent from the following description ~hen taken in conjunction with the accompanying drawings ~rief Des~Q~ the Dra _ngs ~ IG. 1 is a block diagram illustrating the construction of a character display system of a clisplay control device according to an emhodiment of tlle present invention: and EIG, 2 is a block diagram illustrating the construction of a cllaracter display system of a prior display control device.
Description of tlle Preferred Embodiment ~ eferring to ~IG. 1, the construction of a cllaracter display system of a display control device according to an emhodimenl of the present invention is illustrated in the form of a block diagram, As illustrated in the figure, designaled at 4 is a common memory having two functions, one of a refresh memory for outplltting a character code, the other of a character generator for generating a character font, 1 is a display address generator circuit for ' ,:' generating a characler address for designating a character code stores in the common memory 4 and a raster address for designatillg a cllaracter font, 5 is a line buf~er fol storing thereill a character code outplltled from the common memory ~, 3 is an address selector for switching a character address from the display address generator circui~ 1 and a character code from the line buffer 5, ~ is a video con~rol circuit for outputting a video signal based upon a cilaracter font from the common memory 4, and 2 is a line buffer control circuit for outputting a read/write access conlrol signal for instructing the line buffer 5 to effect read/write operation based ul)on a raster address from the raster address generator circu;t 1 and further outputtine a switching condition signal for the address seleclor 3 and an enable control si~nal for the video control circuit 6.
The common memory 4 comprises a one chip memory hav;ng a storage capacity more than the total sum of tilose of the refresh memory 7 and of the character generator o in the prior example. llerein, the common memory 4 may comprise a plurality of chips, but is rather desirable to comprise one chip memory in order to reduce the number of constituent parts. The line buffer 5 comprises a re~ister wh;ch has a storage capacity corresponding to the number of one horizontal display characters, and the like.
Operation of the embodiment constructed as described - ~ ~02~
ahove is as follows. When a raster address outputted from the disi)lay address generator circuit 1 indicates a head raster of a display character for example, the common msmory 4 starts to act as -the refresh memory. The line buffer control circuit 2 receives the rasler address from lhe display address generator circuit 1 and decodes the same to 31ldge whether or not it is a head raster, If the signal is tlle head raster, it outPuts a swilching condition signal to the address selector 3 such tllat the ctlaracter address from the display address generator circllit 1 is inputted into the common memory 4 dur;ng the one horizontal display period. 'rhe common memory 4 outputs a character code corresponding to the display screen by inputting therein the character address, The line buffer control circuit 2 also outputs to the line buffer 5 write control signals ~write access control signa~ such as a write enable signal and a write clock signal, etc., such that the character code outputted from the common memory 4 durin8 this perio~
is written into the line buffer 5, and furtller outputs a disable signal to the video control circuit 6 to mask the video signal to be outputted to the display device, When the raster address outputted from the d;splay address generator circuit 1 indicates a signal otller than the head raster, the common memory ~ acts as the character generator, At tllis time, the line buffer control circuit 2 . ~ ,~ , . . .
, - 7 ~~ ~2~
outputs the switclling condition signal to the address selector 3 such that a character code stored in the line buffer 5 is inputted into the common memory 4 as an address The common memory 4 outputs lhe character font previously stored tllerein by inputting the character code thereinto.
Additionally, llle line buffer control circuit 2 outputs various read control signals (read access control signa~) such as a read enable signal and a read clock, etc., to lhe line buffer 5 such that the line buffer 5 issues the character code written therein at the haed raster corresponding to the displaY screen, and outputs the enable signal to the video control circuit 6 to control tlle comnlotl memory 4 such that the character ront outputted from tlle common memory 4 is fed to the display device.
The display control device in the present embodiment described above can have tWQ types of functions of tlle refresh memory and the character generator with a memory of one type StlCh as a R~M by the use of the line buffer in which the CllaraCter code corresponding to tlle one llor;zontal display to stored. The common memory acting as lhe refresll memory and the character generator is first accessed as tlle re~resb memory by the character address outputte~ from the display address generator c;rcuit, and data stored in tlle common memory is stored in the line buffer. Successi~ely, the line buffer operates as the refresh memory Wlli]St a 2~2~9~
next line character is displayed, to outp(il the cllaracter code periodically, wllich is in turn received by the common memory that is hereby accessed as the cllaracter generator.
These operations are repeated corresponding to tlle number of lines following a format of the disl)lay screen to display the associated cllaracter on tlle display device.
It sllould be noticed that altllough in tlle above embodiment the block diagram only of the circuit of tlle character display system in the code refreslling display control device was illustraled for simpliri(ation, the embodiment i9 also applicable to a device incorporating an attribute control circuit for controlling a ruled lint3 and display colors.
Additionally, althougll in the above embodiment the case was described where the sing]e memory acts both as llle code refresh memory and the R~M character generator, a device incorporating the ROM character gGnerator in the prior example may also be applicable.
~ urthermore, although the case was described by way of an illustrative example where a character code was written in the line buffer at the head raster, it may be written at any raster, e.g., at a final raster, and any raster to be written may be set in a programmable manner. Moreover, although the video signal was made disable upon the character code being written into the line buffer, the video .
.
, ~2~
signal may be made enable at all times by controlling write timing by an external circuit. ~ddilionally, althougll in tl~e above embodiment, the line buffer control circuit, the address selector, and lhe line buffer were described as belonging in separate independent blocks, thsy may be united into a common memory control l)lock to reduce the number of required circuits as well as achieYe space saving Or a pRrts packaging area.
According to the present invention, as described above, the display control device comprises the common memory having the functions of the refresh memory and the character generator, the display address generator circuit for generating a character address and a raster address, the line buffer for storing therein a character code outputted from the common memory, the address selector for switching a character address from the display address generator circuit and a character code from the line buffer, and outputting a switched address to the comMon memory, the video control circuit for outputting a video sigllal based upon the character font from the common memory, and the line buffer control circuit for outputting a read/wr;te access control signal to the line buffer based upon the raster address from the display address generator circuit, whereby there can be assured the reduction of parts as the enlire device, space saving, cost reduction, and improved ~- 1 0 --202~
reliability by the reduction of troubles.
; ,",..,', ,;, : , , ., , ~, :
,: , ~ ~ ;,: . , .
~ack~ro_nd oF l!!e_lnventlo Q
(l~ield of tlle Invention) The present invention relates to a code refreshing display control device for dis~laying character information on various displays such as a raster scanning CRT
display and a ~iquid crystal, etc.
(Description of the Prior nrt~
R0ferring to ~IG. 2, the construction of a character display system of a prior code refreshing display control device is illustrated in the form of a block diagram In the figure, designated at 1 is a display address generator circuit for generating a display address in given display timing, 7 is a refresh memory into wnich character code information is written corresponding to a display position on a display screen and o~ which tlle same is read out fol~owing a character address from said display address generator circuit 1, o i9 a character generator in which a specific stylfl character font i~ stored in a ROM or a n~M
corres~onding to a character code and which is lo generàte a corresponding character font by a character code read from the refresh memory 7, and 6 is a video control circuit into which output data from the character generator ~ is inputted for generating various video signals suitable for a display device.
' ' -, - 2 - 202~2 llere ~ill he described o~eration of tlle prior display control device. The display address generator circuit 1 generates in a predetermined period a ctlaracter address as an address of the refrestl memory 7 corresponding to a display screen, and a raster address of a character to the character generator 8, The refresh memory 1, in whicll a character code has previously heen written corresponding to a display position on a display screen, and outputs as data a character code in an area addressed by the foregoing cllaracter address. The character code is inputted into lhe characler generator $ together with tlle foregoing raster address as a character address of a corresponding character font, She character generator o then outputs the character font as data, The video co~trol circuit 6 converts the olllput data from the charac~er generator 8 to a video signal for display, and supplies a si~nal suitable for the display device to lhe sam0. IlerchY, lhe rlisplay dev;ce displays tlle ,haracter on its display screcn, Th~ prior code refreslling display control rlev;ce is constructed as described above, and ~enerally incorporates a RAM as the refresh memory and a ROM or a R~M as the character ~enerator, requiring physically a plurality of types of indipendent memories and hence a compl;cated control circuit for a plurality of memory accesses, ~urttler, use of a plurality of types of memories makes ' :`
, - 3 - 2~2~
diflicult tlle realization of space saving Or a par~s packagillg area, of cost reduction, lowering of troubles, and so on.
Summary of the lnvention In view of tlle drawbacks with the prior art, it is an object of the present invention to provide a display control device which is capable of reduction of the number of parts as an entire device, space saving, cost reduction, and reliability improvement as a result of lowering troubles by providing a common mernory serving as the refresh memory and the character generator.
To achieve the above object, a display control device according to the present invention comprises a common memory 4 having functions as a refresh memory for outputting a character code and a character generator for generating a character font, a display address generator circuit 1 for generating a character address for designating a character code stored in said common memory 4 and a raster address for designating a character font, a line buffer 5 for stor;ng therein a character code outputted from said common memory 4, an address selector 3 for switching the character add.ress from said display address generator circuit 1 and the character code from said line buffer 5, and outputting a so-switchted signal to said common memory 4, a video control circuit 6 for .outputting a video signal based upon the - ~ - 202~
character font from said common memory 4, and a line buffer control circuit 2 for outputting a read/write access control signal tllat is to perform read/write operation with respect to said line buffer 5 based upon the raster address from said d i9p lay address eenerator circuit 1.
The above and other ohjects, features, and advanta~es of lhe invention will become more a~parent from the following description ~hen taken in conjunction with the accompanying drawings ~rief Des~Q~ the Dra _ngs ~ IG. 1 is a block diagram illustrating the construction of a character display system of a clisplay control device according to an emhodiment of tlle present invention: and EIG, 2 is a block diagram illustrating the construction of a cllaracter display system of a prior display control device.
Description of tlle Preferred Embodiment ~ eferring to ~IG. 1, the construction of a cllaracter display system of a display control device according to an emhodimenl of the present invention is illustrated in the form of a block diagram, As illustrated in the figure, designaled at 4 is a common memory having two functions, one of a refresh memory for outplltting a character code, the other of a character generator for generating a character font, 1 is a display address generator circuit for ' ,:' generating a characler address for designating a character code stores in the common memory 4 and a raster address for designatillg a cllaracter font, 5 is a line buf~er fol storing thereill a character code outplltled from the common memory ~, 3 is an address selector for switching a character address from the display address generator circui~ 1 and a character code from the line buffer 5, ~ is a video con~rol circuit for outputting a video signal based upon a cilaracter font from the common memory 4, and 2 is a line buffer control circuit for outputting a read/write access conlrol signal for instructing the line buffer 5 to effect read/write operation based ul)on a raster address from the raster address generator circu;t 1 and further outputtine a switching condition signal for the address seleclor 3 and an enable control si~nal for the video control circuit 6.
The common memory 4 comprises a one chip memory hav;ng a storage capacity more than the total sum of tilose of the refresh memory 7 and of the character generator o in the prior example. llerein, the common memory 4 may comprise a plurality of chips, but is rather desirable to comprise one chip memory in order to reduce the number of constituent parts. The line buffer 5 comprises a re~ister wh;ch has a storage capacity corresponding to the number of one horizontal display characters, and the like.
Operation of the embodiment constructed as described - ~ ~02~
ahove is as follows. When a raster address outputted from the disi)lay address generator circuit 1 indicates a head raster of a display character for example, the common msmory 4 starts to act as -the refresh memory. The line buffer control circuit 2 receives the rasler address from lhe display address generator circuit 1 and decodes the same to 31ldge whether or not it is a head raster, If the signal is tlle head raster, it outPuts a swilching condition signal to the address selector 3 such tllat the ctlaracter address from the display address generator circllit 1 is inputted into the common memory 4 dur;ng the one horizontal display period. 'rhe common memory 4 outputs a character code corresponding to the display screen by inputting therein the character address, The line buffer control circuit 2 also outputs to the line buffer 5 write control signals ~write access control signa~ such as a write enable signal and a write clock signal, etc., such that the character code outputted from the common memory 4 durin8 this perio~
is written into the line buffer 5, and furtller outputs a disable signal to the video control circuit 6 to mask the video signal to be outputted to the display device, When the raster address outputted from the d;splay address generator circuit 1 indicates a signal otller than the head raster, the common memory ~ acts as the character generator, At tllis time, the line buffer control circuit 2 . ~ ,~ , . . .
, - 7 ~~ ~2~
outputs the switclling condition signal to the address selector 3 such that a character code stored in the line buffer 5 is inputted into the common memory 4 as an address The common memory 4 outputs lhe character font previously stored tllerein by inputting the character code thereinto.
Additionally, llle line buffer control circuit 2 outputs various read control signals (read access control signa~) such as a read enable signal and a read clock, etc., to lhe line buffer 5 such that the line buffer 5 issues the character code written therein at the haed raster corresponding to the displaY screen, and outputs the enable signal to the video control circuit 6 to control tlle comnlotl memory 4 such that the character ront outputted from tlle common memory 4 is fed to the display device.
The display control device in the present embodiment described above can have tWQ types of functions of tlle refresh memory and the character generator with a memory of one type StlCh as a R~M by the use of the line buffer in which the CllaraCter code corresponding to tlle one llor;zontal display to stored. The common memory acting as lhe refresll memory and the character generator is first accessed as tlle re~resb memory by the character address outputte~ from the display address generator c;rcuit, and data stored in tlle common memory is stored in the line buffer. Successi~ely, the line buffer operates as the refresh memory Wlli]St a 2~2~9~
next line character is displayed, to outp(il the cllaracter code periodically, wllich is in turn received by the common memory that is hereby accessed as the cllaracter generator.
These operations are repeated corresponding to tlle number of lines following a format of the disl)lay screen to display the associated cllaracter on tlle display device.
It sllould be noticed that altllough in tlle above embodiment the block diagram only of the circuit of tlle character display system in the code refreslling display control device was illustraled for simpliri(ation, the embodiment i9 also applicable to a device incorporating an attribute control circuit for controlling a ruled lint3 and display colors.
Additionally, althougll in the above embodiment the case was described where the sing]e memory acts both as llle code refresh memory and the R~M character generator, a device incorporating the ROM character gGnerator in the prior example may also be applicable.
~ urthermore, although the case was described by way of an illustrative example where a character code was written in the line buffer at the head raster, it may be written at any raster, e.g., at a final raster, and any raster to be written may be set in a programmable manner. Moreover, although the video signal was made disable upon the character code being written into the line buffer, the video .
.
, ~2~
signal may be made enable at all times by controlling write timing by an external circuit. ~ddilionally, althougll in tl~e above embodiment, the line buffer control circuit, the address selector, and lhe line buffer were described as belonging in separate independent blocks, thsy may be united into a common memory control l)lock to reduce the number of required circuits as well as achieYe space saving Or a pRrts packaging area.
According to the present invention, as described above, the display control device comprises the common memory having the functions of the refresh memory and the character generator, the display address generator circuit for generating a character address and a raster address, the line buffer for storing therein a character code outputted from the common memory, the address selector for switching a character address from the display address generator circuit and a character code from the line buffer, and outputting a switched address to the comMon memory, the video control circuit for outputting a video sigllal based upon the character font from the common memory, and the line buffer control circuit for outputting a read/wr;te access control signal to the line buffer based upon the raster address from the display address generator circuit, whereby there can be assured the reduction of parts as the enlire device, space saving, cost reduction, and improved ~- 1 0 --202~
reliability by the reduction of troubles.
; ,",..,', ,;, : , , ., , ~, :
,: , ~ ~ ;,: . , .
Claims (4)
1. A display control device comprising:
a) a common memory having functions of a refresh memory for outputting a character code and a character generator for generating a character font;
b) a display address generator circuit for generating a character address for designating the character code stored in said common memory and a raster address for designating the character font;
c) a line buffer for storing therein the character code outputted from said common memory;
d) an address selector for switching the character address from said display address generator circuit and the character code from said line buffer to output a switched signal to said common memory;
e) a video control circuit for outputting a video signal based upon the character font from said common memory: and f) a line buffer control circuit for outputting a read/write access control signal for instructing said line buffer to effect read/write operation based upon the raster address from said display address generator circuit.
a) a common memory having functions of a refresh memory for outputting a character code and a character generator for generating a character font;
b) a display address generator circuit for generating a character address for designating the character code stored in said common memory and a raster address for designating the character font;
c) a line buffer for storing therein the character code outputted from said common memory;
d) an address selector for switching the character address from said display address generator circuit and the character code from said line buffer to output a switched signal to said common memory;
e) a video control circuit for outputting a video signal based upon the character font from said common memory: and f) a line buffer control circuit for outputting a read/write access control signal for instructing said line buffer to effect read/write operation based upon the raster address from said display address generator circuit.
2. A display control device according to claim 1 wherein said common memory comprises a one chip RAM.
3. A display control device according to claim 1 wherein said line buffer comprises a register having a storage capacity corresponding to the number of one horizontal display characters.
4. A display control device according to claim 1 wherein said line buffer control circuit outputs an enable control signal for the video control circuit and a switching condition signal for the address selector.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP01-254761 | 1989-09-29 | ||
| JP1254761A JPH03116194A (en) | 1989-09-29 | 1989-09-29 | Display controller |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA2026592A1 true CA2026592A1 (en) | 1991-03-30 |
Family
ID=17269514
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA002026592A Abandoned CA2026592A1 (en) | 1989-09-29 | 1990-10-01 | Display control device |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US5311213A (en) |
| EP (1) | EP0420291B1 (en) |
| JP (1) | JPH03116194A (en) |
| KR (1) | KR940000603B1 (en) |
| CA (1) | CA2026592A1 (en) |
| DE (1) | DE69021310T2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100207316B1 (en) * | 1996-08-06 | 1999-07-15 | 윤종용 | Information presentation apparatus of display |
| US6680738B1 (en) | 2002-02-22 | 2004-01-20 | Neomagic Corp. | Single-block virtual frame buffer translated to multiple physical blocks for multi-block display refresh generator |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4075620A (en) * | 1976-04-29 | 1978-02-21 | Gte Sylvania Incorporated | Video display system |
| NL179417C (en) * | 1976-06-22 | 1986-09-01 | Hollandse Signaalapparaten Bv | BRIGHTNESS CONTROL DEVICE FOR DISPLAYING VIDEO SIGNALS ON A GRID SCAN DISPLAY. |
| US4422070A (en) * | 1980-08-12 | 1983-12-20 | Pitney Bowes Inc. | Circuit for controlling character attributes in a word processing system having a display |
| US4345244A (en) * | 1980-08-15 | 1982-08-17 | Burroughs Corporation | Video output circuit for high resolution character generator in a digital display unit |
| DE3138930C2 (en) * | 1981-09-30 | 1985-11-07 | Siemens AG, 1000 Berlin und 8000 München | Data display device |
| BE891911A (en) * | 1982-01-27 | 1982-05-17 | Europ Agence Spatiale | DIGITAL DEVICE FOR CONTROLLING THE GRAPHIC REPRESENTATION OF CHARACTERS |
| US4595996A (en) * | 1983-04-25 | 1986-06-17 | Sperry Corporation | Programmable video display character control circuit using multi-purpose RAM for display attributes, character generator, and refresh memory |
| GB2202720B (en) * | 1987-03-27 | 1991-04-17 | Ibm | Raster scan display system with random access memory character generator |
-
1989
- 1989-09-29 JP JP1254761A patent/JPH03116194A/en active Pending
-
1990
- 1990-09-26 KR KR1019900015249A patent/KR940000603B1/en not_active IP Right Cessation
- 1990-10-01 EP EP90118785A patent/EP0420291B1/en not_active Expired - Lifetime
- 1990-10-01 DE DE69021310T patent/DE69021310T2/en not_active Expired - Fee Related
- 1990-10-01 CA CA002026592A patent/CA2026592A1/en not_active Abandoned
-
1992
- 1992-09-16 US US07/946,801 patent/US5311213A/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| DE69021310D1 (en) | 1995-09-07 |
| EP0420291A2 (en) | 1991-04-03 |
| KR940000603B1 (en) | 1994-01-26 |
| US5311213A (en) | 1994-05-10 |
| JPH03116194A (en) | 1991-05-17 |
| KR910006909A (en) | 1991-04-30 |
| EP0420291A3 (en) | 1991-08-14 |
| EP0420291B1 (en) | 1995-08-02 |
| DE69021310T2 (en) | 1996-01-11 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EEER | Examination request | ||
| FZDE | Discontinued |