CA2162187A1 - Bridge Between Two Buses of a Computer System that Latches Signals from the Bus for Use on the Bridge and Responds According to the Bus Protocols - Google Patents

Bridge Between Two Buses of a Computer System that Latches Signals from the Bus for Use on the Bridge and Responds According to the Bus Protocols

Info

Publication number
CA2162187A1
CA2162187A1 CA2162187A CA2162187A CA2162187A1 CA 2162187 A1 CA2162187 A1 CA 2162187A1 CA 2162187 A CA2162187 A CA 2162187A CA 2162187 A CA2162187 A CA 2162187A CA 2162187 A1 CA2162187 A1 CA 2162187A1
Authority
CA
Canada
Prior art keywords
bridge
pci
bus
pci bus
control signals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA2162187A
Other languages
French (fr)
Other versions
CA2162187C (en
Inventor
Sagi Katz
William Alan Wall
Amy Kulik
Daniel R. Cronin, Iii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of CA2162187A1 publication Critical patent/CA2162187A1/en
Application granted granted Critical
Publication of CA2162187C publication Critical patent/CA2162187C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4027Coupling between buses using bus bridges
    • G06F13/405Coupling between buses using bus bridges where the bridge performs a synchronising function
    • G06F13/4054Coupling between buses using bus bridges where the bridge performs a synchronising function where the function is bus cycle extension, e.g. to meet the timing requirements of the target bus

Abstract

A computer system having an ISA bus and a PCI bus is provided with a PCI to ISA
bridge having certain imbedded functions performed by PCI slaves on the bridge. In order to implement the bridge in slow CMOS technology, the PCI control signals are latched on the bridge. Since the PCI slaves on the bridge cannot respond with control signals on the PCI bus fast enough to satisfy the PCI bus protocol due to this latching, a logic device is provided on the bridge. The logic device monitors the unlatched master-slave control signals carried on the PCI bus, and in appropriate situations, drives the control signals on the PCI
bus (within the time specified by the PCI bus protocol) that the PCI slaves would normally drive but are unable to within the time necessary to meet the PCI bus protocol.
CA002162187A 1994-11-30 1995-11-06 Bridge between two buses of a computer system that latches signals from the bus for use on the bridge and responds according to the bus protocols Expired - Fee Related CA2162187C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/351,186 US5664124A (en) 1994-11-30 1994-11-30 Bridge between two buses of a computer system that latches signals from the bus for use on the bridge and responds according to the bus protocols
US08/351,186 1994-11-30

Publications (2)

Publication Number Publication Date
CA2162187A1 true CA2162187A1 (en) 1996-05-31
CA2162187C CA2162187C (en) 1999-08-24

Family

ID=23379928

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002162187A Expired - Fee Related CA2162187C (en) 1994-11-30 1995-11-06 Bridge between two buses of a computer system that latches signals from the bus for use on the bridge and responds according to the bus protocols

Country Status (14)

Country Link
US (1) US5664124A (en)
EP (1) EP0795158B1 (en)
JP (1) JP3838278B2 (en)
KR (1) KR100192724B1 (en)
CN (1) CN1089463C (en)
AT (1) ATE176341T1 (en)
BR (1) BR9505207A (en)
CA (1) CA2162187C (en)
CZ (1) CZ9701508A3 (en)
DE (1) DE69507636T2 (en)
HU (1) HU217405B (en)
PL (1) PL180351B1 (en)
RU (1) RU2140667C1 (en)
WO (1) WO1996017303A1 (en)

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Also Published As

Publication number Publication date
HU217405B (en) 2000-01-28
PL180351B1 (en) 2001-01-31
CZ9701508A3 (en) 2002-05-15
HUT76791A (en) 1997-11-28
RU2140667C1 (en) 1999-10-27
EP0795158A1 (en) 1997-09-17
WO1996017303A1 (en) 1996-06-06
EP0795158B1 (en) 1999-01-27
BR9505207A (en) 1997-09-16
KR100192724B1 (en) 1999-06-15
ATE176341T1 (en) 1999-02-15
JPH08235103A (en) 1996-09-13
CA2162187C (en) 1999-08-24
KR960018934A (en) 1996-06-17
CN1153352A (en) 1997-07-02
CN1089463C (en) 2002-08-21
JP3838278B2 (en) 2006-10-25
US5664124A (en) 1997-09-02
PL320020A1 (en) 1997-09-01
DE69507636D1 (en) 1999-03-11
DE69507636T2 (en) 1999-08-05

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