CA2169961C - Interference suppression in cdma systems - Google Patents

Abstract

Circuitry and concomitant methodology for demodulating Direct-Sequence, Spread-Spectrum Code-Division Multiple-Access (DS/SS
CDMA) channel signal using multiple samples per transmitted symbol and a minimum mean squared error criterion to suppress interference.
In one embodiment, a bank of cyclically shifted filters (502) determined with reference to the conventional matched filter (401) for CDMA
is used to demodulate the channel signal. In another embodiment, a bank of sub-filters (601, 602) determined with reference to the conventional matched filter (401) for CDMA is employed to demodulate the channel signal. In yet another embodiment, the output of a conventional matched filter is oversampled to demodulate the channel signal. Each embodiment utilizes a set of adaptive coefficients selected to minimize the mean square error between the transmitted symbol and detected symbol.

Description

WO 95/08890 ~ ~ S ~ PCT/US91/10430 INTERFERENCE SUPPRESSION IN CDMA SYSTEMS

Field of the Invention This invention relates generally to digital systems and, more specifically, to circuitry and a concomitant methodology for demodulating 5 direct-sequence spread-spectrum code-division multiple-access signals in the presence of interference.

R~. kground of the Tnvention The potential demand for ubiquitous wireless communications combined with restricted availability of the radio frequency spectrum has 10 motivated intense research into bandwidth efflcient multiple access schemes. A
recent reference entitled "Spread Spectrum for Commercial Communications", by Slhilling et al, as published in the IEEE Communications M~E~ine, Vol. 29, No.
4, April 1991 generally discusses various spread-spectrum techniques to effect multiple access commllnication and, in particular, one especially attractive 15 avenue of approach, namely, Code-Division Multiple-Access (CDMA) techniques.
CDMA techniques take advantage of available bandwidth on the tr~n~mi~ion medium, such as a fiber optic cable or the radio spectrum, by generating a set of pulses in the time domain which have appropriate correlationpropertles over predetermined time periods. Typically, the correlation property 20 is such that a particular receiv~:r tuned to a given transmitter code produces a detectable signal whenever the given transmitter code is presented to the receiv~r during each time period, whereas the output of the receivel is near zero for anyother transmitter code presented to the receivt:r. A CDMA system operating on this time domain correlation property and utilizing a set of codes dP~ign~ted the 25 optimal orthogonal codes was disclosed in U.S. Patent No. 4,779,266; optimal orthogonal codes are but one type of more generic Direct-Sequence Spread-Spectrum (DS/SS) CDMA codes.
Demodulating a DS/SS CDMA signal in the presence of multiple-access interference has been previously addressed in the prior art. As alluded to 30 above, the set of DS/SS waveforms assigned to different users are chosen to have small cross-correlations. This enables reliable communication of several DS/SS
signals simultaneously over the same channel provided that all tr~n~mi~ions are receil~d at approYimate'y the same power. When there is a large disparity in receilred power~, howe~rer, the nonzero cro~correlation9 between the signals gives ri e to the "near-far" problem, that i9, a high-power trs~l-mi~-sion interfere~
significantly wit_ t_e reception of a low-power trsn~mi~iQn w_en a conventional 5 n~strhe~ filter rec~ . (or equiYalently, a correlation rec~ r) i~ used.
T_e near-far problem can be miti~a'ed, a~ taught in the prior art, by interference ~u~pre~ion ~--h~mP~ w_ich use ~ignal l~roc~ -g to exploit the structure of the mulllple IsY~c~ interference in-t~--l of treating it a~ noise.
theJe ~ m~ are 5-ilnittcDr~tly more compl~Y than the mqt~l~et filter 10 r~cei~ nd they nquile l~v~/ledp of t_e interfering -ignals. Rep.e~.tati~e of 9UC_ technique~ i9 t_e ~ubject matter cv~ d in the referençe entitled 'Near-far Re~tsnce of Multiplier Detector~ in A~nchronou,, ChPnn~ EEE
Tra~sactio~ Ol~ CC.~ ~ics~ion~ Vol. COM-38, No. 4, pp. 496-508, April 1990 g9 p~ hed by R. Lup~ and S. Verdu. Hence, recent prG~e 1- for 15 demot~ls~i c ~ of DS/SS CDMA ~tem~ slly doume a mst~l~ 1 filter rece~ ~t teal ~ith the ne r-f-r problem br controlling the power at the filter input~, t~pically udng fee~ from the rece:~.. Such an _rranbe~ent is c~ d in the reference entitled ~Ou the Cap city of a Cellul_r CDMA sgstem,~
EEE Trs~ ~tio~ on Vehicular Technolo~, Vol. 40, No. 2, pp. 303-311, May, 20 1991, a~ publi~hed by K. S. Gilhou~, et al.
Sym~Dl b~-~mbol demodulation wing the MMSE criterion can ger~ally be imple~-ented adOpti~ely, ~rhen the parureter~ of the multiple 3cc-irterference are u~o~. Thi~ Pl;m;r-t~ one of t~o bi~e~t d~ of i~t~fere~lce ~uppre~iou techuiqu~ p~c,~a thw f r, ~hich t/~ ly require 25 Ic~o rled~ of tho interferi~lf Jign~b. MMSE tec}ulique ha~e been u~et in equ~U~ntiou (d pre~ted ir the t~t Di~i~l Comm~ tior, by E. A. Lee ~t D. G. Me~chmitt, publiJhet b~ Xlu~rer, 1988) and croo~tallc ~uppre~io~
in ~ire cha~eb (i~ n paper entitled 'Suppre~ion of Near- and Far-end Cro~tallt by Li~lear Pre- and Po~t-filtering,~ E13E Joumal on S~b:ted Are~ in 30 Co-~ ication, Vol. 10, No. 3, April, 1992). Al~o, it i~ uoted that a related lea~t-~qua~e~ criterion h~ been prenou~ly ~ F~ (in the article entitled ~A
Family of Su~Ft;mum nate tor~ for Coherent Multiu~er Communication~
EEE Jourual of Selected Are~ of Cc~ tion, Vol. 8, No. 4, pp. 683-690, May 19~0) for ~equence d~t~t:o~ in the preJe~lce of mu~ ,lt ~cc~ interference.
35 The latter ~cheme i~ estremely complicated ~d hence b gen~ally not DmPn~ble to continuou~ ataptation.
The art iJ deroid of t~-~h;n~ or ~ugge~tio~ of applyi~g the MMSE

. .~.

2 1 ~ ~ 9 6 I PCT/US9 ~/lW30 ~ - 3 -technique to the demodulation of DS/SS CDMA signals.

Su~mmary of the Invention These deficiencies as well as other shortcomings and limitations of the prior art are obviated, in accordance with the present invention, by circuitry S and a concomitant method for demodulating the received DS/SS CDMA channel signal using a minimum mean squared error criterion to suppress interference.
Broadly, in accordance with a first aspect of the present invention, an overall co~unication system is composed generally of a plurality of sources andL a plurality of receivers interconnected by a communications ch~nn~l The 10 channel propagates DS/SS CDMA signals produced by the sources; each source isassigned a preselected CDMA signature sequence, and similarly each receiver selects or is assigned a predetermined CDMA signature sequence corresponding to the desired tr~n~mi~ion. Demodulation of an incoming DStSS CDMA ~h~nn~l signal i8 ~ffecte~l in each leceiv~:r by sampling the incoming channel signal at a 15 rate corle~,~onding to the processing gain of the CDMA l~h~nn~l signal to produce a sampled incoming signal. The sampled incoming signal is connected to a bank of D filters (wherein D iY bounded by the processing gain), each filter being a cyclically shifted version of a standard matched filter used to conventionally detect the incoming DS/SS CDMA signal. The output of each of the D filters is 20 then sampled at the symbol rate of each symbol being conveyed by the DS/SS
CD~A signal. Each sampled output of each of the D filters is then weighted by a corresponding adaptive coefflcient to obtain a weighted sampled output; the set of coefflcients is adaptively selected to minimi~e the mean squared error between the transmitted and received symbols. All of the weighted sampled outputs are 25 sllmmed to produce an estimate to the transmitted symbol propagated from the corle.,~onding source by the incomin~ DS/SS CDMA ~ignal.
Broadly, in accordance with a second aspect of the present invention related to the first aspect of the present invention, an overall coInmunication system is composed generally of a plurality of sources and a 30 plurality of leceivt:l~ interconnected by a communications channel. The channel ~ ~ propagates DS/SS CDMA signals produced by the sources; each source is assigned a preselected CDMA signature sequence, and similarly each receiver selects or is assigned a predetermined CDMA signature sequence corresponding to the desired tr~n~mi~ion. To demodulate an incoming DS/SS CDMA channel 35 signal, the signal is sampled at a rate corresponding to the processing gain of the CD~lA system to produce a sampled incoming signal. The sampled incoming -~ignal is connected to a bank of D sub-filters (wherein D i~ boundet by the proc~ g gain) selected with reference to a stantard matchet filter used to comrentionally detect the incoming DS/SS CDMA signal. The output of each of - the D sub-filters i9 then sampled at the rate of D times the original ~ymbol rate 5 of each ~nbol being conlreyed by the DS/SS CDMA signal. Each sampled output of each of the D filters ~enes as an input to D delay lines. Output~ fromp,~determiired one~ of the tapJ in each of the delay lina are combined to ,~rod~ se a ~et of D interrneti~ signal~. Each of the D inter,mediary signals isthe~ ~ple~l at the ~ bol rate to protuce inkrmediar~ ~amplet outputs. Each 10 of the intermediary ~o~pled o~ p~ iJtherl ~eightet by a corr~-~oT~ling atapti~e ~c~ n:~;n -t to obtai~ a weighted ~amplet output; thie ~et of coefflcients iJ ad~ti~ e tE~ to minimi-e the mean squaret error ~ e~i thie traD~mittet anid lecei~t symbob. All of the weighitet so~npled Gu~ are ~.. - -~d to protuce an estimate to the tron~n tt~ symbol propagated from the15 correJpollidinig ~ource.
ly, in accortance with a thirt ~pect of the pre~ent hrention, au o~erall commun -- t 0~ tem i~ co- ~p~ generall~ of a plurality of sources allt a pluralitr of ~c~:~;. intercor~ cted by a c~ irat;~ cl~or~ The cha~el ~r~g~t~ DS/SS CDMA ~ign-l~ produced b~r the JourceJ; eac~ source is 20 ~ignet a pre~ t~t CDM~A~-ture ~equence, ~d simil rly each ~cc~
select~ or iJ ~ig~et a predeterminet CDMA dg~ature ~equence corrapon~ling to the dedred tr~niJJiou. To temodulate Ul incomillg DS/SS CDMA channel sigual, the Ji~l iJ ~mpled ~t ~ r-te co~ponding to the proce~ing gain of the CDMA ~tem to protuce ~ J-mplet incomiug d~_,l. Thc Jamplet incom~g 25 ~i~l ~ ~ thc input to ~ ~t~rd m-tchod ~Iter cho~ to con~eutioually tetect the incomiD~g DS/SS CDMA d~. The t pJ of the ~tsndart n~9t~
~ilter are ~ei~hted in corre~pondence to the elemeutc of the d~ature ~equence ~i~et to the temodul-tion proce, ~d the ~eig~ted outJ,~ are ~ ~ ~n~l to produce a ~cighted incoming J~ al. The ~eighted i~lcomillg ~ignal i~ ~ampled at 30 D time~ the qmbol rate (~rhereiu D i~ bounded b~ the proce~ing ga~) to produce a ~reightet, ~mplet ~ rhich ~ an input to a tapped delay '' li~e; the number of tap~ in the telay line i~ ~electcd with refaence to t~e parameter D. r~ termi~ed output~ from the tapped tela~ line are further weighted ~ith adapti~e cc ~ > and the ~eighkd telay line output~ are 35 combhed to produce a~ atim te of the tece;~.~ ~mbol. The ~et of co~iriPnt~
i~ adal,ti~ l~ #lected to min;m ~o the mean ~ ~l error bet~een the L~itt~d and recc;~.~d ~mbol~.

WO 95/08890 PCT/US9~110430 ~ q~

The organization and operation of this invention will be better understood from a consideration of the detailed description of the illustrative embodiments thereof, which follow, when taken in conjunction with the accompanying drawing.

5 Rrjef Description of the Drawin~
FIG.l depicts, in block diagram form, the communication system under consideration in accordance with the present invention;
FIG. 2 depicts the r~l~t;on.~hip between a data symbol stream generated within a source and the rate-increased chip bit stream prop~g~te(l in 10 colle~ondence to the data symbol stream;
FIG.3 illustrates a conventional matched filter to detect a DS/SS
CDMA signal in a given receiver having a pre-determined signature sequence;
FIG.4 illustrates an equivalent representation for the matched filter shown in FIG.3;
FIG.5 illustrates one illustrative embodiment of a cyclically shifted filter bank for the case of D=2;
FIG.6 illustrates one illustrative embodiment of a bank of sub-filters for the case of D=2 collé~onding to the short filter bank re~li7~tion ofthe filter in FIG.5;
FIG. 7 illustrates one illustrative embodiment of a cyclically shifted filter bank for the case of D =3;
FIG.8illugtrates one illustrative embodiment of a bank of sub-filters for the case of D =3 colle~onding to the short filter bank re~li7~tion of the filter in FIG.7;
FIG.~ illustrates one illustrative embodiment of a filter arrangement corlesl onding to the oversampling technique for the case of D=2;
FIG.10 illustrates one illustrative embodiment of a filter arrangement corresponding to the oversampling tec~nique for the case of D =3;
FIG.ll illustrates one illustrative embodiment of a cyclically shifted filter bank for arbitrary D;
FIG.12 illustrates one illustrative embodiment of a bank of sub-filters for arbitrary D collej~onding to the short filter bank realization of the ~ filter in FIG.ll; and FIG.13 illustrates one illustrative of a filter arrangement corresponding to the oversampling technique for arbitrary D.

WO 95/1;~8~90 PCT/US9~/10~30 ~ ~ ~9 6-Detailed Description In this description, so as to gain an insight into the underlying principles in accordance with the present invention, a motivating overview of a basic aspect of the present invention is initially presented. This approach has the 5 added advantage of introducing notation which will further aid in understanding the broad aspects of the present invention. After this introduction, a theoretical basis is then presented to provide additional insight into the circuitry and methodology which are presented during discussion of the motivating example.
MOTIVATING OVERVIEW
The general communications system 100 under consideration is depicted in block diagram form in FIG. 1. In system 100, Ms sources 101,102,...,103 are arranged to communicate with Nr receivers 111,112,...,113 over interposed ~h~nnel 121, which is representative of a medium such as a fiber optic link or the radio spectrum. (Although FIG. 1 shows Ms sources and Nr receivers, 15 the demodulation techniques in accordance with the present invention are applicable as well to the special cases where there is only one source or only one receiver (MS=1 or Nr=1), that is, the cases wherein a single source transmits tomultiple receivt:l~, or multiple sources transmit to a single receiver.) The ~h~nn~l 121 under consideration for imm~ te discussion 20 purposes is illustratively of the type that is linear and propagates both positive and negative electrical signals having amplitudes which fall within a given dynamic range. However, signals ~m~n~t;ng from soulces 101, 102, ..., 103 on leads 141, 142,..., 143, fl~ n~te l by signature signals Si, i=1,2,...,MS, respectively, provide a bit strea_ of rate-increased two-level level si~n~lc; without 25 loss of generality, one level i~ +1 and the other level is -1 on a norm~li7e 1 basis.
Each rate-increased stre~m Si corresponds to a similar symbol stream produced within each source 101, 102, ..., 103, respectively, as discussed shortly. Sincechannel 121 supports multi-level ~ign~l~, if, for example, two sources both propagate +1 bits during the same time interval, the level of the signal on 30 channel 121 during this time interval is +2.
The composite signal on channel 121 due to all Si's is the M~
superposition of all Si's and is represented by SO=~,Si. Each lead 151, ..., 153 ~m~n~ting from channel 121 serves as an input to and provides composite signal SO to receivers 111, ..., 113, respectively. It follows from this description that all 35 signatures Si, i=1, ..., Ms, share substantially the same frequency band on channel 121.

For the illuJtrative example, each signature 9ignal Si is constraised in time such that sources 101, ..., 103 initiate a tr~n~miC~ion or information interchange in synchronism. One con~entional approach of achieving this synchronism is the use of a clock (not shown) to generate timing signal~ to 5 control synchrQni~t;on and framing among source~ 101, ..., 103. Rccc;~
..., 113 are in synchronism with source~ 101, ..., 103, which "train~ recei~c.s 111, ..., 113 udng any of the well-known training technique~ to pro~ride the requisite Jynchroni~ti~n- (ThiJ synchrQni7~tiQn constraint can be relaxed in the most general ca e in which a 3G-~rce rec4i~. pair haring Si ~ a ~igr~t~re sequence is10 Jynchroni-ed, but all other Sj~J~ CereC6;~e~ pairs need not be ~ynchronized with the Si pair.) A primary fi~r~Ct;~n of each source 101, ..., or 103 i~ that of con~erting each data symbol generated within the source to a predetermined rate-incre--e~ bit ~tream corrapon ~ to gi~en data Jymbol, as generally 15 tepicted by dgnal 200 in FIG. 2. Linc (i) in FIG. 2 depicts three contiguow data ~ymbols, uamely, the +1,-1,+1 Jymbol ~tream produccd within, say for t~ cu~oi~n ~u~l~o~u, source 101 at the Jymbol rate; the time turation of a Jymbol is de~ignated a~ duration 201 in FIG.2 and is dcnoted by T.
Line (ii) in FIG. 2 r-pre~tJ a rate-increa~ed output pul~e ~tream, 20 ~ay Sl from ~ource 101, corre pondint to th- Iine (i) ~nnbol stream. A~ ~hown, a rate-iuc, ~-e~ d~ature stream of (+lrl,+l,+l,-l,-l) le~el pul~ is propag~tet for each ~1 in the lo~-rate d~ta ~mbol stream; ~m.~.-., the negati~e of this sigllature ~tre m iJ prc~apte~ for eac}l-1 in the lo~r-rate ~mbol Jtream.
I~l the rato-incre Jed d-ta tre m Jho~ i~ line (ii) of FIG. 2, (also 25 refcrred to ~ ~ ~dg~ture~ of the ~ochtet ource Sl) ~ framc corre~pondJ to a ~mbol ha~iDg ~ turstion T, ~d the time iuter~al of each +1 or -1 le~el in the r~te-incre~ed Jtream i~ deJi~r~tol the chip duratio~l 202 a~d u de~oted Tc~ The r~tio T/T, i~ called the 'proceJ in6 t~ a~d the ratio i~ de~oted b~r N
(N=T/T~). Therefore, each fr mc iJ CO~I.Q~' of a fiset number N of so-called 30 'chip~; iD FIG. 2, N=6, ~o d~ +1 uld-1 chip~ ~m9n9e- from Sl during each frame. Thw, the ~ ature for ource 81iJ the orderet ~ct (+1,-1,+1,+1,-1,-1).
I~l order to colnm-.ni-~te e~ecti~el~ within ~y~tem 100, each ~i~nst~-e Si,i=l,...,M~, a~ produced b~ it~ ed ~ource in re~ponJe to each input ~rmbol, m-y not be ~ t~ arbitraril~, but mwt be c refully chosen to 35 achielre e~icient, error-free c~ 9tj-- Thi~ mea~ ~ 911y that each S
mu~t be Jelected in ~ie~ of all the oth~ Si'~ ba~ed on ~uch co~iderationJ a~
number of ource~ M~ aud the ba~t..;dlh of cha~el 121. The~e cQ~ ation~, _ .~.~ . .

in turn, depend on the system requirements and tr~nq.ni~sion characteristics.
Procedures for selecting sets of signature~ Si,i=1,...,M9 which e~ect efficient informstio~ interchange for a gi~en number of chips ant sources are known i~
the art. (E.g., see U.S. Patent No. 4,779,266). An example of another signature,S to be wed ~hortly in di cus9.ng interference during temodulation, generated with reference to the abo~e-itentified ~i~sture (namely, (+1,-1,+1,+1,-1,-1)) is the signature gi~ell by the ordcrc~ ~et (+1,+1,-1,+1,~1,+1).
The e~ent;ol f~ncti~n of each rece;~.. 111,...,113 i~ that of discrimin~t:n~ within the composite signal SO the preassigned ~igr Pt-~re 10 asscc;ste~ with each recei~Gr 111,...,113. In one con~rentional arrangement, each rccei~, 111,...,113 is implemented by mst~l~e~ filter, as now dhcu~ed with reference to FIG. 3.
In FIG. 3, there is ~hown !a standard matched filter 300 hr the speciEic caJe of ~ix chip podtion~ in a rate-in~eu~' data ~tream. The input, lS ~hich a~pc~,. on lead 301, repre~ent~ a ~t~1 one of the rece;~,~ lead~ 151,....
or 153, ~ay lead lS1 for concretene~. The signal ap~c..mg on lead 301, dP~;~P~e~ r(t), i~ equal to the ~ignal SO plw additi~e noise prescnt on leat 151at the input to .ec~:~Or 111. In general, r(t) i~ a continuow time ~ignal. This continuow ~ignal i~ co~led to ~ 9~ npl~l data dgnal by sampler 310 which 20 ~npl r(t) at the chip rak Tc; for the ~ec;~c Pyp~nple under co~ ation, six samples of r(t) are taken in each fr~e--the Jample~ are ~l~n~te~ by the ~et r(k), r(k-1), r(lc-2), r(k-3), r(k-4), ant r(lc-5), ~ith r(k) bein~ the late~t ~ample taken and r(lc-5) correJpo~di~g to the earlieJt ~mple in a frame. In order to ha~e acce~ to all d~ J mple~ for temotulation purpo~, the ~ample~ are Jtored in 25 ~hift regi~ter 320 compo~ed of fi~e dela~ eleme!nt~ 321-325 ~h~ei~ e ch delay elem~t pro~ide~ a dely of Tc ~econdJ bet~een it~ input a~ld output. To ge~erate the o~er U filter output ~ appeariug o~ lead 361: (i) the ~ pl~ r(k) O,. ,5) are eacll multiplied by a pre-~pecified cc~ t (allk], Ic--Q,. .,5 ~ho~ br reference numeralJ 341-34~, reJpecti~el~r) in m~-itiplier~ 341-3~B, 30 re~c~ti~ , to obtai~ re~ultant product~; (ii) the res~llt~t ~rod~ct~ re ~ummet in summer 350, with the re~ultant Jum appearing on leat 351; aut (iii) the re~ulta~t ~um i~ J~mpl~l by ~ampler 3B0 at the frame rate 1/T to produce the output Yl- (Typicall~, Yl iJ proce~ed ~ a thre~hold ~ te t, (not ~hown) to yield a bit teci~ion corre~ponding to the e~timate of the ~e~ ,..t ~rmbol; i~ the 35 rl~ms;~ler of the di~cu~Jion, ~uc~ a con~rentioual threJhold dete:tor i~ p~ ed to exi~t, although it i~ not dw~ for JaJCe of claritr.) ID thc ;..~pl~ Qtatior~ of filter 300, ~nple ~(k) iJ multiplied by co~ t a1¦51~ r(lc-1) ~ a1l4l, ~--~ and WO 95/08890 2 1 6 9 9 6 1 PCT/USg~ll0l30 g r(k-5) by a1[0]. In general, the a1[i]'s correspond to the signature sequence assigned to the given receiver. If it is assumed that matched filter receiver 300 is configured to demodulate the first above-identified signature sequence (+1,-1,+1,+1,-1,-1), then the a1[i]'s are assigned in reverse order to the signature 5 sequence, that is, a1[0] = -1, a1[2] = -1, a1[2] = +1, ~--~ a1[5] = +1- Thus~
whenever a data symbol is transmitted by a source ~ign~d the same signature, Y1 achieves peak correlation, which in this case is the value +6 or the peak correlation value equals the number of chips. This occurs since r(k)=a1[k], k=1,...,5 if there are no interferers (that is, no other signatures) present and the 10 noise is negligible, and r(5)a1[5] + r(4)a1[4] + ...r(O)a1[0]= +6. For comparison, on the other hand, if r(k) corlesl.onds to the second signature given above, then Y1 equals -2 since r(5)a1[5]= -1, r(4)a1[4]= -1, ~--, and r(O)a1[0]= +1-To reduce the complexity of the description in the remainder of thediscussion, matched filter 300 of FIG. 3 is shown in short-hand representation by 15 filter 400 in FIG. 4 since filter 400 sets forth the essence of matched filter 300.
Filter arrangement 401 equates to the circuitry encompassed by elements having reference numerals 310-346 in FIG. 3, and sampler 402 equates to sampler 360.
In accordance with one aspect of the present invention, called the cyclically shifted filter bank (CSFB) arrangement, an exemplary filter 20 arrangement 500 utilized in each receiver 111-113 is depicted in FIG. 5 for the same signature sequence allk], k=0,1,...,5, discussed with reference to the arrangements of FIGS. 3 and 4. Filter 501 is actually the matched filter 401, asrepresented by FIG. 4. However, filter 500 is composed of a second filter 502, operating in parallel with filter 501, which is a shifted version of matched 25 filter 501. (In a later section, as will be discussed, filter 500 is the result of selecting the value of two (2) for a parameter d~iEn~te1 D in that section; D
co~ onds to the number of samples to be taken per source symbol in each frame and, in effect, determines the number of matched filters, such as filters 501 and 502, to be placed in parallel.) To derive filter 502 from filter 501, filter 501 is 30 shifted three positions to the right so that a1[2] occupies the position colle:j~onding to al[5] of filter 501, al[l] occupies the same position as al[4], and ~ so forth; as depicted, the shift equates to 3TC chip positions or, equivalently, T/2 (T/D) chip positions. The output of filter 501, appearing on lead 503, serves asan input to sampler 510, which samples at the original symbol rate T. Similarly,35 the output of filter 502, appearing on lead 504, serves as an input to sampler 511, which samples at the original symbol rate T. The output of sampler 510, iEn~ted Yl~ serves as one input to multiplier 520. The other input to multiplier 520 i9 a~l adaptively-~elected coefficient, d~cig~tet cl; its selection and f~lnctiQn are ~swss~ below. Similarly, the output of sampler 511, ~le~ign~ted Y2.
serre~ a~ one input to multiplier 521. The other input to multiplier 521 i~ an adapti~ely ~e1~ tt~ coef~irient, t~ n~ted c2; its selection ant function are 5 discu~sed below. Finally, the output~ of both multipliers 521 and 522 serve asinput~ to ~ 531, with the output (u) of summer 531 re~ e~.ting the ~ymbol detected by tbe gi~ren rcc~
T~e eet of cc ~ te (cl,c~) i9 selected ~o aJ to minimi o the mean Jquare error kh ~ the tra~ t~d and tetected ~ymbol. The~e coeffirients 10 may typically be determined adapti~ely by e"e~uti~g a training ~ession on arrangement 500 prior to the tra~mi~ion of any actual data ~rmbols.
To illuetrate the effecti~ene~ of the MMSE te~h~ique~ a numerical example i~ mo~t illrmin~t;ng- It i~ a~umet that two sources may be tran~mitting qmbob (~ay ~ource 101 and 102 in FIG. 1), with eource 101 having lS a ~ ature ~equence gi~ abo~e br the a1li]'e, namel~r, a~ repre~ted by the Jet(1,-1,i,1,-1,-1,), and with ~ource 102 ha~ing the ~igrst--re eequeuce gi~ren abo~re b~ the a2[jl's, namely, a~ ~e"r~~ _t~ b~r the ~et (1,1,-1,1,1,1). The focu~ i~ on the t~l~.lation J-~Pm~ ~t one rece;.cr (say recei~. 111) which h~ a signature ~equence corre~p~n~3;n~ to ~ource 101, namely, the .ien~t-~-e ~et (1,-1,1,1,-1,-1).
20 Accort~gly, Jource 102 ma~ be condderet an interf~er ~ith re~pect to ~ource 101-rec.~;.~ 111 p ir. The rcc~ d cha~el Jignal for a giren frame, after ~amp~g, iJ ~~1, k - 0,1, .,5. For k=0, ~(0)- ~blallOl + ~b",lO¦ + n(0), where b~ i~ tlle D~ (+1 or -1) producet b~ ~ource 101, b~ i~ t~e Jymbol 25 produced b~ ~urce 102, P~ i~ the relati~e po~er of ~ource 102 comparet to Jol rce 101, s~d ~(0) iJ Gau~iau uoi~e ha~riDg a ~ero mean ant a ~ariance of ~r2.
T~w, gen~~ r, for Ic--0,1, . ,5, + ~b2~2P~I + n(l~)-A~ume for the momeut that ~ource 102 i~ not tra~mitting ant 30 that the co~l~entional m~t~~t~ filter 300 i~ implemented iD I~C~ 111; then the Jig~'l t~ uoi~e ratio of ~ource 101~ mea~uret at the output of rec~ r 111, ~lP~ te~l SNRl, iJ SNRl = N/o~. For the Jake of CQ~p~iJo~ of actual - ~.u~ic~l ~alueJ, Juppo~e a~ uc~ that SNRl = 15 dB. Now, if ~ource 102 i~tra~m;tt;~ Jimultaseou~ly with Jource 101, if the noiJe power iJ a~umed to be 35 the ~u~e ~ when wurce 102 wa~ not tra~mitting, and if ~ource 102 ~a~ a relati~re power P2, then a ~e~ meuure, called the ~i~al-to-interfercnce ratio (SIRl),iJ inticati~e of the ~tre~gth of Jource 101 relati~e to both the atditi~e wo 95/08890 2 1 6 9 9 6 1 PCT/US9~/10430 noise and the interference from source 102; SIRl is commPn~urate with SNRl, and the two measures coalesce when source 102 is not active. Again, for the sakeof comparison purposes, suppose the relative power of source 102 is 5 dB greaterthan source 101, that is, lOloglOP2 = 5. Then, SIRl = 4.2 dB for receiver 111 5 implemented with the conventional matched filter 300.
Suppose now that receiver 111 is implemented with filter arrangement 500, that both source 101 and 102 are transmitting simultaneously, that the noise power the same as in previous computations, and that the relativepower P2 remains as 5 dB, and that coefficients c1 = 0.73 and c2 = 0.69 (which 10 were determined by minimi~ing the MMSE between transmitted and detected symbol), then SIRl = 13.3 dB.
To recap, for the conventional matched filter 300, SNRl = 15 dB
(a measure of the best signal strength to be expected with source 102 inactive and additive noise present), but SIRl = 4.2 dB. However, for filter 500, 15 SIRl = 13.3 dB, a significant improvement over the conventional matched filter and close to the best that can be achieved with the conventional arrangement presuming an inactive source 102.
In accordance with another aspect of the present invention, called the short filter bank realization of the CSFB technique, an exemplary filter 20 arrangement 600 utilized in each receiver 111-113 is depicted in FIG. 6 for the sa~e signature sequence a1[k], k=0,1,...,5, discussed with reference to the arrangements of FIGS. 3 and 4. Filter 601 is a sub-filter related to matched filter 401 represented by FIG. 4 and is obtained by selecting the first three elements in the front end of filter 401, namely, a1[5], a1[4], and a1[3]. Filter 600 25 is also composed of a second filter 602, operating in parallel with filter 601, which is obtained from the rP~n~ining three elements of filter 401, namely, a1~2], a1[1], and a1~0]. (In a later section, as will be discussed, filter 600 is the result of selecting the value of two (2) for a parameter ~ iFn~te l D in that section; in effect, D determines the manner of splitting matched filter 300 into sub-filters30 such as filters 601 and 602.) The output of filter 601, appearing on lead 603, serves as an input to sampler 610, which samples at two (D=2) times the originalsymbol rate 1/T. Similarly, the output of filter 602, appearing on lead 604, serves as an input to sampler 611, which also samples at twice the original symbol rate1/T. The output of sampler 610, d~ign~te l wl, serves as one input to 35 summer 630 as well as the input to delay element 620; the delay of element 620 is T/2 (T/D generally) and its output is dP~ign~te l tl. The output of sampler 611,dP~ign~ted w2, serves as one input to summer 631 as well as the input to delay CA 02169961 1998-ll-09 .
element 621; the delay of element 621 i9 T/2 (T/D generally) and its output is desig~lated t2. The other input to summer 630 is t2, wherea~ the other input to mmPr 631 i9 tl~ The output of s~mm~r B30, ~3D~ign~ted Pl ant referred to as a fir~t intermediary signal, 9erve~ J the input to sampler 640, which ~amples at the 5 rate 1/T; the output of ~smplPr 640 becc ~.o~ the first intermediary sampled output and i9 d~ierste~ by y;. In addition, the output of ~-mmPr 631, deJignatcd P2 9ir~d referred to ~ a #cond ;ntermedi_ry dgnal, serYeJ a~ the input to ~ampler 641, which ~ampleJ at the rate 1/T; thç output of ~_mplçr B41 becomeJ the ~econd inte~ is~ ~ampled output and is designated by Y'2. The 10 output y; ser~es a~ one input to multipli~ 650; the other input to multiplier 650 i9 an adaptiYe}y~ cted cc~r;~nt, d--icr9ted c;; it9 selection ant fu~ction are di~cu~ed below. Similarly, the output Y2 serYe~ a~ one input to multiplier 651;
the other input to multiplier 651 i an adaptiYely-~lecte-~ coeffirient, ~ tet c2; itJ u~.~ect;~n and function are discwsed below. Finally, the output~ of both15 multiplier~ 650 ant 651 ~er~e ~ input to summer 661, with the output u' of summer 661 repre~ting the ~mbol d-~ h~ by t~e gi~en rec~
The set of cc- n:c; ~ ts (c;,C2)iJ cc ~ ..,ate with the co~ r;ents Ie~e~ for the cyclically-shifted filt(er arrsngement 500, that i~, t~e cc~ffiri~nts c;
and c2 of filter 600 sre ~lc te~ JO ~ to minim--e the mean~ squsre error bet..~n20 the tran~mitted and dete te~ ~mbol. The~e cc n; ;- ~t~ may t~ic-lly be determined adapti~el~ by ~ a training ~io~ ou arrangement 600 prior to the t~ ion of Uly ~ctual d~ ymbol~.
To pro~ide ~dditio~l iUwtrati~e e~mpleJ of both a cyclically-~hifted ~d the ~ort filt~ b~lc ~ion of the CSFB filter for the ~peci-l c~e of 25 D=3, l~ U ~ a! i~ m~de to FIGS. 7 alld 8, re~ccli~cl~. FIG. 7 illu~tratei filter 700 comp~ed of original m tchet filter 701 and two cyclicslly-~}lifkd ~ioDJ 702 a~d 703 of matched filter 701. The operation and ~tructure of filter 700 i~, b~ ~alo~, cc~ --r~ur~te ~rith FIG. 5. ID particular, filter 702 i~
obt~i~ed from filter 701 b~r ~ right Jhift of t~o poJitio~ (N/D), whereao 30 filter 703 i~ obtai~led from filter 701 by a right ~ift of four positio~ (or t~o podtio~ of filter 702). E ch filter 701-703 i~ ~ampbd b~ a corrc~pouding ~q~pl~ 710-712 to pIoduce output~ 2~ uld ~, re~pecti~ely. Adapti~e coefficient~ tl, d~, aud d3 weight the re~pecti~e ~ to obtain ~eig~kd ~a_pled output~, aDd the weighted ~amplet v.~tyl~ are ~ummed in Ju~_r 731 to 35 protuce an e~timate ~ of thc ~ece;~.d qmbol.
FIG. 8 illu~trate~ filter 800 compo~ed of tllree ~u~filkr~ 801, 802, ant 803 de.;.~d from m~tC~ ~d filtcr 401 br pa~ lio-~ing !~qtCl'ed filter 401 into three segm~"t~ and then arranging each of the sub-filter~ to process the ~ampledinput signal represented by the r(k) ~arnples. The operation and structure of filter 8''0 is, by a~alogy, cQ~mPn~urate with FIG. 6. In particular, the matchedfilter 401 i9 partitioned iDto 3 s~gJn~nts (N/Dj h pro~ride three sub-filter~ 801-5 803, and each of the ~ub-filters i9 9ampled in ~ampler 810-812 to produce sampled output~ w;, w~, and W3, r~pccti~ely. Each of the sampled outputs senres as an input to D tapped telay line~. Each of the line~ has, generally, the same numberof telay~ as the numbcr of pooition~ in the ~ub-filter, that i9, N/D delays. Fort~ce,~ rJ ~er~e aJ input~ to tapped delay lin- arrangement 820. In 10 arrangcrnent 820, WJi~ delayed b~ dclay tap~ 824 and 825, each pro~riding a delay of T/3, and the output of elanent 825 ~enre~ a~ one input to summer 831.
In addition, w2 undergoe~ a telay of T/3 a~ furnished by delay element 826, and the output of element 826 ~enres a~ a secont input to 9u~ ~uc~ 831. Finally, wl is not delayed, ant ~erreo a~ the r~inin~ input to s--mm~r 831. The output of 15 summer 831, an int~meti~ ~ig~ul te~i~nated Pl~ pl!l at the ~ymbol rate 1/T in ~ampler 841 to produce int r~ ;c~ mrle~ output ~;. Similarly, the w;
outputo ~er~c aJ inputJ to delay line arr~ng~ nt~ 821 ant 822; pre-determined one~ of the tap~ compooing eac~ rran~ement ~rv.:de input~ to ~u~c.~ 832 and 833, a~ ~hown. Summer 832 emitJ int . edi~1 dgnal p~, wherea~ au~ 833 20 emib intermeti~ ~ignal p3. Each of the interrnediary ~ignal~ i~ sampled by ~amplert 841 843 to yield ~mple' dgn~b ~ , r~ ~e_ti~ . The output of each of ~ampler~ 841 843 iJ ~reipted bJ dapti~e cc~ e~ dl-t" reopecti~ely. All wçiEh~ mpled outpub are combined in ~ummer 861 to produce the eotimate ~r to the k_~umitted Jmbol. (Del~ line~ not _ctually impl~k~ in a 25 particular del-~ line ~geme~t re ~o~ ~ da~hed to ~rv.idle a ~ioual indic tion of the ~mmetr~ amo~g all the dela~ e arr~ng~m~nt-).
In accord~ce ~rith ulother a~pect of the pre~ent in~ention, filter ~rr3gemento correoponting to the o.~ ,ling te-'nique for the ~pecial ca~es of D=2 and D=3 are diocu~ed with refere~ce to FIGS. 9 and 10, r~ re_~irel~.
30 With ref~ence to FIG. ~, u.~.J~pUng arrs~ e ~ t ~00 include~ conrentional msk~~~l filter 901 commeD~ur_te with filkr 401 of FIG. 4. I~ thi~ ca~e, howe~rer, thc we;~hte~ output of filter 901, on le d ~02, iJ ~amplcd ~t t~ice the ~rmbol rate by ~pl~ 910, ~d the output of ~pler 910 io l.rod.ced on lead 911.
Thio output oer~eo ~ u~ input to multipli~ 930; the other input to 35 m~ iplier ~30 io adapti~e coefflcient f~. A delayed ~rerdon of the output of oampler 930, ~ prorided ~ dela~ el~m~t 920 ha~ing a delay T/2, ~ene~ as an input to allothcr multiplier 931; thc ~econd input to multiplier ~31 io adapti~e coeffi~-i-nt f2. The outputs of multipliers 930 and 931 ser~e as an input to ~u~er 940, and the resulting ~ummstiQn protucwA the est;mste (g) to the ,ecei.~d symbol. The coefF;ciPnts tl and f2 are selected to mini~i7e the mean-square bet-.e_~ the transmitted and rece;.ct symbol.
With reference to FIG. 10, there iJ ~hown filter structure 1000 illustrati~re of the o~rer~ mrling te-~nique for D=3. The operation and ~tructure of filter 1000 is, by analo~, co ~ ..rate with filter 900 FIG. 9. In particular, the output of mst~ e~ filter 1001, or~ lead 1002, i~ Jampled at three timeâ the ~mbol rat~ by ~ampler 1010. Moreover, the output of ~ampler 1010, ~ well as 10 first and ~econd delayed ~er~io~ of the ~ampler output, ~ pro~ided by delay elements 1020 and 1021 each hanng a delay of T/3, are weighte1 by adaptilre co-~ci-nt~ r;-f1 to produce the rcc~ d ~mbo~ g .
To c~AAmplete the hl..~C.;Cal example started abo~re on the ef~ecti~euc~ of the tê-'ni~ue~A in accordance with the preJent in~rention, the SIR
15 for the o~ ~p~inf ~cheme illu~tratcd b~ FIG. 9 is no~r pre~ented. It is aJJumed that t~ro ~ource~ mag be tr~ittinig qmbol~ (J y ~ource 101 and 102 in FIG. 1), with ~ource 101 ha~iug a dgDature Jequencc gi~ren abo~e by the al[il'~, namely, a~ r~,.re__nted b~ thc Jet (1,-1,1,1,-1,-1,), aud ~Irith ~ource 102 ha~ing the dgnature Jequence gi~eu ~bo~e by thc a2~ , namely, as rc~ entct 20 by the ~et (l,lrl,l,l,l). The focu~ i~ ou the dem~ lst;on 9~ AC at one rcc~;~,er (say rec~;~ 111) ~rhich h~ a ~ ature ~equence c~ inr to DAource 101, namelr, the ~ ture ~ct (l,-l,l,lrl,-l). Aurr~;~gl~ Aource 102 may be coDJidcred ~ i~terf~cr ~ith rcJpect to eource 101-r~ ,w 111 p~ir.
Suppo~c w~ th-t r~.~ 111 iJ implemented with filter 25 rrulecment 900, tll-t both o~c 101 uld 102 re tru~ mittin~ dmult~eou~ly, t~t the noi~ po rcr is ~e same âS in p~evious co_ons, ~nd ~at the relative po~er P2 rem~ ~ 5 dB, ~d that coefiicient~ fi = 0.72 ant f2 = 0-~4 (which ~ere tetermiDed b~ minimhul~ the MMSE bet~een tr~mitted a~d ~te~ted ~rmbol), then S~l = 7.0 dB. For o.~ f filt-r 1000, ~rith f; = -0.03, 30 f2 z 1.30, uld f~ = 1.1O, the~ S~l = 10.7 dB.
To recap, for the con~entio~l match-d filter 300, SNRl = 15 tB, but SIRl = 4.2 dB. For filter 500, SlRl = 13.3 dB; for filter 900, SIRl = 7.0 tB; uld for filter 1000, S~l = 10.7 dB.

. . _ W095/08890 2 t 6qq~? PCT/US9~1/10430 SYSTEM MODEL
Since both continuous- and discrete-time signals are considered, the value at time t of a continuous-time signal x will be denoted as x(t), and the value at time k of a discrete-time signal x will be denoted as x[k]. The received 5 signal is the sum of K simultaneous tr~n~mi~ions corrupted by additive white G~le~ n noise. The received signal due to the jth user is given by rj(t) = ~P~ ~, bj[i] sj(t--iT--v;) co~(~ct+~ 1C j~K, (1) i= _00 where T is the bit or symbol interval, bj[i] is the ith bit of the jth user (taking the value +1 or -1), Pj is the power, v; is the delay, ~j is the carrier phase, and sj(t) is 10 a normalized baseband waveform that satisfies r sj2(t) dt = 1, and sj(t) = O, for t not in [O,T]. In this exposition, the signal sj(t) is a DS/SS waveform given by sj(t) = N-~ ~ ajp] ~(t--lTc)~ (2) 1=0 where ajp]~{--1,1}, and the N-vector aj = (aj[O], aj[l], . . . ,aj[N--l])T denotes the signature sequence for the jth user. The waveform sj(t) contains N chips; the 15 duration Tc = T/N is called the chip duration, N is called the processing gain, and '1f(t) is the chip waveform, which has unit energy and duration Tc.
The received signal is given by r(t) = ~ rj(t) + n(t), (3) j=l where n(t) is white G~n~eli~n noise with double-sided power spectral density No/2.
20 The problem of demodulating the first tr~nelmi~ion is treated initially, which will be referred to as the "desired tr~ mi~ionn. It is assumed that the receiver is synchronized to this tr~n~mi~ion, so that the kth sample at the output of the chip matched filter is (k+l)TC+Vl r[k] = (2N)~ J r(t)~(t)cos(~l)ct+~l)dt. (4) kTe+vl ~25 The leceivt:r uses the discrete-time signal for its bit decisions.
Without loss of generality it is assumed that vl = O and ~l = O.
For convenience, a carrier- and chip-synchronous system in which the relative carrier phases ~j = O, and the relative delays v; = ~j Tc for 2 s j c K, where ~j is an integer b_t..ecn 0 and N--1 i9 con~ pred~ The analysis can be ea~ily generalizet to reLuo~ ~ these ~sumptio~. The bits b~ are as~umed to be ~ iepen~l~nt and identically ti~tributed rantom ~rariable~ taking on ralues ~ 1 with equa! probability.
It ;9 abo a~urned that to temodulate each bit, the rece;~er obser~es the lec~ d ~ignal for only one ~nnbol i~tenral. That i9, to demodulate bl101, the r~e~;~ ob~erre~ the rece;~t ~ignal only for t~[0, Tl, or equi~alently, u e only the ~rcctor of recei~d ~ pl~ r = ( ~1~~ N--ll )T. From (1)-(4), ~ Z b~1~l~l + ~ (bjlol~Jo)+b~ ))+n-10 The N ~imDn~ional noi~e ~ector n i~ GauJ~ with me~n ~ero and covariance matrix a~IN, where IN denote~ the NxN identity matrix, a~d o2 = N(No/2). I~
gen~al, if the relati~e delay 7j i~ non~ero, then the jth u~er gi.re~ ri~e to two interf~ence ~ gi~en b~r ~P)~] = ~3P--ti1 UP~TjI, Os 15 N--1, ~ )p] = ~jp+N--Tj] (1--UP--Tj1), Os15N--1, wh~e 2 s j s N--1, ~d where uW i~ the ir~liA~tor f~ncti~ for no ~n~g~ti~e integer~.
The ~te:t~r that choo~ b~10] ; ~(eTr), where e m;nimi~
MSE ~ E{(cTr--bl[Ol)~} i~ c~lled the 'N-tap MMSE tekctor' and u cited here for 20 di~cu~ion purpo~ ~o ~ to ~ho~ the poiDt of departure of the prexnt in~rention;
ho~r thiJ detector i~ di~ti~guiJhed from the in~enti~e ~ubject matkr, which abo u~ a M~'~ criterio~ pre~e~ted dlortl~.
AJ th~ po~er of the inkrferer~ b~nm~ larp, or a~ the background ~oi~ ~riulce ~i~e~, the N-tap MMSE Jolutio~ ~pp.~h~ a ~ero-forculg 2~ ~lution. Ill ~aloa ~rith ~ingle u er cha~eb ~rith intu~mbol i~terf~e~ce, the ~ero~forcin~ Jolution eo ~ tel~ c~ at~ multi-wer iIIterference while e~ha~culg the noiJe. I~ contr~t, the N-tap MMSE ~olution balanceJ the effect of noiJe allt multi-u~er iIIterference ant yieldJ a higher Si~l t~ I~terf~ence Ratio (SIR) than the scro-forcing olution. The performance criterion wed i~
30 a~mptotic efliciency, which i~ ba~ed on the bit error probabilit~. Since the ~pt~tic efficie~c~r iJ computet under the lim;~ 6 ~ituation i~ wbich the noise ~rariulce tend~ to rcro, the N-tap MMSE olutio~ h~ tbe Jame yrmptotic efflcie~cy 9J thc ~~o-forcing olution, ~d i~ therefore ~ear-far re~i~t~t.
The N-tap MMSE detector re~ w the dapt tio~ of N tap~, where , WO 9~/08890 PCT/US9'1/10~3(~

~ -17- 216996l the processing gain N may be large. Because of the complexity and coefficient noise associated with such a filter, simpler interference suppression schemes inaccordance with the present invention are now elucidated.

INTERFERENCE SUPPRESSION ARRANGEMENTS

5 A. Cyclically Shifted Filter Bank (CSFB) Both the MMSE linear detector and the zero-forcing detector for the chip- and symbol-synchronous version of the continuous-time channel (Vj = 0,1 c j c K) contain a bank of K filters matched to each of the signal vectors appearing in equation (5) (in this ca e a~~l) = 0), where the outputs of the 10 matched filters are linearly combined. If, however, the interfering signal vectors are unknown, the filters matched to the interference vectors by K--1 fixed filters that are chosen to be appro~rim~t~ly orthogonal to the matched filter for the de~ired signal and to each other can be replaced. A zero-forcing solution still exists provided that the space spanned by the bank of receiver filters (vectors in 15 RN) contains the space spanned by the transmitted signal vectors. That is, the samples at the output of the new bank of filters can still be linearly combined so as to ~limin~te the multi-user interference at the expense of enhancing the noise.
In principle, a bank of K filters can therefore suppress K--1 interferers in a wide variety of cases. Since the MMSE solution tends to the zero-forcing solution as 20 the noise variance tends to zero, this implies that this type of structure, where the outputs of the K filters are linearly combined according to the MMSE
criterion, is often near-far resistant.
To simplify the linear MMSE detector, the bank of matched filters is replaced by a bank of D filters which are cyclic shifts of the matched filter.
25 That is, for 0 s i c D--1, the ith filter is specified by the vector fi~RN, where f0 = al (matched to the desired signal), and the 1th component of fi is fi[l] = al[(l+i~)modN], 0'1'N--1. (6) Successive shifts are therefore spaced by ~ = LN/D~. The outputs of the filters after the zeroth symbol interval form a vector t = (to~ . . ., tD_l)T~RD, where 30 ti = fiTr, 0 c i c D--1, is the output of the ith filter after the zeroth symbol interval, and r is the vector of received samples given by equation (5). The decision rule is then 61[o] = sgn(cTt), where c~RD is chosen to minimi~e MSE = E{(cTt--bl[0])2}. Generally, D is at least twice the number of strong asynchronous interferers.

WO 95/08890 PCT/US9-1/10-~30 ~ 699 6~
There are two reasons for choosing the bank of filters as in equation (6). First, when N is large, the auto-correlations of spreading sequences assigned to each user are designed to be small for nonzero shifts. The filters defined by (6) are therefore approximately orthogonal to each other, and span a D-dimensional 5 subspace, which is necessary for the suppression of D--1 interferers. Second, that in this case the vector t can be generated with D filters each of length NtD. The total number of coefflcients in the filter bank is therefore N, instead of ND.
To ~1emnn~trate this, for simplicity, it is assumed that D divides N.
For the choice of filters specified by equation (6), the output of the ith filter after 10 the zeroth symbol interval is ti = ~ al[(l+i~)modN]r[l]
1=0 D ~
al[l + k~\] r[(l + (k--i)~) mod N]. (7) k=o l=o Now divide each filter fi into D disjoint contiguous sub-filters of length N/D.
Notice that the set of sub-filters for each cyclically shifted filter, which is denoted as {e~}, k = 1, . . . ,N/D, is the same. That is, elc~] = al[l+k~], O'lC~--1, O~k~D--1. (8) Let yj[m] be the output of the jth filter at time m. Then equations (7) and (8) imply that ti = ~ yl,[((k--i+l)~--1) mod N], 0 c i s D--1, that is, ti is the sum of lc=O
the outputs of the sub-filters e~, k = 1, . . . ,D, sampled at (chip) time [(k--i+1)/~--1] mod N. To generate all D components of t the outputs of {e~} must 20 be sampled D times at chip times iN/D, i = 0, . . . ,D--1. Of course, to detect bl[m] all indices representing chip samples used to generate the corresponding vector of filter outputs are incremented by mN.
Filter configuration 1100 of FIG. 11 depicts an illustrative embodiment for the general cyclically shifted filter bank case. The structure and 25 operation of filter 1100 is commensurate with the structure and operation previously described with reference to FIGS. 5 and 7. Thus, filter 1101 in the bank is the matched filter conventionally used to detect the CDMA signature.
Filter 1102 is a cyclically shifted version of filter 1101; the shift, as measured in terms of delay time, is T/D. Another measure, as set forth in the foregoing 30 discussion, is the integer part of N/D; this measure indicates a number by which the contiguous weights are succe~ivt:ly shifted. For instance, with reference toFIG. 7, D=3 and N=6, so D divides N exactly yielding an integer part of 2.
Accordingly, the contiguous weights are succes~ively shifted by two positions to -19- 21 6~96 1 obtain the cyclically shifted filters. As an example, the a1[5] weight is shifted from the first position of filter 701 to the third position of filter 702, and finally to the fifth position of filter 703. At the same time, the other filter coefficients are moved in cor~ ondence to the movement of the al15] coefflcient. The set of S adaptive coefflcients, referred to as the di's, are again selected to minimi~e the mean square error between the transmitted symbol and detected symbol.
Filter configuration 1200 of FIG. 12 depicts an illustrative ~mho~im~nt for the bank of sub-filters case. The structure and operation of filter 1200 is commencurate with the structure and operation previously described 10 with reference to the short filter bank r~1i7~tions of FIGS. 6 and 8. Thus, sub-filters 1201-1203 in the bank are derived from the matched filter conventionallyused to detect the CDMA signature by partitioning the matched filter into the sub-filters. A measure of the partitioning, as presented in the foregoing c~ ion, is the integer part of N/D. The matched filter is subdivided by 15 gr~uping adjacent weights to form a set of contiguous weights, the set having a nuxnber of elements equal to N/D if D divides N exactly, or the (integer part of N/D)+1 if D does not divided N exactly. Then one sub-filter from the bank is assigned one of the groups of contiguous weights from the set of contiguous weights; another sub-filter is assigned another of the groups of 20 contiguous weights from the set, and so forth. For instance, with reference to FIG. 8, N=6 and D=3, so D divides N exactly with N/D=2. Accordingly, the m~t~he~l filter 401 is subdivided into pairs of contiguous filter weights, namely, the a1[5l-a1[4] pair~ the a1[3l-a1[2] pair, and the a1[1]-a1[0] pair. Each sub-filter 801,..., or 803 is ~iEne-l one of the pairs, so the set of contiguous weights has 25 three elements, each element given by the above-identified pairs.
The outputs of sub-filters 1201-1203, once sampled at the rate D/T
by samplers 1210-1212, respectively, serve as inputs to tapped delay line arrangements 1220-1222, that is, each delay line arrangement 1220, ..., or 1222 receives all outputs from sub-filters 1201-1203. With the focus on delay line 30 arrangement 1220 initially, and as guided by FIG. 8, delay line arrangement 1220 is composed of a parallel arrangement of D delay lines each having, at most, (D-1) delay elements each providing a delay of T/D time units. The output of sub-filter 1203 undergoes the maximum delay by passing this output through the - parallel branch having (D-1) delay elements. The output of sub-filter 1202 is 35 passed through the parallel branch having (D-2) delays, until finally the output of sub-filter 1204 undergoes no delay in filter arrangement 1220. Delay line arrangement 1221 is also composed of a parallel arrangement of D delay lines WO 95/08890 PCT/US9-~/10 ~30 ~qq~ 20-each having, at most, (D-1) delay elements each providing a delay of T/D time units. The connection of delay line arrangement 1221 to the outputs of the samplers 1210-1212 is such that the delays to these outputs are a permutation ofthe delays provided by delay line arrangement 1220. Thus, for example, the 5 output of sub-filter 1201 undergoes a single delay of T/D seconds, whereas thedelay of sub-filter 1202 undergoes two delays of T/D seconds, until sub-filter 1203 undergoes no delay in filter arrangement 1221. Thus, the D delay line arrangements 1220-1222 provide all possible permutations of delays to the outputs of filters 1201-1203--thus the grouping of all delay line 10 arrangements 1220-1222 may be referred to conveniently as a permuted delay line. The remainder of the circuitry in FIG. 1200, namely, summers 1231-1232, samplers 1241-1243, multipliers 1251-1253, and summer 1261, operate and are configured in a manner comm~neurate with FIGS. 6 and 8. The adaptive coefflcients ei's are selected to minimiPe the mean square error between the 15 transmitted symbol and detected symbol.
B. The Oversampling Scheme The prece~ing receiver structure consisting of a bank of D cyclically shifted filters is similar (but not equivalent) to sampling the output of a single filter, m~t~-hed to f0 = al, D times per symbol period -- call this the ovcrsampling 20 scheme. Consider detecting bl[0], and let v[i] denote the filter output at chip time N~ , that is, v[i] = ~ al[l]r[l--i ] (10) 1=0 where ~ = IN/DJ is now the interval between succe~ive samples. The D-vector v = (v[0], . . . ,v[D--l])T, and bl[0] = sgn(cT~), where c~RD is chosen according to 25 an MMSE criterion.
It is seen from equation (10) that the samples r[n] needed to generate ~ extend beyond the interval 0 c n c N--1 corresponding to the bit bl[0].
This means that, depending on the relative delay ~j, up to three bits of the jthinterferer (bj[0], bj[--1], and bj[--2]) may interfere with a given bit of the desired 30 tr~n~mieeion (bl[0]). This is in contrast to the CSFB scheme, where at most two bits of the jth interferer (bj[0] and bj[--1]) interfere with the desired bit. In addition, the adjacent bit of the desired tr~nemieeion (bl[--1]) causes self-interference, which does not occur in the CSFB scheme.
Filter configuration 1300 of FIG. 13 depicts an illustrative 35 embodiment for the general oversampling filter case. The structure and ~21~

operation of filter 1300 are c~mmens~te with the structure and operation pre~iouslr described with reference to FIGS. 9 and 10. Thu~, filter 1301 is the mst~ he~ filter con~rentionally used to detect the CDMA ~ignPture. Sampler 1310 samples the outputs of filter 1301 at the rate D/T. The output of sampler 1310 5 ser~e~ a~ an input to delay elements 1320-1322, each pro~riding a delay of T/D9ecQ"~ Outputs from each of the element~ aY well as ~ampler 1310 ~enre as inputJ to multiplier- 1330-1333, ~ ccli~e4 The ataptive cc ~ ts, tenotet as the ~; '8, al~o Jer~e aJ inputs to multiplier~ 1330-1333, rapc_Li.e4 Summer 1340, ~hich rcc~:.~ the input~ of all multipl~ produceJ an atimate 10 to the ~l~te tt3 ~mbol.
It i~ to be underJtood that the abo~re-de~cribed ~ml~o~iimpnt~ are simply illwtrati~re of the applicst; ~n of the principles in accordance with theprcsent invcntion. Other em~ ts may bc readily de~ cd by tho~e ~Icilled in the art which may embody the prirci~ in spirit ant ~cope. Thus, it i9 to be 15 furth~ undcr~tood that the met~ gy de~cribet herein i~ not limikd to the specific form~ sho~ by ~ of illu~tration, but may a~ume other eml~o~limpnts limited ouly by the Jcope of the appended claims.

. . .

Claims (15)

What is claimed is:

1. A method for demodulating an incoming channel signal propagating in a DS/SS CDMA system with a receiver having a given CDMA
signature sequence to generate a detected symbol which estimates a transmitted symbol, wherein the signature sequence is also assigned to a corresponding source, the source and receiver being synchronized, wherein the system has a pre-determined processing gain and a concomitant chip rate determined by the processing gain and the symbol rate of the system, and wherein the incoming channel signal is sampled at the chip rate to produce an incoming sampled signal, the method comprising the steps of supplying the incoming sampled signal to a bank of at least two filters, each filter in the bank being selected as a cyclically shifted version of the matched filter used to detect the CDMA signature sequence assigned to the receiver, wherein the number of filters in the bank and each filter in the bank are configured with reference to a predetermined number of samples per symbol selected for processing, selecting the output of each filter in the bank at the symbol rate to produce a sampled output, weighting each sampled output by a coefficient from a set of coefficients selected to minimize the mean square error between the transmitted symbol and the detected symbol to produce a weighted sampled output, and summing each weighted sampled output to thereby generate the detected symbol.

2. The method as recited in claim 1 wherein the symbol rate is T, the processing gain is N, the chip rate is T c = T/N, the predetermined number of samples per symbol is D>1, one filter in the bank is the matched filter, another filter in the bank is the matched filter having the positions of its weights shifted by the integer part of N/D, and each successivefilter in the bank, if any, is a shifted version of the prior shifted filter wherein the shift is in correspondence to the integer part.

3. A method for demodulating an incoming channel signal propagating in a DS/SS CDMA system with a receiver having a given CDMA
signature sequence to generate a detected symbol which estimates a transmitted symbol, wherein the signature sequence is also assigned to a corresponding source, the source and receiver being synchronized, and wherein the system has apre-determined processing gain and a concomitant chip rate determined by the processing gain and the symbol rate of the system, the method comprising the steps of sampling the incoming channel signal at the chip rate to produce an incoming sampled signal, supplying the incoming sampled signal to a bank of at least two filters, each filter in the bank being selected as a cyclically shifted version of the matched filter used to detect the CDMA signature sequence assigned to the receiver, wherein the number of filters in the bank and each filter in the bank are configured with reference to a predetermined number of samples per symbol selected for processing, selecting the output of each filter in the bank at the symbol rate to produce a sampled output, weighting each sampled output by a coefficient from a set of coefficients selected to minimize the mean square error between the transmitted symbol and the detected symbol to produce a weighted sampled output, and summing each weighted sampled output to thereby generate the detected symbol.

4. The method as recited in claim 3 wherein the symbol rate is T, the processing gain is N, the chip rate is T c = T/N, the predetermined number of samples per symbol is D>1, one filter in the bank is the matched filter, another filter in the bank is the matched filter having the positions of its weights shifted by the integer part of N/D, and each successivefilter in the bank, if any, is a shifted version of the prior shifted filter wherein the shift is in correspondence to the integer part.

5. A method for demodulating an incoming channel signal propagating in a DS/SS CDMA system with a receiver having a given CDMA
signature sequence to generate a detected symbol which estimate a transmitted symbol, wherein the signature sequence is also assigned to a corresponding source, the source and receiver being synchronized, wherein the system has a pre-determined processing gain and a concomitant chip rate determined by the processing gain and the symbol rate of the system, and wherein the incoming channel signal is sampled at the chip rate to produce an incoming sampled signal, the method comprising the steps of supplying the incoming sampled signal to a bank of at least two sub-filters, each sub-filter in the bank being selected as a partitioned version of the matched filter used to detect the CDMA signature sequence of the receiver, wherein the number of filters in the bank and each sub-filter in the bank are configured with reference to a predetermined number of samples per symbol selected for processing, selecting the output of each sub-filter in the bank at an output rate commensurate with the number of filters in the bank to produce a sampled output for each sub-filter and a set of sampled outputs for the bank, supplying the set of sampled outputs to a set of tapped delay line arrangements, the number of delay line arrangements being equal to the number of sub-filters, for each delay line arrangement, selecting predetermined ones of the taps to produce an intermediary signal, sampling each intermediary signal at the symbol rate to obtain a sampled intermediary signal, weighting each sampled intermediary signal by a coefficient from a set of coefficients selected to minimize the mean square error between the transmitted symbol and the detected symbol to produce a weighted sampled output, and summing each weighted sampled output to thereby generate the detected symbol.

6. The method as recited in claim 5 wherein the symbol rate is T, the processing gain is N, the chip rate is T c = T/N, the predetermined number of samples per symbol is D>1, the matched filter weights are partitioned by grouping adjacent weights to form a set of groups of contiguous weights, the set having a number of elements equal to the integer part of N/D, plus one if D does not divide N exactly, and wherein one filter in the sub-bank is assigned one of the groups of contiguous weights from the set of contiguous weights, another filter in the sub-bank is assigned another of the groups of contiguous weights from the set of contiguous weights, and each successive sub-filter in the bank, if any, is assigned yet another of the groups of contiguous weights from the set of contiguous weights.

7. The method as recited in claim 6 wherein each successive delay line arrangement is a permutation of previously selected ones of the delay line arrangements.

8. A method for demodulating an incoming channel signal propagating in a DS/SS CDMA system with a receiver having a given CDMA
signature sequence to generate a detected symbol which estimates a transmitted symbol, wherein the signature sequence is also assigned to a corresponding source, the source and receiver being synchronized, and wherein the system has apre-determined processing gain and a concomitant chip rate determined by the processing gain and the symbol rate of the system, the method comprising the steps of sampling the incoming channel signal at the chip rate to produce an incoming sampled signal, supplying the incoming sampled signal to a bank of at least two sub-filters, each sub-filter in the bank being selected as a partitioned version of the matched filter used to detect the CDMA signature sequence of the receiver, wherein the number of filters in the bank and each sub-filter in the bank are configured with reference to a predetermined number of samples per symbol selected for processing, selecting the output of each sub-filter in the bank at an output rate commensurate with the number of filters in the bank to produce a sampled output for each sub-filter and a set of sampled outputs for the bank, supplying the set of sampled outputs to a set of tapped delay line arrangements, the number of delay line arrangements being equal to the number of sub-filters, for each delay line arrangement, selecting predetermined ones of the taps to produce an intermediary signal, sampling each intermediary signal at the symbol rate to obtain a sampled intermediary signal, weighting each sampled intermediary signal by a coefficient from a set of coefficient selected to minimize the mean square error between the transmitted symbol and the detected symbol to produce a weighted sampled output, and summing each weighted sampled output to thereby generate the detected symbol.

9. The method as recited in claim 8 wherein the symbol rate is T, the processing gain is N, the chip rate is T c = T/N, the predetermined number of sample per symbol is D>1, the matched filter weights are partitioned by grouping adjacent weights to form a set of groups of contiguous weights, the set having a number of elements equal to the integer part of N/D, plus one if D does not divide N exactly, and wherein one filter in the sub-bank is assigned one of the groups of contiguous weights from the set of contiguous weights, another filter in the sub-bank is assigned another of the groups of contiguous weights from the set of contiguous weights, and each successive sub-filter in the bank, if any, is assigned yet another of the groups of contiguous weights from the set of contiguous weights.

10. The method as recited in claim 9 wherein each successive delay line arrangement is a permutation of previously selected ones of the delay line arrangements.

11. A method for demodulating an incoming channel signal propagating in a DS/SS CDMA system with a receiver having a given CDMA
signature sequence to generate a detected symbol which estimate a transmitted symbol, wherein the signature sequence is also assigned to a corresponding source, the source and receiver being synchronized, wherein the system has a pre-determined processing gain and a concomitant chip rate determined by the processing gain and the symbol rate of the system, and wherein the incoming channel signal is sampled at the chip rate to produce an incoming sampled signal, the method comprising the steps of supplying the incoming sampled signal to a matched filter used to detect the CDMA signature sequence of the receiver, selecting the output of the matched filter at an output rate exceeding the symbol rate to produce a sampled output, supplying the set of sampled output to a tapped delay line wherein the number of taps is selected with reference to the output rate, weighting each output from a tap with a coefficient from a set of coefficients selected to minimize the mean square error between the transmitted symbol and the detected symbol to produce a weighted sampled output, and summing each weighted sampled output to thereby generate the detected symbol.

12. A method for demodulating an incoming channel signal propagating in a DS/SS CDMA system with a receiver having a given CDMA
signature sequence to generate a detected symbol which estimates a transmitted symbol, wherein the signature sequence is also assigned to a corresponding source, the source and receiver being synchronized, and wherein the system has apre-determined processing gain and a concomitant chip rate determined by the processing gain and the symbol rate of the system, the method comprising the steps of sampling the incoming channel signal at the chip rate to produce an incoming sampled signal, supplying the incoming sampled signal to a matched filter used to detect the CDMA signature sequence of the receiver, selecting the output of the matched filter at an output rate exceeding the symbol rate to produce a sampled output, supplying the set of sampled output to a tapped delay line wherein the number of taps is selected with reference to the output rate, weighting each output from a tap with a coefficient from a set of coefficients selected to minimize the mean square error between the transmitted symbol and the detected symbol to produce a weighted sampled output, and summing each weighted sampled output to thereby generate the detected symbol.

13. Circuitry for demodulating an incoming channel signal propagating in a DS/SS CDMA system with a receiver having a given CDMA
signature sequence to generate a detected symbol which estimates a transmitted symbol, wherein the signature sequence is also assigned to a corresponding source, the source and receiver being synchronized, wherein the system has a pre-determined processing gain and a concomitant chip rate determined by the processing gain and the symbol rate of the system, and wherein the incoming channel signal is sampled at the chip rate to produce an incoming sampled signal, the circuitry comprising a bank of at least two filters for receiving the incoming sampled signal, each filter in the bank being selected as a cyclically shifted version of the matched filter used to detect the CDMA signature sequence assigned to the receiver, wherein the number of filters in the bank and each filter in the bank are configured with reference to a predetermined number of samples per symbol selected for processing, means, responsive to the bank of filters, for selecting the output of each filter in the bank at the symbol rate to produce a sampled output, means, responsive to the means for selecting, for weighting each sampled output by a coefficient from a set of coefficients selected to minimize the meansquare error between the transmitted symbol and the detected symbol to produce a weighted sampled output, and means, responsive to the means for weighting, for summing each weighted sampled output to thereby generate the detected symbol.

14. Circuitry for demodulating an incoming channel signal propagating in a DS/SS CDMA system with a receiver having a given CDMA
signature sequence to generate a detected symbol which estimates a transmitted symbol, wherein the signature sequence is also assigned to a corresponding source, the source and receiver being synchronized, wherein the system has a pre-determined processing gain and a concomitant chip rate determined by the processing gain and the symbol rate of the system, and wherein the incoming channel signal is sampled at the chip rate to produce an incoming sampled signal, the circuitry comprising a bank of at least two sub-filters for receiving the incoming sampled signal, each sub-filter in the bank being selected as a partitioned version of the matched filter used to detect the CDMA signature sequence of the receiver, wherein the number of filters in the bank and each sub-filter in the bank are configured with reference to a predetermined number of samples per symbol selected for processing, means, responsive to the bank, for selecting the output of each sub-filter in the bank at an output rate commensurate with the number of filters in the bank to produce a sampled output for each sub-filter and a set of sampled outputs for the bank, means, responsive to said means for selecting, for supplying the set of sampled outputs to a set of tapped delay line arrangements, the number of delay line arrangements being equal to the number of sub-filters, means, responsive to said means for supplying, for selecting for each delay line arrangement predetermined ones of the taps to produce an intermediary signal, means, responsive to said means for selecting, for sampling each intermediary signal at the symbol rate to obtain a sampled intermediary signal, means, responsive to said means for sampling, for weighting each sampled intermediary signal by a coefficient from a set of coefficients selected to minimize the mean square error between the transmitted symbol and the detected symbol to produce a weighted sampled output, and means, responsive to said means for weighting, for summing each weighted sampled output to thereby generate the detected symbol.

15. Circuitry for demodulating an incoming channel signal propagating in a DS/SS CDMA system with a receiver having a given CDMA
signature sequence to generate a detected symbol which estimates a transmitted symbol, wherein the signature sequence is also assigned to a corresponding source, the source and receiver being synchronized, wherein the system has a pre-determined processing gain and a concomitant chip rate determined by the processing gain and the symbol rate of the system, and wherein the incoming channel signal is sampled at the chip rate to produce an incoming sampled signal, the circuitry comprising a filter matched to the CDMA signature sequence of the receiver for receiving the incoming sampled signal, means, responsive to said filter, for selecting the output of the matched filter at an output rate exceeding the symbol rate to produce a sampled output, means, responsive to said means for selecting, for supplying the set of sampled output to a tapped delay line wherein the number of taps is selected with reference to the output rate, means, responsive to said means for supplying, for weighting each output from a tap with a coefficient from a set of coefficients selected to minimize the mean square error between the transmitted symbol and the detected symbol to produce a weighted sampled output, and means, responsive to said means for weighting, for summing each weighted sampled output to thereby generate the detected symbol.