CA2187582A1 - Edge terminals for electronic circuit modules - Google Patents

Edge terminals for electronic circuit modules

Info

Publication number
CA2187582A1
CA2187582A1 CA002187582A CA2187582A CA2187582A1 CA 2187582 A1 CA2187582 A1 CA 2187582A1 CA 002187582 A CA002187582 A CA 002187582A CA 2187582 A CA2187582 A CA 2187582A CA 2187582 A1 CA2187582 A1 CA 2187582A1
Authority
CA
Canada
Prior art keywords
substrate
module
bars
modules
edge
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA002187582A
Other languages
French (fr)
Inventor
Scott J. Kazle
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HEI Inc
Original Assignee
HEI Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by HEI Inc filed Critical HEI Inc
Publication of CA2187582A1 publication Critical patent/CA2187582A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/165Containers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/403Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09563Metal filled via
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10416Metallic blocks or heatsinks completely inserted in a PCB
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0044Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0052Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • H05K3/284Applying non-metallic protective coatings for encapsulating mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3442Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4046Through-connections; Vertical interconnect access [VIA] connections using auxiliary conductive elements, e.g. metallic spheres, eyelets, pieces of wire
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49169Assembling electrical component directly to terminal or elongated conductor
    • Y10T29/49171Assembling electrical component directly to terminal or elongated conductor with encapsulating

Abstract

Improved edge terminals for electronic circuit modules such as single- or multi-chip modules and hybrid circuits, and methods of making the edge terminals are disclosed. The improved edge terminals are formed on the edges of the modules, where they do not take up appreciable surface area from the module, and are formed of heat resisting metal and are of larger size as compared to conventional surface terminal pads which simplifies making connections to the module. In one embodiment, ends of pins are inserted in holes in a substrate along lines which will be the edges of the finished modules.
After encapsulating in epoxy, the substrate is cut along the lines to bisect thepins, leaving the halves of the pins as embedded terminals flush with the edge of the module. In another embodiment, terminals are formed by attaching the terminal pieces to pads on the substrate, either in the form of widened zones in a grid structure, or an array of terminal plates. The grid or plates are cut through after encapsulation, bisecting the terminals to form the embedded terminals flush with the edge of the module.

Description

EDGE TERMINALS FOR ELECTRONIC CIRCUIT MODULES

Field of the Invention The present invention pertains to the field of electronic modules, including single or multi-chip modules and hybrid circuits, and methods for fabrication of such modules. Specifically, the invention pertains to improved edge connectors for such modules, which are formed of heat resistant metal, flush along the edge of the module, which permit a reduction in physical size ofthe module, and simpler and more reliable connections to the module during assembly or reassembly of the module on a circuit board or other support where the module will be used.
B~-~k~round of the Prior Art One general type of circuit module in widespread use today involves one or more integrated circuit (IC) chips and possibly additional discrete components mounted on a substrate which has metalization and multilayer interconnects, with the assembly potted in epoxy. Such circuits are often referred to as electronic modules, multi-chip modules (or single-chip modules) or hybrid circuits. For convenience of terminology herein, such circuits will be referred to as electronic modules, and it will be understood that this term includes single or multiple chip modules, with or without additional discrete components.
Typically, the fabrication of such electronic modules starts with a relatively large substrate on which multiple individual modules will be built up, with the substrate to be subsequently cut into a number of relatively smaller pieces which become the individual electronic modules. The substrate is built upwith metalization layers and multilayer interconnects, as is generally known in the art, in order to provide the appropriate interconnects and signal traces according to the function and design purpose for the module. One or more ICs are then mounted on the surface of the substrate and connected to the signal traces. Additionally, in hybrid circuits, discrete components such as capacitorsmay also be mounted. In one type of commonly used interconnect, the IC has solder bumps on its terminal pads which overlay and contact corresponding signal trace pads on the substrate. The assembly is heated to cause the solder to melt or flow to make a permanent electrical connection. In another commonly used type of interconnect, the ICs are mounted on the substrate, and flying lead5 wires are applied from terminal pads on the chip to corresponding signal trace pad on the substrate.
The entire side of the substrate on which the chips or the components are mounted is then potted in epoxy, and after the epoxy cures the substrate is cut along predetermined lines to separate the individual modules.
One commonly used technique for applying the epoxy potting material to the module was developed by the assignee of the present invention, and involves forming small ceramic pieces and gluing them all the way around the edge of the substrate to form an dam for the epoxy. The ceramic pieces are formed with a length according to the side dimensions of the substrate, and of al S height selected in accordance with the depth or thickness of the intended epoxy layer, so as to contain the epoxy as it is poured onto the surface to cover the ICs and other components. After the epoxy has cured, the cutting process cuts through the entire composite skucture, substrate and epoxy, along predetermined paths (generally a grid) to separate the individual circuit modules.
In use, the circuit modules may be bonded or otherwise mounted to a circuit board or other support structure, according to the intended use of the specific application design. Electrical and electronic connections for the module are made to pads formed on the non-epoxied side of the substrate, which connect through internal vias to the appropriate multilayer signal traces and/or the chips, according to the circuit design of the module. Circuit modules produced by this fabrication technique have very good electrical and mechanical properties, and have proven to be very successful and reliable in a great number of applications.
Although the prior art electronic module construction described above has been very successful, it has been appreciated that certain improvements would be desirable in the terminals or interconnects from the module to the circuit board or other application environment in which the circuit module will be used. It would be desirable to have the interconnects on the electronic module larger and more robust, so they are less fragile and easier toconnect to. However, making them larger would use up more surface real estate area on the module, and this is usually limited by the fact that there may be a large number of terminals needed in a particular design. As a result, connections 5 to these terminals must be done very carefully in order to avoid ~ ging, dissolving or overheating the terminal during assembly. Because of these problems, it is usually not possible to rework, reuse or repair such modules, due to the potential for damage to the terminals caused by heating them.
More recently, it has been proposed to provide a terminal along 10 the edge of the electronic module, in the form of recesses or wells filled with solder. According to such proposal, holes are provided through the substrate, positioned in the area which will later be cut when the substrate is cut up into the individual circuit modules. These holes are metalized, and connect to appropriate traces on or in the substrate. The holes are then filled with solder, 15 which adheres to the metalization. The solder-filled holes are then buried along with the chips and other components during the epoxy potting process. As the substrate is cut into the individual modules, the solder-filled holes are bisected, and the cut surfaces then form edge terminals for the individual modules. These terminals are flush with the edge, are formed of solder, and extend partway 20 through the thickness of the module, specifically through the substrate portion, but not the overlaying epoxy portion. Edge terminals provide the advantage of not requiring surface area on the electronic module for interconnection, which allows for a smaller electronic module. However, such terminals still are small and difficult to connect to, and they can dissolve away if they are overheated, or 25 if there are multiple heatings, for example, during an attempted rework or repair.
To overcome these and other problems, the present invention has provided an improved type of edge terminal construction for small electronic modules, which provide flush edge connections to thereby reduce the need for surface area and permit a smaller module, but which are robust, relatively simple 30 to connect to, and which can withstand overheating, and multiple heating for rework or repa1r.

Summar,v of the Invention These and other objects are accomplished by providing an improved edge terminal for a circuit module, consisting of bars of substantiallyheat resisting metal embedded along the edge and flush with the edge of the S circuit module. The heat resisting metal is a metal which is not solder or any other material that melts at normal soldering temperatures. In one embodiment, the terminal extends substantially through the full thickness of the circuit module. This embodiment is preferably made by forming holes in the substrate along the paths where the cutting will take place to separate the individual modules, placing pins or bars, preferably of copper or some other heat resistantmetal, in the holes in contact with traces therein or thereon, and epoxying themin place in the otherwise standard potting process. When the cut is made, it is made through the center of such a pin or bar, essentially bisecting it, so that half goes with and forms an edge connector for one module, and the other half forms an edge connector for the adjacent module.
According to another embodiment of the invention, the heat resistant metallic terminal extends along the edge, flush therewith, for substantially the thickness of the potting material. This embodiment is formed by placing bars or pins on the substrate prior to potting. These bars are soldered or other~,vise attached to conductive trace paths on the surface of the substrate, or in recesses formed therein, and essentially straddle the zones or lines where cutting will eventually take place. After potting, the individual circuit modules are separated by cutting through the bars or pins, leaving part of a bisected bar as a terminal for one circuit module, and the other part for another one.
These and other advantages of the present invention will become apparent from the following detailed description of the preferred embodiments ofthe invention.
Brief Description of the Draw;ng In the drawing, Figure 1 is a view in perspective, at an enlarged scale, of a circuit module having edge termin~ls7 according to one embodiment of the invention;

Figures 2-7 illustrate various steps in the formation of circuit modules of Figure 1 from a large substrate which is subsequently cut into the individual modules; Specifically, Figure 2A is a plan view of a large substrate showing an array of individual cells, which will correspond to the individual circuit modules, each cell having circuit components and being bordered by rows and columns of mounting holes;
Figure 2B is a view at enlarged scale of a detail of Figure 2A;
Figure 3A is a view similar to Figure 2A, but without components installed, showing the mounting hole patterns;
Figure 3B is a view at an enlarged scale of a detail of Figure 3A;
Figures 4A and 4B show sections of terminal bars, horizontal and vertical, respectively, used in the embodiment of Figures 1-7 to form edge terminals;
Figure 5 is a view showing terminal bars assembled on the substrate for the encapsulation step;
Figure 6 shows a substrate after encapsulation;
Figure 7 shows the sawcut paths over the substrate to separate the individual circuit modules;
Figure 8 is a view similar to Figure 1 of a circuit module, having a different type of edge terminal according to an alternate embodiment of the invention;
Figure 9A is a view of a lead frame used in forming edge terminals according to this alternate embodiment;
Figure 9B is a view at an enlarged scale of a detail of Fig. 9A;
Figure 9C is a view similar to Figure 9B of a detail of a variation of the alternate embodiment;
Figure 10 is a view of the encapsulation step of this alternate embodiment; and Figure 11 is a diagram showing the sawcut paths of the finished substrate to form the individual circuit modules.

Detailed Description of the Preferred Embodiment With reference now to Figure 1, an individual circuit module according to the present invention is shown, at an enlarged scale. As seen in Figure 1, module 10 includes a substrate 11, encapsulant 85, and is generally of a 5 rectangular shape, having been cut by sawing process from a larger substrate in which an array of cut modules can be formed. The substrate may be formed of ceramic, epoxy glass, or any other substrate material as may be used in electronic fabrication. Substrate 11 includes multilayer signal traces as is generally known in the art, and various components including one or more ICs and possibly 10 external resistors or capacitors are mounted on one or both sides of substrate 11, but are not visible in the finished module in Figure 1, because they are potted or covered by the encapsulant 85.
Module 10 also includes a number of edge terminal connectors according to the present invention. Specifically, terminals 71 a and 71b are 15 provided on opposite ends thereof, and terminals 51a, 52a, 53a are provided on one side, and 51b, 52b, and 53b on the opposite side. In each case, the terminalconsists of a metal structure embedded in both the encapsulant 85 and substrate 11, and flush with the outer edges of the module. These terminals provide electrical connections between the circuit module and a circuit board or other 20 structure (not shown) with which the module was intended to be used.
Substrate 11 preferably has multilayer signal traces as is generally known in the art, to form the necessary interconnections among the components thereon, and the external edge terminals. Each edge terminal 71 a, 71b and 51 -53, a-b, is connected to signal traces in or on substrate 11 according to the logic 25 design of the particular module.
Figures 2A and 2B show a larger substrate 111, which is built up with an array or large number of individual circuits, which will subsequently becut into individual modules. As seen in Figures 2A and 2B, each circuit module or cell includes an IC 20, and additional discrete resistor or capacitor components 30 22, 24, 26. These components connect through known techniques to signal tracepaths and holes provided in a substrate, as is generally known in the prior art, in accordance with the particular circuit function design for the modules. The individual circuit cell is repeated a large number of times over the entire substrate 111, so that the module cells form regular columns and rows, to aid insubsequent separation by cutting.
Also visible in Figures 2A and 2B are the rows and columns of holes for use in forming the edge terminal. These are seen better in Figures 3A
and 3B, which are similar to Figures 2A and 2B, but without the components. A
plurality of horizontal (in the orientation of Figure 3A) rows are made up of a series of holes 40a, 40b, 40c, and so on, which are provided along the boundary l O between adjacent rows of module cells. Similarly, vertical columns of holes 60a, 60b, 60c and so on are provided in columns on the separation between adjacent module cells. It will be understood that the use of the terms 'row' and 'column' is somewhat albiLl~lr, as they can be used interchangeably depending upon the orientation, and are adopted for convenience of terminology, and not in any limiting sense.
In the preferred embodiment shown, the rows of holes 40 include three individual holes along each side of the cell. These holes will eventually correspond to the terminals 51, 52, 53 on either side of a finished circuit module.
Similarly, the columns of holes 60 provide a single hole on each end of a modulearea, and will correspond to the edge terminals 71 of the finished module (please see Figure 1). It will be appreciated that the number of holes on the sides or end can vary according to the size and circuit requirements of the individual moduledesign, and the preferred embodiment showing three on two sides and one each on the other side is only by way of example, and not limitation.
The individual holes 40, 60 in the rows and columns are formed in the substrate according to a predesigned pattern, and the holes intersect signal traces on or within the multilayer structure on the substrate according to the circuit design.
Figures 4A and 4B show, at an enlarged scale, bar structures that are used to form the edge terminals. These bars are long enough to stretch across the width of the array of circuit cells on substrate 111, and interlock to form a ~, grid aligned with the rows and columns of holes 40, 60, thereby forming a perimeter around individual cells, as shown in Figure 5.
Figure 4A shows details of a horizontal bar 50, a plurality of which are needed to cover substrate 111. Each bar 50 is an elongate barlike structure made of a durable metal such as copper, nickel or zinc, to which solder will adhere. As seen in Figure 4A, an upper edge of bar 50 has a plurality of clearance/interlock notches 55, at regular intervals according to the pitch or width of the circuit cell size. The other edge of bar 50 has a plurality of posts 51, 52, 53, separated by gaps 54, which are positioned generally opposite notches 55. The posts 51, 52, 53 are scored or partially etched with a break line at location 56, where they join the main part of the bar. The break line is used tobreak the grid away after encapsulation, as described below. Horizontal bars 50 are configured for placing along the rows, with the posts 51, 52, 53 of each group fitting in the group of corresponding holes 40a, 40b, 40c, etc. in the rows of the substrate 111 (see Figure 3).
Vertical bars 70, as shown in Figure 4B, are generally similar to horizontal bars 50, but are designed to fit with their posts 71 in the columns of holes 60a, 60b, 60c, etc. Bars 70 have gaps 74 at intervals corresponding to thepitch or spacing of the circuit cells, with an individual post 71 positioned therebetween to fit into the holes. A break line at location 76 is provided for each post 71, in the same manner as the break lines 56 of the bars 50. Of course, in different designs, there may be an additional number of posts in this location.
A clearance/interlock notch 75 is provided in each gap 74. Notch 75 in vertical bar 70 cooperates and interlocks with notches 55 and horizontal bars 50, so that a plurality of parallel spaced bars 50 can interlock with a number of parallel spaced vertical bars 70 to form a grid of bars as shown in Figure 5.
After the bars are in place, solder is flowed around and/or into the holes 40, 60, to surround and/or fill around all of the individual posts 51, 52, 53, and 71, around each circuit cell over the entire substrate.
Epoxy dams are formed and attached around the edge of the substrate as shown in Figure 5. Specifically, dams 80 and 82 are attached on opposite sides, and 81 and 83 are attached on the other opposite sides, to form a contiguous dam or barrier having the desired height above substrate 111 for flooding with epoxy encapsulant. This results in a structure as appears in Figure 6, after the encapsulant has been poured, covering all of the components of the 5 individual circuit cell, and extending partway up on the bar grid. The portions of the bar grid extending above the encapsulant are removed at the breaklines 56, 76 which are shown on Figures 4A and 4B.
The substrate is then cut along the plurality of perpendicular sawcut paths 45, 65, as shown in Figure 7, which bisect each of the horizontal 10 and vertical bars. This not only separates the overall substrate and assembly into individual circuit modules, but also cuts through each of the terminal bars, leaving only separate halves of the posts 51, 52, 53 as the embedded edge terminal 51a, 52a, 53a, and 51b, 52b, 53b, of Figure 1. Similarly, the vertical bars are cut through in this process, leaving separated halves of posts 71 on the 15 embedded edge terminal 71a, 71b of Figure 1. Since these edge terminals are soldered to applopl;ate signal traces within or on substrate 11, and since they are secured both by being soldered in substrate 11 and surrounded by encapsulant 85, they are very durable electrical edge connections for the individual module.In the embodiment shown in Figure 1, eight edge terminals are 20 provided. It will be appreciated that in the prior art structure wherein the terminals would be provided by pads on a face of the substrate, there would be limited surface area available for each terminal. Also, because such terminals would be markedly small and in tracelike structures, they would be subject to heat damage, mentioned above, in the case of soldering or reworking. In 25 contrast, the edge terminals of the embodiment of Figure 1 provide a more substantial mass of metal to be attached to without damage, and therefore provide for a more robust, compact circuit module.
An alternate embodiments is shown in Figures 8- 11. The module seen in Figure 8 has a rectangular solid configuration, with substrate 12, an 30 encapsulant 85, as in the previous embodiment. The substrate 12 may be generally similar to substrate 11 of the first embodiment, but the configuration will differ in the manner of attachment of terminals, as explained below. The terminal 151a, 152a,, 153a, and 171a, are seen provided on module edges for external connection. It will be understood that corresponding edge terminals 151b, 152b, 153b, 171b, are provided on the other two edges not visible in the 5 orientation of Figure 8 because they do not extend through the encapsulant. Inthis embodiment, the edge terminals are again flush with the sides and edges of the module, and embedded in the encapsulant, but not in the substrate. The terminals abut the surface of the substrate and are connected to appropriate signal kaces thereon.
This embodiment is also formed on a large substrate having the circuit design and component repeated in a number of rows and columns of circuit cells which will later be cut and divided. This embodiment does not use mounting holes for the terminals, but instead makes use of a lead frame 140 as indicated in Figures 9A and 9B. The lead frame is formed of a durable 15 conductive material to which solder will easily adhere. It has a number of horizontal rows 150a, 150b etc., and vertical columns 170a, 170b, etc. The actual number of columns and rows depends on the particular design. The spacing of the grid corresponds to the circuit cell dimension, such that the lead frame grid columns and rows will be positioned exactly over the cut line to 20 separate the circuits. Each row portion 150 of lead frame 140 includes three widened zones 151, 152, and 153. These will correspond to the edge terminals 151 -153, a,b, in the final module as shown in Figure 8. Similarly, each of the column portions 170 of the lead frame have a widened zones 171, which will correspond to the edge terminals 171 a, b in the finished module. The perimeters25 of the lead frame can have half-width zones 15 lp, 152p, 153p and 17 lp, as they will form terminals on one module only, not two adjacent modules.
Lead frame 140 is placed over the substrate, with the columns and rows of the lead frame exactly on the dividing lines which will be cut. They arethensolderedsothatthewidenedzones 151, 152, 153, 171 areelectrically 30 connected to tabs provided for that purpose for traces on the substrate.

-As an alternative to lead frame 140, small terminal plates or structures 251, 252, 253, and 271 may be provided directly without a lead frame.
These terminal plates are also made of durable conductive material to which solder will easily adhere. The arrangement of the terminal plates is shown in 5 Figure 9C, which is at the same scale and orientation as Figure 9B, so that the correspondence can be seen between the widened zones on the grid and the terminal plates. In the alternative embodiment of Figure 9C, the terminal plates are placed on tabs provided for that purpose for traces on the substrate, preferable by robotic assembly in the same manner as components. They are 10 soldered in place to make mechanical and electrical contact with the pads. They will subsequently be cut after encapsulating, as described below. Half-width terminal plates 251p, 252p, 253p, and 271p may be used for terminals around the perimeter of the substrate 112.
The epoxy dams are then placed around the substrate as in the 15 first embodiment previously described, and epoxy or other encapsulant is poured in, covering components on the substrate (not shown) and the lead frame 140, indicated in Fig. 10, if one is used. The substrate is then cut along the sawpath indicated in Figure 11, that is, down each of the rows 150 and columns 170 of lead frame 140, which is at this point embedded within the encapsulant. The 20 width of the saw cut blade, in comparison with the width of the lead frame rows and columns, is such that the saw cut blade consumes and elimin~tes the entire lead frame, except for the edges ofthe widened zones 151, 152, 153, and 171, each of which is bisected to form edge terminals on adjacent circuit modules as they are being cut. If no lead frame is used, the saw cut blade separates the 25 terminal plates 251, 252, 253, and 271, each of which is bisected to form edge terminals on adjacent circuit modules as they are being cut.
The resulting circuit module, as shown in Figure 8, again has the advantage of edge terminal placement, rather than requiring surface placement of connections, thereby allowing for greater mini~t~lrization. Also, the edge 30 termin~l~, while not as long or massive as those in the embodiment of Figure 1, are still made of a substantial piece of metal, rather than a trace, and are therefore -more robust and durable in manufacturing or reworking processes than prior art deslgns.
It will be appreciated from the foregoing that the present invention provides an improved edge terminal construction for small circuit 5 modules, and methods for making same, which provide the advantages of greater mini~tllrization, and greater durability of the terminals.

Claims (8)

1. An improved circuit module, comprising:
a substrate;
at least one electrical component mounted on said substrate;
a layer of potting material on at least one side of said substrate and substantially covering and securing said component; and a heat resistant metallic terminal element along an edge of said module and flush therewith, said terminal connected electrically to said module to forman external terminal therefor.
2. A module according to claim 1 wherein said terminal extends substantially the full thickness of the module and comprises a bar of heat resistant metal secured in an aperture in said substrate prior to separation, and cut through during a separation operation to form the flush mounted edge connector terminal.
3. A module according to claim 1, wherein said terminal extends substantially the distance of the potting portion of the module and is formed of a bar of heat resistant metal placed on the substrate and secured to an electricalcontact therein prior to potting, and cut through during the separation process.
4. A module according to claim 1, wherein said terminal extends substantially the distance of the potting portion of the module and is formed of a piece of heat resistant metal placed on the substrate and secured to electrical contacts therein prior to potting, and cut through during the separation process.
5. The method of forming an edge terminal for a circuit module, comprising the steps of:

attaching bars of heat resistant metal to the substrate along predetermined lines where the substrate will be divided into a plurality of individual modules, with the bars in electrical contact with the circuits of the modules;
forming a layer of potting material on the substrate and substantially covering and securing the bars and components which are on the substrate; and cutting through the substrate, potting material and bars along said predetermined lines to separate the individual modules and bisect the bars to form terminals flush with the edges of the modules.
6. The method of claim 5 wherein said step of attaching said bars includes providing holes in said substrate and placing ends of said bars into the holes in electrical connection with modules, with the other ends of the bars extending above the substrate; whereby the formed edge terminals extend at least partiallythrough the thickness of the substrate and the potting material.
7. The method of claim 5 wherein said step of attaching said bars includes placing ends of said bars in contact with pads on the substrate in electrical connection with modules, with the other ends of the bars extending above the substrate; whereby the formed edge terminals extend at least partially through the thickness of the potting material.
8. The method of forming an edge terminal for a circuit module, comprising the steps of:
attaching terminal plates comprising pieces of heat resistant metal to the substrate along predetermined lines where the substrate will be divided into a plurality of individual modules, with the plates in electrical contact with the circuits of the modules;
forming a layer of potting material on the substrate and substantially covering and securing the bars and components which are on the substrate; and cutting through the substrate, potting material and bars along said predetermined lines to separate the individual modules and bisect the plates to form terminals flush with the edges of the modules.
CA002187582A 1995-10-13 1996-10-10 Edge terminals for electronic circuit modules Abandoned CA2187582A1 (en)

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Families Citing this family (46)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6047463A (en) 1998-06-12 2000-04-11 Intermedics Inc. Embedded trimmable resistors
US6256880B1 (en) 1998-09-17 2001-07-10 Intermedics, Inc. Method for preparing side attach pad traces through buried conductive material
JP3617368B2 (en) * 1999-04-02 2005-02-02 株式会社村田製作所 Mother board, sub board and manufacturing method thereof
US6675471B1 (en) * 1999-04-09 2004-01-13 Matsushita Electric Industrial Co., Ltd. Method of producing high-frequency modules
JP2001024312A (en) * 1999-07-13 2001-01-26 Taiyo Yuden Co Ltd Manufacture of electronic device, the electronic device, and method for filling resin
US6359233B1 (en) * 1999-10-26 2002-03-19 Intel Corporation Printed circuit board multipack structure having internal gold fingers and multipack and printed circuit board formed therefrom, and methods of manufacture thereof
US6288345B1 (en) * 2000-03-22 2001-09-11 Raytheon Company Compact z-axis DC and control signals routing substrate
JP4349541B2 (en) 2000-05-09 2009-10-21 大日本印刷株式会社 Resin-encapsulated semiconductor device frame
JP3888263B2 (en) * 2001-10-05 2007-02-28 株式会社村田製作所 Manufacturing method of multilayer ceramic electronic component
US6975035B2 (en) 2002-03-04 2005-12-13 Micron Technology, Inc. Method and apparatus for dielectric filling of flip chip on interposer assembly
WO2006117961A1 (en) * 2005-04-26 2006-11-09 Kyushu Institute Of Technology Semiconductor package and method for manufacturing same
US20090149038A1 (en) * 2007-12-07 2009-06-11 Metamems Llc Forming edge metallic contacts and using coulomb forces to improve ohmic contact
US7728427B2 (en) * 2007-12-07 2010-06-01 Lctank Llc Assembling stacked substrates that can form cylindrical inductors and adjustable transformers
US8008070B2 (en) * 2007-12-07 2011-08-30 METAMEMS Corp. Using coulomb forces to study charateristics of fluids and biological samples
US7812336B2 (en) * 2007-12-07 2010-10-12 METAMEMS Corp. Levitating substrate being charged by a non-volatile device and powered by a charged capacitor or bonding wire
US8531848B2 (en) 2007-12-07 2013-09-10 METAMEMS Corp. Coulomb island and Faraday shield used to create adjustable Coulomb forces
US7946174B2 (en) * 2007-12-07 2011-05-24 METAMEMS Corp. Decelerometer formed by levitating a substrate into equilibrium
US8159809B2 (en) * 2007-12-07 2012-04-17 METAMEMS Corp. Reconfigurable system that exchanges substrates using coulomb forces to optimize a parameter
US8018009B2 (en) 2007-12-07 2011-09-13 METAMEMS Corp. Forming large planar structures from substrates using edge Coulomb forces
US7965489B2 (en) 2007-12-07 2011-06-21 METAMEMS Corp. Using coulomb forces to form 3-D reconfigurable antenna structures
US7989928B2 (en) * 2008-02-05 2011-08-02 Advanced Semiconductor Engineering Inc. Semiconductor device packages with electromagnetic interference shielding
US8022511B2 (en) 2008-02-05 2011-09-20 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding
US8212339B2 (en) 2008-02-05 2012-07-03 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding
US8350367B2 (en) 2008-02-05 2013-01-08 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding
US8410584B2 (en) 2008-08-08 2013-04-02 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding
US20100110656A1 (en) * 2008-10-31 2010-05-06 Advanced Semiconductor Engineering, Inc. Chip package and manufacturing method thereof
US8110902B2 (en) * 2009-02-19 2012-02-07 Advanced Semiconductor Engineering, Inc. Chip package and manufacturing method thereof
US8212340B2 (en) * 2009-07-13 2012-07-03 Advanced Semiconductor Engineering, Inc. Chip package and manufacturing method thereof
JP5424825B2 (en) * 2009-11-12 2014-02-26 オリンパス株式会社 Stacked mounting structure
US8030750B2 (en) 2009-11-19 2011-10-04 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding
US8378466B2 (en) 2009-11-19 2013-02-19 Advanced Semiconductor Engineering, Inc. Wafer-level semiconductor device packages with electromagnetic interference shielding
US8368185B2 (en) 2009-11-19 2013-02-05 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding
US8569894B2 (en) 2010-01-13 2013-10-29 Advanced Semiconductor Engineering, Inc. Semiconductor package with single sided substrate design and manufacturing methods thereof
TWI411075B (en) 2010-03-22 2013-10-01 Advanced Semiconductor Eng Semiconductor package and manufacturing method thereof
CN103249542A (en) 2010-07-13 2013-08-14 里尔喷射机公司 Composite structure and method of forming same
TWI540698B (en) 2010-08-02 2016-07-01 日月光半導體製造股份有限公司 Semiconductor package and manufacturing method thereof
US9406658B2 (en) 2010-12-17 2016-08-02 Advanced Semiconductor Engineering, Inc. Embedded component device and manufacturing methods thereof
JP5926890B2 (en) * 2011-03-04 2016-05-25 オリンパス株式会社 Wiring board, manufacturing method of wiring board, and imaging apparatus
USD692896S1 (en) * 2011-11-15 2013-11-05 Connectblue Ab Module
USD668658S1 (en) * 2011-11-15 2012-10-09 Connectblue Ab Module
USD668659S1 (en) * 2011-11-15 2012-10-09 Connectblue Ab Module
USD680119S1 (en) * 2011-11-15 2013-04-16 Connectblue Ab Module
USD680545S1 (en) * 2011-11-15 2013-04-23 Connectblue Ab Module
USD689053S1 (en) * 2011-11-15 2013-09-03 Connectblue Ab Module
US8704341B2 (en) 2012-05-15 2014-04-22 Advanced Semiconductor Engineering, Inc. Semiconductor packages with thermal dissipation structures and EMI shielding
US8653634B2 (en) 2012-06-11 2014-02-18 Advanced Semiconductor Engineering, Inc. EMI-shielded semiconductor devices and methods of making

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02201946A (en) * 1989-01-30 1990-08-10 Nec Ic Microcomput Syst Ltd Semiconductor device
JPH04273112A (en) * 1991-02-28 1992-09-29 Murata Mfg Co Ltd Molded chip electronic component
JPH05160290A (en) * 1991-12-06 1993-06-25 Rohm Co Ltd Circuit module
US5635669A (en) * 1992-07-27 1997-06-03 Murata Manufacturing Co., Ltd. Multilayer electronic component
JPH06267788A (en) * 1993-03-15 1994-09-22 Murata Mfg Co Ltd Composite component
JPH0763115B2 (en) * 1993-03-25 1995-07-05 日本電気株式会社 High frequency module device and manufacturing method thereof
US5500628A (en) * 1995-01-24 1996-03-19 Motorola, Inc. Double-sided oscillator package and method of coupling components thereto

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