CA2230903A1 - Mounting assembly of integrated circuit device and method for production thereof - Google Patents

Mounting assembly of integrated circuit device and method for production thereof

Info

Publication number
CA2230903A1
CA2230903A1 CA002230903A CA2230903A CA2230903A1 CA 2230903 A1 CA2230903 A1 CA 2230903A1 CA 002230903 A CA002230903 A CA 002230903A CA 2230903 A CA2230903 A CA 2230903A CA 2230903 A1 CA2230903 A1 CA 2230903A1
Authority
CA
Canada
Prior art keywords
integrated circuit
circuit device
mounting assembly
production
holes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA002230903A
Other languages
French (fr)
Other versions
CA2230903C (en
Inventor
Hirokazu Miyazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of CA2230903A1 publication Critical patent/CA2230903A1/en
Application granted granted Critical
Publication of CA2230903C publication Critical patent/CA2230903C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13111—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16237—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area disposed in a recess of the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01004—Beryllium [Be]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0105—Tin [Sn]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Wire Bonding (AREA)

Abstract

A mounting assembly of an integrated circuit device includes an integrated circuit device having pads on its lower side, through holes formed in a mounting substrate at positions opposed to the pads of the integrated circuit device, and solders for connecting the pads of the integrated circuit device with the through holes. An electrode is provided on the inside wall of each through hole, and the mounting substrate includes therein wirings connected to the electrodes. The solder is filled into the through holes to such an extent that the solder filled in the through holes can be visually checked from the lower side of the substrate.
CA002230903A 1997-03-03 1998-03-02 Mounting assembly of integrated circuit device and method for production thereof Expired - Fee Related CA2230903C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP048295/97 1997-03-03
JP04829597A JP3176307B2 (en) 1997-03-03 1997-03-03 Mounting structure of integrated circuit device and method of manufacturing the same

Publications (2)

Publication Number Publication Date
CA2230903A1 true CA2230903A1 (en) 1998-09-03
CA2230903C CA2230903C (en) 2002-09-03

Family

ID=12799458

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002230903A Expired - Fee Related CA2230903C (en) 1997-03-03 1998-03-02 Mounting assembly of integrated circuit device and method for production thereof

Country Status (5)

Country Link
US (2) US6037665A (en)
EP (1) EP0863548B1 (en)
JP (1) JP3176307B2 (en)
CA (1) CA2230903C (en)
DE (1) DE69827687T2 (en)

Families Citing this family (101)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3080175B2 (en) * 1996-05-17 2000-08-21 シーメンス アクチエンゲゼルシヤフト Support member for semiconductor chip
JP2000208698A (en) 1999-01-18 2000-07-28 Toshiba Corp Semiconductor device
SG75841A1 (en) 1998-05-02 2000-10-24 Eriston Invest Pte Ltd Flip chip assembly with via interconnection
US6406939B1 (en) 1998-05-02 2002-06-18 Charles W. C. Lin Flip chip assembly with via interconnection
EP1202348A3 (en) * 1998-06-04 2004-05-12 Matsushita Electric Industrial Co., Ltd. Semiconductor device and method of manufacturing same
JP3447961B2 (en) * 1998-08-26 2003-09-16 富士通株式会社 Semiconductor device manufacturing method and semiconductor manufacturing apparatus
TW522536B (en) 1998-12-17 2003-03-01 Wen-Chiang Lin Bumpless flip chip assembly with strips-in-via and plating
SG82591A1 (en) * 1998-12-17 2001-08-21 Eriston Technologies Pte Ltd Bumpless flip chip assembly with solder via
SG82590A1 (en) 1998-12-17 2001-08-21 Eriston Technologies Pte Ltd Bumpless flip chip assembly with strips and via-fill
US6388335B1 (en) * 1999-12-14 2002-05-14 Atmel Corporation Integrated circuit package formed at a wafer level
DE10014379A1 (en) 2000-03-23 2001-10-11 Infineon Technologies Ag Method and device for connecting at least one chip to a rewiring arrangement
US6569753B1 (en) * 2000-06-08 2003-05-27 Micron Technology, Inc. Collar positionable about a periphery of a contact pad and around a conductive structure secured to the contact pads, semiconductor device components including same, and methods for fabricating same
US6562709B1 (en) 2000-08-22 2003-05-13 Charles W. C. Lin Semiconductor chip assembly with simultaneously electroplated contact terminal and connection joint
US6403460B1 (en) 2000-08-22 2002-06-11 Charles W. C. Lin Method of making a semiconductor chip assembly
US6660626B1 (en) 2000-08-22 2003-12-09 Charles W. C. Lin Semiconductor chip assembly with simultaneously electrolessly plated contact terminal and connection joint
US6436734B1 (en) 2000-08-22 2002-08-20 Charles W. C. Lin Method of making a support circuit for a semiconductor chip assembly
US6402970B1 (en) 2000-08-22 2002-06-11 Charles W. C. Lin Method of making a support circuit for a semiconductor chip assembly
US6551861B1 (en) 2000-08-22 2003-04-22 Charles W. C. Lin Method of making a semiconductor chip assembly by joining the chip to a support circuit with an adhesive
US6562657B1 (en) 2000-08-22 2003-05-13 Charles W. C. Lin Semiconductor chip assembly with simultaneously electrolessly plated contact terminal and connection joint
US6350633B1 (en) 2000-08-22 2002-02-26 Charles W. C. Lin Semiconductor chip assembly with simultaneously electroplated contact terminal and connection joint
US7271491B1 (en) * 2000-08-31 2007-09-18 Micron Technology, Inc. Carrier for wafer-scale package and wafer-scale package including the carrier
US6350386B1 (en) 2000-09-20 2002-02-26 Charles W. C. Lin Method of making a support circuit with a tapered through-hole for a semiconductor chip assembly
US6350632B1 (en) 2000-09-20 2002-02-26 Charles W. C. Lin Semiconductor chip assembly with ball bond connection joint
US6511865B1 (en) 2000-09-20 2003-01-28 Charles W. C. Lin Method for forming a ball bond connection joint on a conductive trace and conductive pad in a semiconductor chip assembly
US6448108B1 (en) 2000-10-02 2002-09-10 Charles W. C. Lin Method of making a semiconductor chip assembly with a conductive trace subtractively formed before and after chip attachment
US6544813B1 (en) 2000-10-02 2003-04-08 Charles W. C. Lin Method of making a semiconductor chip assembly with a conductive trace subtractively formed before and after chip attachment
US6440835B1 (en) 2000-10-13 2002-08-27 Charles W. C. Lin Method of connecting a conductive trace to a semiconductor chip
US6492252B1 (en) 2000-10-13 2002-12-10 Bridge Semiconductor Corporation Method of connecting a bumped conductive trace to a semiconductor chip
US6673710B1 (en) 2000-10-13 2004-01-06 Bridge Semiconductor Corporation Method of connecting a conductive trace and an insulative base to a semiconductor chip
US7414319B2 (en) * 2000-10-13 2008-08-19 Bridge Semiconductor Corporation Semiconductor chip assembly with metal containment wall and solder terminal
US6537851B1 (en) 2000-10-13 2003-03-25 Bridge Semiconductor Corporation Method of connecting a bumped compliant conductive trace to a semiconductor chip
US6667229B1 (en) 2000-10-13 2003-12-23 Bridge Semiconductor Corporation Method of connecting a bumped compliant conductive trace and an insulative base to a semiconductor chip
US6740576B1 (en) 2000-10-13 2004-05-25 Bridge Semiconductor Corporation Method of making a contact terminal with a plated metal peripheral sidewall portion for a semiconductor chip assembly
US6576539B1 (en) 2000-10-13 2003-06-10 Charles W.C. Lin Semiconductor chip assembly with interlocked conductive trace
US6699780B1 (en) 2000-10-13 2004-03-02 Bridge Semiconductor Corporation Method of connecting a conductive trace to a semiconductor chip using plasma undercut etching
US6548393B1 (en) 2000-10-13 2003-04-15 Charles W. C. Lin Semiconductor chip assembly with hardened connection joint
US6576493B1 (en) 2000-10-13 2003-06-10 Bridge Semiconductor Corporation Method of connecting a conductive trace and an insulative base to a semiconductor chip using multiple etch steps
US6580165B1 (en) * 2000-11-16 2003-06-17 Fairchild Semiconductor Corporation Flip chip with solder pre-plated leadframe including locating holes
US6462950B1 (en) * 2000-11-29 2002-10-08 Nokia Mobile Phones Ltd. Stacked power amplifier module
US6444489B1 (en) 2000-12-15 2002-09-03 Charles W. C. Lin Semiconductor chip assembly with bumped molded substrate
US6653170B1 (en) 2001-02-06 2003-11-25 Charles W. C. Lin Semiconductor chip assembly with elongated wire ball bonded to chip and electrolessly plated to support circuit
KR100384834B1 (en) * 2001-03-30 2003-05-23 주식회사 하이닉스반도체 Semiconductor device fabricated on mutiple substrate and method for fabricating the same
SG104293A1 (en) 2002-01-09 2004-06-21 Micron Technology Inc Elimination of rdl using tape base flip chip on flex for die stacking
SG115456A1 (en) 2002-03-04 2005-10-28 Micron Technology Inc Semiconductor die packages with recessed interconnecting structures and methods for assembling the same
SG111935A1 (en) 2002-03-04 2005-06-29 Micron Technology Inc Interposer configured to reduce the profiles of semiconductor device assemblies and packages including the same and methods
SG115455A1 (en) * 2002-03-04 2005-10-28 Micron Technology Inc Methods for assembly and packaging of flip chip configured dice with interposer
SG121707A1 (en) * 2002-03-04 2006-05-26 Micron Technology Inc Method and apparatus for flip-chip packaging providing testing capability
SG115459A1 (en) * 2002-03-04 2005-10-28 Micron Technology Inc Flip chip packaging using recessed interposer terminals
US20040036170A1 (en) * 2002-08-20 2004-02-26 Lee Teck Kheng Double bumping of flexible substrate for first and second level interconnects
US20040088855A1 (en) * 2002-11-11 2004-05-13 Salman Akram Interposers for chip-scale packages, chip-scale packages including the interposers, test apparatus for effecting wafer-level testing of the chip-scale packages, and methods
US7147141B2 (en) * 2002-11-13 2006-12-12 Intel Corporation Preconditioning via plug material for a via-in-pad ball grid array package
FI20031341A (en) 2003-09-18 2005-03-19 Imbera Electronics Oy Method for manufacturing an electronic module
US7993983B1 (en) 2003-11-17 2011-08-09 Bridge Semiconductor Corporation Method of making a semiconductor chip assembly with chip and encapsulant grinding
US7538415B1 (en) 2003-11-20 2009-05-26 Bridge Semiconductor Corporation Semiconductor chip assembly with bumped terminal, filler and insulative base
US7425759B1 (en) 2003-11-20 2008-09-16 Bridge Semiconductor Corporation Semiconductor chip assembly with bumped terminal and filler
FI117814B (en) * 2004-06-15 2007-02-28 Imbera Electronics Oy A method for manufacturing an electronic module
US7750483B1 (en) 2004-11-10 2010-07-06 Bridge Semiconductor Corporation Semiconductor chip assembly with welded metal pillar and enlarged plated contact terminal
FR2884049B1 (en) * 2005-04-01 2007-06-22 3D Plus Sa Sa LOW THICK ELECTRONIC MODULE COMPRISING A STACK OF CONNECTING BIT ELECTRONIC BOXES
US7838997B2 (en) * 2005-06-14 2010-11-23 John Trezza Remote chip attachment
US7851348B2 (en) * 2005-06-14 2010-12-14 Abhay Misra Routingless chip architecture
US7786592B2 (en) 2005-06-14 2010-08-31 John Trezza Chip capacitive coupling
US7687400B2 (en) * 2005-06-14 2010-03-30 John Trezza Side stacking apparatus and method
US8456015B2 (en) * 2005-06-14 2013-06-04 Cufer Asset Ltd. L.L.C. Triaxial through-chip connection
US7521806B2 (en) * 2005-06-14 2009-04-21 John Trezza Chip spanning connection
US7560813B2 (en) 2005-06-14 2009-07-14 John Trezza Chip-based thermo-stack
US7781886B2 (en) * 2005-06-14 2010-08-24 John Trezza Electronic chip contact structure
US7534722B2 (en) * 2005-06-14 2009-05-19 John Trezza Back-to-front via process
US7989958B2 (en) * 2005-06-14 2011-08-02 Cufer Assett Ltd. L.L.C. Patterned contact
US20060281303A1 (en) * 2005-06-14 2006-12-14 John Trezza Tack & fuse chip bonding
US20060278996A1 (en) * 2005-06-14 2006-12-14 John Trezza Active packaging
US7767493B2 (en) * 2005-06-14 2010-08-03 John Trezza Post & penetration interconnection
DE112006001506T5 (en) * 2005-06-16 2008-04-30 Imbera Electronics Oy Board structure and method for its production
FI122128B (en) * 2005-06-16 2011-08-31 Imbera Electronics Oy Process for manufacturing circuit board design
FI119714B (en) * 2005-06-16 2009-02-13 Imbera Electronics Oy Circuit board structure and method for manufacturing a circuit board structure
US7687397B2 (en) * 2006-06-06 2010-03-30 John Trezza Front-end processed wafer having through-chip connections
US20070281460A1 (en) * 2006-06-06 2007-12-06 Cubic Wafer, Inc. Front-end processed wafer having through-chip connections
WO2008048925A2 (en) * 2006-10-17 2008-04-24 Cufer Asset Ltd. L.L.C. Wafer via formation
US7811863B1 (en) 2006-10-26 2010-10-12 Bridge Semiconductor Corporation Method of making a semiconductor chip assembly with metal pillar and encapsulant grinding and heat sink attachment
KR101332861B1 (en) * 2007-01-03 2013-11-22 삼성전자주식회사 IC Package and Manufacturing Method Thereof
US7705613B2 (en) * 2007-01-03 2010-04-27 Abhay Misra Sensitivity capacitive sensor
US7803693B2 (en) * 2007-02-15 2010-09-28 John Trezza Bowed wafer hybridization compensation
US7705632B2 (en) * 2007-02-15 2010-04-27 Wyman Theodore J Ted Variable off-chip drive
US7598163B2 (en) * 2007-02-15 2009-10-06 John Callahan Post-seed deposition process
US7670874B2 (en) * 2007-02-16 2010-03-02 John Trezza Plated pillar package formation
US7747223B2 (en) * 2007-03-29 2010-06-29 Research In Motion Limited Method, system and mobile device for prioritizing a discovered device list
US7850060B2 (en) * 2007-04-05 2010-12-14 John Trezza Heat cycle-able connection
US7748116B2 (en) * 2007-04-05 2010-07-06 John Trezza Mobile binding in an electronic connection
US20080261392A1 (en) * 2007-04-23 2008-10-23 John Trezza Conductive via formation
US7960210B2 (en) 2007-04-23 2011-06-14 Cufer Asset Ltd. L.L.C. Ultra-thin chip packaging
WO2011154062A1 (en) * 2010-06-08 2011-12-15 Johnson Controls Technology Company Electric connection between a supporting element and an electric element, method for making an electric connection, supporting element and electric element
US8946072B2 (en) * 2012-02-02 2015-02-03 Taiwan Semiconductor Manufacturing Company, Ltd. No-flow underfill for package with interposer frame
US9691636B2 (en) * 2012-02-02 2017-06-27 Taiwan Semiconductor Manufacturing Co., Ltd. Interposer frame and method of manufacturing the same
KR20140059489A (en) * 2012-11-08 2014-05-16 삼성전자주식회사 Semiconductor package and method of forming the same
US9159652B2 (en) 2013-02-25 2015-10-13 Stmicroelectronics S.R.L. Electronic device comprising at least a chip enclosed in a package and a corresponding assembly process
WO2018098649A1 (en) * 2016-11-30 2018-06-07 深圳修远电子科技有限公司 Integrated circuit packaging method and integrated packaged circuit
US11335664B2 (en) * 2016-11-30 2022-05-17 SHENZHEN XlUYUAN ELECTRONIC TECHNOLOGY CO., LTD Integrated circuit packaging method and integrated packaging circuit
IT201700073501A1 (en) * 2017-06-30 2018-12-30 St Microelectronics Srl SEMICONDUCTOR PRODUCT AND CORRESPONDENT PROCEDURE
US20210358883A1 (en) * 2018-10-11 2021-11-18 Shenzhen Xiuyi Investment Development Partnership (Limited Partnership) Fan-out packaging method employing combined process
JP7102481B2 (en) * 2020-10-09 2022-07-19 Ｎｉｓｓｈａ株式会社 Injection molded product and its manufacturing method
US11948807B2 (en) 2021-03-30 2024-04-02 International Business Machines Corporation Feature selection through solder-ball population
US11963307B2 (en) * 2021-03-30 2024-04-16 International Business Machines Corporation Vacuum-assisted BGA joint formation

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0738401B2 (en) * 1986-10-13 1995-04-26 株式会社日立製作所 LSI chip mounting structure
JPH02168662A (en) 1988-09-07 1990-06-28 Hitachi Ltd Chip carrier
US5148265A (en) * 1990-09-24 1992-09-15 Ist Associates, Inc. Semiconductor chip assemblies with fan-in leads
DE69118308T2 (en) * 1990-10-24 1996-08-08 Nec Corp Method of making an electrical connection for an integrated circuit
EP0585376A4 (en) * 1991-05-23 1994-06-08 Motorola Inc Integrated circuit chip carrier
US5489750A (en) * 1993-03-11 1996-02-06 Matsushita Electric Industrial Co., Ltd. Method of mounting an electronic part with bumps on a circuit board
US5459368A (en) * 1993-08-06 1995-10-17 Matsushita Electric Industrial Co., Ltd. Surface acoustic wave device mounted module
JPH088293A (en) * 1994-06-16 1996-01-12 Casio Comput Co Ltd Structure for connecting electronic parts and connection method therefor
US5742100A (en) * 1995-03-27 1998-04-21 Motorola, Inc. Structure having flip-chip connected substrates
JPH08316271A (en) * 1995-05-12 1996-11-29 Nitto Denko Corp Film carrier and semiconductor device using the same
JPH0945805A (en) * 1995-07-31 1997-02-14 Fujitsu Ltd Wiring board, semiconductor device, method for removing the semiconductor device from wiring board, and manufacture of semiconductor device
US5971253A (en) * 1995-07-31 1999-10-26 Tessera, Inc. Microelectronic component mounting with deformable shell terminals
US5784262A (en) * 1995-11-06 1998-07-21 Symbios, Inc. Arrangement of pads and through-holes for semiconductor packages
JP3610999B2 (en) * 1996-06-07 2005-01-19 松下電器産業株式会社 Mounting method of semiconductor element

Also Published As

Publication number Publication date
JPH10242210A (en) 1998-09-11
JP3176307B2 (en) 2001-06-18
DE69827687T2 (en) 2005-12-01
US6297141B1 (en) 2001-10-02
DE69827687D1 (en) 2004-12-30
CA2230903C (en) 2002-09-03
EP0863548B1 (en) 2004-11-24
EP0863548A3 (en) 1999-04-14
EP0863548A2 (en) 1998-09-09
US6037665A (en) 2000-03-14

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