CA2570416A1 - Receiver circuit using nanotube-based switches and logic - Google Patents

Receiver circuit using nanotube-based switches and logic Download PDF

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Publication number
CA2570416A1
CA2570416A1 CA002570416A CA2570416A CA2570416A1 CA 2570416 A1 CA2570416 A1 CA 2570416A1 CA 002570416 A CA002570416 A CA 002570416A CA 2570416 A CA2570416 A CA 2570416A CA 2570416 A1 CA2570416 A1 CA 2570416A1
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Prior art keywords
output
electrical communication
input
link
node
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Granted
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CA002570416A
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French (fr)
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CA2570416C (en
Inventor
Claude L. Bertin
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Nantero Inc
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Nantero, Inc.
Claude L. Bertin
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Publication of CA2570416A1 publication Critical patent/CA2570416A1/en
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Publication of CA2570416C publication Critical patent/CA2570416C/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/02—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using elements whose operation depends upon chemical change
    • G11C13/025—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using elements whose operation depends upon chemical change using fullerenes, e.g. C60, or nanotubes, e.g. carbon or silicon nanotubes
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/10—Resistive cells; Technology aspects
    • G11C2213/17—Memory cell being a nanowire transistor
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S977/00—Nanotechnology
    • Y10S977/902—Specified use of nanostructure
    • Y10S977/932—Specified use of nanostructure for electronic or optoelectronic application
    • Y10S977/936—Specified use of nanostructure for electronic or optoelectronic application in a transistor or 3-terminal device
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S977/00—Nanotechnology
    • Y10S977/902—Specified use of nanostructure
    • Y10S977/932—Specified use of nanostructure for electronic or optoelectronic application
    • Y10S977/936—Specified use of nanostructure for electronic or optoelectronic application in a transistor or 3-terminal device
    • Y10S977/938—Field effect transistors, FETS, with nanowire- or nanotube-channel region
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S977/00—Nanotechnology
    • Y10S977/902—Specified use of nanostructure
    • Y10S977/932—Specified use of nanostructure for electronic or optoelectronic application
    • Y10S977/94—Specified use of nanostructure for electronic or optoelectronic application in a logic circuit

Abstract

Receiver circuits using nanotube based switches and logic. Preferably, the circuits are dual-rail (differential). A receiver circuit(l.theta.) includes a differential input having a first and second input link (25, 25'), and a differential output having a first and second output link (30, 30'). First, second, third and fourth switching elements (15, 20, 35, 40) each have an input node, an output node, a nanotube channel element, and a control structure disposed in relation to the nanotube channel element to controllably form and unform an electrically conductive channel between said input node and said output node. The receiver circuit can sense small voltage inputs and convert them to larger voltage swings.

Claims (6)

1. A receiver circuit, comprising:
a differential input having a first and second input link;

a differential output having a first and second output link;

first, second, third and fourth switching elements, each having an input node, an output node, a nanotube channel element, and a control structure disposed in relation to the nanotube channel element to controllably form and unform an electrically conductive channel between said input node and said output node;

the control structure of the first switching element in electrical communication with the first input link, the input node being in electrical communication with a low reference voltage, and the output node being in electrical communication with the first output link;

the control structure of the second switching element in electrical communication with the second input link, the input node being in electrical communication with a low reference voltage, and the output node being in electrical communication with the second output link;

the output node of the third switching element in electrical communication with the first output link, the control structure being in electrical communication with the second output link and the input node being in electrical communication a high reference voltage;

the output node of the fourth switching element in electrical communication with the second output link, the control structure being in electrical communication with the first output link and the input node being in electrical communication a high reference voltage.
2. The receiver circuit of claim 1 wherein the high reference voltage is Vdd and the low reference voltage is ground.
3. The receiver circuit of claim 1 wherein the control structure of the first and second switching elements includes a set electrode and a release electrode, and wherein the first input link is coupled to the set electrode of the first switching element and the release electrode of the second switching element, and wherein the second input link is coupled to the set electrode of the second switching element and the release electrode of the first switching element.
4. The receiver circuit of claim 3 wherein the control structure of the third and fourth switching elements includes a set electrode and a release electrode, and wherein the first output link is coupled to the set electrode of the fourth switching element; wherein the second output link is coupled to the set electrode of the third switching element, and the release electrodes of the third and fourth switching elements are coupled to the high reference voltage.
5. The receiver circuit of claim 1 wherein the first and second switching elements are sized to be non-volatile switches.
6. The receiver circuit of claim 1 wherein the third and fourth switching elements are sized to be volatile switches.
CA2570416A 2004-06-18 2005-05-26 Receiver circuit using nanotube-based switches and logic Expired - Fee Related CA2570416C (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US58107504P 2004-06-18 2004-06-18
US60/581,075 2004-06-18
US11/033,215 US7330709B2 (en) 2004-06-18 2005-01-10 Receiver circuit using nanotube-based switches and logic
US11/033,215 2005-01-10
PCT/US2005/018536 WO2006033681A2 (en) 2004-06-18 2005-05-26 Receiver circuit using nanotube-based switches and logic

Publications (2)

Publication Number Publication Date
CA2570416A1 true CA2570416A1 (en) 2006-03-30
CA2570416C CA2570416C (en) 2011-05-17

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CA2570416A Expired - Fee Related CA2570416C (en) 2004-06-18 2005-05-26 Receiver circuit using nanotube-based switches and logic

Country Status (3)

Country Link
US (2) US7330709B2 (en)
CA (1) CA2570416C (en)
WO (1) WO2006033681A2 (en)

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Also Published As

Publication number Publication date
CA2570416C (en) 2011-05-17
US20080197881A1 (en) 2008-08-21
US7720514B2 (en) 2010-05-18
US20050282516A1 (en) 2005-12-22
WO2006033681A3 (en) 2006-11-30
US7330709B2 (en) 2008-02-12
WO2006033681A2 (en) 2006-03-30

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