CA2581941A1 - Electronic filter device for the reception of tv-signals - Google Patents
Electronic filter device for the reception of tv-signals Download PDFInfo
- Publication number
- CA2581941A1 CA2581941A1 CA002581941A CA2581941A CA2581941A1 CA 2581941 A1 CA2581941 A1 CA 2581941A1 CA 002581941 A CA002581941 A CA 002581941A CA 2581941 A CA2581941 A CA 2581941A CA 2581941 A1 CA2581941 A1 CA 2581941A1
- Authority
- CA
- Canada
- Prior art keywords
- filter device
- electronic filter
- digital values
- conversion circuitry
- digitally modulated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03J—TUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
- H03J5/00—Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner
- H03J5/02—Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner with variable tuning element having a number of predetermined settings and adjustable to a desired one of these settings
- H03J5/0245—Discontinuous tuning using an electrical variable impedance element, e.g. a voltage variable reactive diode, in which no corresponding analogue value either exists or is preset, i.e. the tuning information is only available in a digital form
- H03J5/0254—Discontinuous tuning using an electrical variable impedance element, e.g. a voltage variable reactive diode, in which no corresponding analogue value either exists or is preset, i.e. the tuning information is only available in a digital form the digital values being transfered to a D/A converter
- H03J5/0263—Discontinuous tuning using an electrical variable impedance element, e.g. a voltage variable reactive diode, in which no corresponding analogue value either exists or is preset, i.e. the tuning information is only available in a digital form the digital values being transfered to a D/A converter the digital values being held in an auxiliary non erasable memory
Abstract
An electronic filter device for the reception of TV-signals, comprising a plurality of frequency determining elements settable by means of an analog setting voltage, a memory (2) for storing digital values representative of the analog setting voltages and conversion circuitry (11- 14) for converting the digital values into the analog setting voltages. The conversion circuitry comprises a first part (11-13) for generating a digitally modulated signal for each digital value, the digitally modulated signal having a modulated characteristic representative of the digital value, and a second part (14) for converting each of the digitally modulated signals into the analog setting voltages.
Claims (12)
1. An electronic filter device for the reception of TV-signals, comprising a plurality of frequency determining elements, each frequency determining element being settable by means of an analog setting voltage, a memory (2) for storing digital values representative of the analog setting voltages and conversion circuitry (11-14) for converting the digital values into the analog setting voltages, characterised in that the conversion circuitry comprises a first part (11-13) for generating a digitally modulated signal for each digital value, the digitally modulated signal having a modulated characteristic representative of the digital value, and a second part (14) for converting each of the digitally modulated signals into the analog setting voltages.
2. An electronic filter device according to claim 1, characterised in that the modulated characteristic is a duty cycle.
3. An electronic filter device according to claim 1, characterised in that the modulated characteristic is a frequency.
4. An electronic filter device according to any one of the claims 1-3, characterised in that the first part (11-13) of the conversion circuitry comprises a plurality of comparators (13), one for each digitally modulated signal, for comparing one of the digital values with a counter value, the counter value being delivered by a counter (11) which is provided for repeatedly counting through a predetermined value range.
5. An electronic filter device according to claim 4, characterised in that the counter (11) is common for a number of or all comparators (13).
6. An electronic filter device according to claim 5, characterised in that the comparators (13) are at least N bits wide and that the counter (11) is provided for repeatedly counting between 0 and at least 2N-1, N being the bit width of the digital values.
7. An electronic filter device according to any one of the previous claims, characterised in that the first part (11-13) of the conversion circuitry comprises at least one register (12), common for a number of or all comparators, for storing copies of the digital values stored in the memory (2).
8. An electronic filter device according to any one of the previous claims, characterised in that the first part (11-13) of the conversion circuitry is integrated in a field programmable gate array (15; 16).
9. An electronic filter device according to claim 8, characterised in that the field programmable gate array (15; 16) further integrates one or more of the following: a microcontroller (1), a PC-interface (3), an RF-detection circuit (7), user interface logic (4) and/or the memory (2) in which the digital values are stored.
10. An electronic filter device according to any one of the previous claims, characterised in that the second part (14) of the conversion circuitry comprises a plurality of integrators, one for each digitally modulated signal.
11. An electronic filter device according to claim 10, characterised in that the integrators (14) are implemented as RC-networks.
12. An electronic filter device according to any one of the previous claims, characterised in that the memory (2) is a non-volatile memory and that the device comprises a user interface (5, 6) for enabling a user to reprogram the digital values.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP04447213.2 | 2004-09-27 | ||
EP04447213 | 2004-09-27 | ||
PCT/EP2005/054816 WO2006035015A1 (en) | 2004-09-27 | 2005-09-26 | Electronic filter device for the reception of tv-signals |
Publications (2)
Publication Number | Publication Date |
---|---|
CA2581941A1 true CA2581941A1 (en) | 2006-04-06 |
CA2581941C CA2581941C (en) | 2012-08-21 |
Family
ID=35502562
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA2581941A Expired - Fee Related CA2581941C (en) | 2004-09-27 | 2005-09-26 | Electronic filter device for the reception of tv-signals |
Country Status (9)
Country | Link |
---|---|
US (1) | US7541957B2 (en) |
EP (1) | EP1794883B2 (en) |
AT (1) | ATE434864T1 (en) |
CA (1) | CA2581941C (en) |
DE (1) | DE602005015125D1 (en) |
ES (1) | ES2328503T5 (en) |
HK (1) | HK1106880A1 (en) |
PL (1) | PL1794883T5 (en) |
WO (1) | WO2006035015A1 (en) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2010084192A1 (en) | 2009-01-23 | 2010-07-29 | Unitron | Method and device for filtering desired filter frequency band from received tv signal |
PL2433361T3 (en) | 2009-05-20 | 2014-08-29 | Unitron | Tv signal distribution filter having planar inductors |
US20120131617A1 (en) * | 2009-05-25 | 2012-05-24 | Unitron | Control over coax for tv signal reception devices |
ES2397843T3 (en) | 2010-06-07 | 2013-03-11 | Angel Iglesias S.A. | Programmable television channel amplifier |
US10848165B1 (en) * | 2019-05-21 | 2020-11-24 | Silicon Laboratories Inc. | Performing low power refresh of a digital-to-analog converter circuit |
CN111757023B (en) * | 2020-07-01 | 2023-04-11 | 成都傅立叶电子科技有限公司 | FPGA-based video interface diagnosis method and system |
Family Cites Families (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3529247A (en) * | 1967-09-20 | 1970-09-15 | Us Army | Pulse repetition to analog voltage converter |
JPS547263A (en) † | 1977-06-20 | 1979-01-19 | Hitachi Ltd | D-a converter |
FR2523745B1 (en) * | 1982-03-18 | 1987-06-26 | Bull Sa | METHOD AND DEVICE FOR PROTECTING SOFTWARE DELIVERED BY A SUPPLIER TO A USER |
JPS5955623A (en) † | 1982-09-24 | 1984-03-30 | Sharp Corp | Digital/analog converting system |
JPS62210719A (en) † | 1986-03-12 | 1987-09-16 | Alps Electric Co Ltd | Electronic tuner |
JPS63204159A (en) | 1987-02-20 | 1988-08-23 | Canon Inc | Frequency-voltage converter |
IL82539A0 (en) * | 1987-05-15 | 1987-11-30 | Medaon Ltd | Video communication system and phase or frequency modulator included therein |
US5678211A (en) † | 1992-08-28 | 1997-10-14 | Thomson Consumer Electronics, Inc. | Television tuning apparatus |
ES2060528B1 (en) | 1992-10-21 | 1995-05-16 | Fagor S Coop Ltda | PROGRAMMABLE ELECTRONIC TUNER FOR COLLECTIVE ANTENNAS OF T.V. |
US5337338A (en) * | 1993-02-01 | 1994-08-09 | Qualcomm Incorporated | Pulse density modulation circuit (parallel to serial) comparing in a nonsequential bit order |
US5872603A (en) † | 1993-10-29 | 1999-02-16 | Sanyo Electric Co., Ltd. | Analog circuit controller using signals indicative of control voltage and type of control voltage |
JPH07147541A (en) | 1993-11-24 | 1995-06-06 | Mitsubishi Electric Corp | Semiconductor integrated circuit |
US5481560A (en) * | 1994-04-28 | 1996-01-02 | United Technologies Corporation | Digital-to-pulse width converter utilizing a distributed pulse width |
US5774084A (en) * | 1996-04-03 | 1998-06-30 | Sicom, Inc. | Method and apparatus for translating digital data into an analog signal |
US5764165A (en) * | 1996-05-03 | 1998-06-09 | Quantum Corporation | Rotated counter bit pulse width modulated digital to analog converter |
DE19929178C2 (en) * | 1999-06-25 | 2002-10-24 | Infineon Technologies Ag | Phase locked loop system |
US6600788B1 (en) † | 1999-09-10 | 2003-07-29 | Xilinx, Inc. | Narrow-band filter including sigma-delta modulator implemented in a programmable logic device |
US6172633B1 (en) * | 1999-09-24 | 2001-01-09 | Lsi Logic Corporation | Enhanced pulse width modulator |
GB0012773D0 (en) † | 2000-05-25 | 2000-07-19 | Radioscape Ltd | Programmable single-chip device and related development environment |
US6577158B2 (en) † | 2001-01-31 | 2003-06-10 | Stmicroelectronics, Inc. | Interconnect circuitry for implementing bit-swap functions in a field programmable gate array and method of operation |
-
2005
- 2005-09-26 ES ES05789530.2T patent/ES2328503T5/en active Active
- 2005-09-26 EP EP05789530.2A patent/EP1794883B2/en not_active Not-in-force
- 2005-09-26 CA CA2581941A patent/CA2581941C/en not_active Expired - Fee Related
- 2005-09-26 DE DE602005015125T patent/DE602005015125D1/en active Active
- 2005-09-26 WO PCT/EP2005/054816 patent/WO2006035015A1/en active Application Filing
- 2005-09-26 AT AT05789530T patent/ATE434864T1/en not_active IP Right Cessation
- 2005-09-26 US US11/576,075 patent/US7541957B2/en not_active Expired - Fee Related
- 2005-09-26 PL PL05789530T patent/PL1794883T5/en unknown
-
2007
- 2007-11-09 HK HK07112294.1A patent/HK1106880A1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
ES2328503T3 (en) | 2009-11-13 |
ES2328503T5 (en) | 2018-06-29 |
PL1794883T3 (en) | 2009-12-31 |
US7541957B2 (en) | 2009-06-02 |
US20080055142A1 (en) | 2008-03-06 |
EP1794883B1 (en) | 2009-06-24 |
WO2006035015A1 (en) | 2006-04-06 |
ATE434864T1 (en) | 2009-07-15 |
CA2581941C (en) | 2012-08-21 |
EP1794883B2 (en) | 2018-03-21 |
EP1794883A1 (en) | 2007-06-13 |
DE602005015125D1 (en) | 2009-08-06 |
PL1794883T5 (en) | 2018-08-31 |
HK1106880A1 (en) | 2008-03-20 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Wu | Several key issues on implementing delay line based TDCs using FPGAs | |
CA2581941A1 (en) | Electronic filter device for the reception of tv-signals | |
US7839194B2 (en) | Clock circuitry for generating multiple clocks with time-multiplexed duty cycle adjustment | |
US6985532B2 (en) | Ultra wideband (UWB) transmitter architecture | |
CN1447935B (en) | Method for generating clock signal and clock generator | |
CN103404034A (en) | Analogue-to-digital converter | |
KR20170053990A (en) | Latch circuit, double data rate ring counter based the latch circuit, hybrid counting apparatus, analog-digital converting apparatus, and cmos image sensor | |
US20060244647A1 (en) | Digital-to-analog converter and successive approximation type analog-to-digital converter utilizing the same | |
US20030179123A1 (en) | Analog-to-digital conversion using a counter | |
CN101335520A (en) | Clock generating circuit and clock generating control circuit | |
US8754690B2 (en) | Programmable duty cycle setter employing time to voltage domain referenced pulse creation | |
Kleinfelder et al. | MTD132-a new subnanosecond multi-hit CMOS time-to-digital converter | |
US7149275B1 (en) | Integrated circuit and method of implementing a counter in an integrated circuit | |
KR101119903B1 (en) | Timing generation circuit | |
US10341596B1 (en) | Image sensor system, associated timing control circuit thereof and associated method | |
US10890548B2 (en) | Resistive gas sensor and gas sensing method therefor | |
US9859887B2 (en) | Impedance-to-digital converter, impedance-to-digital converting device, and method for adjustment of impedance-to-digital converting device | |
US20210226614A1 (en) | Generating Voltage Pulse with Controllable Width | |
KR100594315B1 (en) | Multiple pulse generator | |
US9684022B2 (en) | Sensor device and sensing method using the same | |
CN113030587A (en) | Alternate sampling type FPGA-ADC system, alternate sampling method thereof and PET system | |
CN210405274U (en) | Circuit for converting PWM signal into voltage | |
CN116886092B (en) | Configurable counter, ramp generator, analog-to-digital converter and image sensor | |
US20020184274A1 (en) | Sinusoid synthesis | |
US11720066B2 (en) | Time-to-digital converter and phase-locked loop |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
EEER | Examination request | ||
MKLA | Lapsed |
Effective date: 20130926 |