CN100405296C - Method for extending serial guidance code quantity - Google Patents
Method for extending serial guidance code quantity Download PDFInfo
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- CN100405296C CN100405296C CNB2004100483855A CN200410048385A CN100405296C CN 100405296 C CN100405296 C CN 100405296C CN B2004100483855 A CNB2004100483855 A CN B2004100483855A CN 200410048385 A CN200410048385 A CN 200410048385A CN 100405296 C CN100405296 C CN 100405296C
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Abstract
The present invention discloses a method for extending serial bootstrap code quantity so as to solve the problem that bootstrap code quantity is limited because the limitation of a processor to addressing bit number when booting. The method comprise: the processor executes that an initial bootstrap is led in a secondary bootstrap with addressing bit number larger than that of the bootstrap; the secondary bootstrap is executed, a designated program is led from a serial memory by the processor controlled by the secondary bootstrap; the processor executes the designated program to complete corresponding operations.
Description
Technical field
The present invention relates to communication and field of computer technology, relate in particular to the method for extended serial guidance code amount.
Background technology
The guidance code storer of processor (Boot Rom generally comprises two kinds of EEPROM and Flash) is divided into parallel and two kinds of serials usually, is subjected to the product of certain limitation for power consumption, volume, adopts serial BootRom a kind ofly to select preferably.Serial Boot Rom generally adopts SPI (Serial PeripheralInterface) interface of standard, this interface is four line connected modes, comprising clock signal clk, chip selection signal CS, main device data output signal MOSI and main device data input signal MISO, as shown in Figure 1.Serial Boot Rom has some general operational orders, such as reading instruction, write command, writing and enable with write-protect etc., must send corresponding operational order earlier before main device carries out corresponding operating.
When powering on guiding (Boot) at every turn, the bootstrap of processor operation inside solidification, this boot is responsible for by the SPI interface code among the Boot Rom being moved the RAM storage space of processor, move the ram space first address that the back program pointer that finishes jumps to storage code, the application program of user that brings into operation, the Boot process finishes.The boot of processor inside solidification normally cannot be revised and visit concerning the user with the ROM space of depositing boot.
The SPI interface read sequential as shown in Figure 2: at first the read command of processor output serial Boot Rom is such as 0x03, export the address of the outside Boot Rom that will read then, processor just reads the data of specified address space by the MISO signalling channel afterwards.
Processor is when Boot, and the data layout that reads from outside Boot Rom is generated by the processor compiler of correspondence usually, and the common form of program code as shown in Figure 3.
At first, processor is generally several bytes from 0x00 position program code read effective marker and the partially-initialized parameter of Boot Rom, is made as n
1, resolve after reading in, obtain relevant information, whether effective such as current data block, the start address of real program code or relative displacement, size of program block or the like.If the effective marker indication effectively, then reading address pointer skew n
1Read the code block stem, establishing this stem is n
2Individual byte is read in the attribute of this section of post analysis code, then pointer offset n
2, read code segment according to the indication of code segment length, and indication is moved code block in the address space of inside according to code block internal storage first address.
The code block that common compiler is generated has polylith, and the piece number is relevant with the definition of chained file in the source code.Processor can judge whether whether this code block is last piece, continue to read code block thereby judge according to the attribute of code block.
Because during existing processor B oot, the addressing in outside Boot Rom space mostly is 8 or the 16bit address, therefore the size of entire process device size of code just is restricted (operation code of processor is all moved into from BootRom, so the addressing space of Boot Rom has directly determined the size of processor code amount).As adopt the 16bit addressing, only can deposit the code of 64KB among the then whole Boot Rom.For the system of more complicated, size of code can if select more high capacity, come storage code as the serial Boot Rom that selects the 24bit address well beyond 64KB, and then processor can't carry out normal Boot process.
Summary of the invention
The invention provides a kind of method of extended serial guidance code amount, the problem that causes the boot code amount to be restricted to the restriction of addressing bit number when guiding because of processor to solve in the prior art.
For addressing the above problem, the invention provides following technical scheme:
A kind of method of extended serial guidance code amount comprises the steps:
Processor is carried out bootstrap, imports the secondary boot program of addressing bit number greater than described bootstrap from serial storage; When described secondary boot program guides according to bootstrap the resolving of code block is write and stored, and this code is to adopt the address size of serial storage to come serial storage is carried out addressing when operation;
By depositing jump instruction at the first address of internal processes memory block, the body code that makes processor jump to the secondary boot program after finishing bootstrap brings into operation;
Carry out described secondary boot program, from serial storage, import designated program by this secondary boot programmed control processor;
Processor is carried out described designated program and is finished corresponding operating.
Wherein: the program of described appointment is application program or control program.When described designated program was control program, processor was carried out this control program and is controlled judgement, and carried out corresponding operating according to judged result.
Described control judgement is meant judges whether application program needs to upgrade; If then upgrade application program earlier, the application program after importing is upgraded is then also carried out, otherwise, directly import application program and execution.
The first address of the exterior guiding program storage of appointment is consistent in the first address that described designated program is stored in serial storage and the described secondary boot program.
The present invention by repeatedly guiding the coupling that realizes processor and high-capacity Boot Rom, has broken the restriction of some intrinsic Boot modes of processor itself, thereby has expanded the parking space of software code on the basis of existing technology.Adopt the present invention, when Boot, can expand the addressing space of Boot Rom as required, need not be confined to the support pattern of processor itself, thereby the dirigibility of system design is strengthened greatly Boot Rom.
Description of drawings
Fig. 1 is the connection diagram of processor and serial Boot Rom;
Fig. 2 is the sequential chart of SPI reading of data;
Fig. 3 is the storage format synoptic diagram of program code;
Fig. 4 reads the sequential chart of code effective marker word for bootstrap;
Fig. 5 reads the sequential chart of code stem for bootstrap;
Fig. 6 reads the sequential chart of code block for bootstrap;
Fig. 7 is a process flow diagram of the present invention.
Embodiment
The present invention adopts the repeatedly mode of guiding (Boot), promptly takes over the work of initial Boot program by quadratic B oot program, is finished the Boot process of user application by quadratic B oot program; And quadratic B oot program can be with the mode addressing Boot Rom of more address bit, thus during extensible processor Boot to the addressing capability of outside Boot Rom.
Present embodiment is connected to example with the processor of supporting 16bit Boot addressing and 24bit serial Boot Rom and comes that the present invention will be described.
Quadratic B oot program is write and is stored the resolving of code block during fully according to bootstrap Boot, and this code is to adopt the address of 24bit to come Boot Rom is carried out addressing when operation.Quadratic B oot program specifies the main body of this code to operate in the L2 or the external RAM memory block of processor in chained file, deposits jump instruction at the first address of internal processes memory block, jumps to the body code of quadratic B oot.Because solidifying initial Boot program is the first address that jumps to the internal processes memory block after finishing, therefore so both can guarantee that quadratic B oot program can normally be moved behind initial Boot, also can guarantee quadratic B oot program this can discharge himself shared address space after finishing quadratic B oot, does not influence the operation of user application.
Quadratic B oot program compilation is generated binary file, in the burned Boot Rom of the following step:
(1) at first writes n at the 0x00 place of Boot Rom
1First byte in the banner word removed in-1 program code effective marker word, and this byte is 0.Because at this moment Boot Rom needs the 24bit address, can guarantee the n that reads that processor can be correct with the addressing of 16bit mode the time like this
1Individual banner word.Sequential as shown in Figure 4.
(2) at the 0xn of Boot Rom
100 place writes n
2-1 code block stem has been removed first byte in the stem, and this byte is 0.Can guarantee that like this processor can correctly read n when the addressing of 16bit mode
2Individual headers in bytes, sequential are as shown in Figure 5.
(3) at the 0x of Boot Rom (n
1+ n
2) 00 place writes n
3The code block of-1 byte has been removed first byte in the stem, and this byte can guarantee to be 0 by add dummy instruction (NOP) in the source code first trip.Can guarantee that like this processor can correctly read n when the addressing of 16bit mode
3Individual code block, sequential are as shown in Figure 6.
Repeat above-mentioned (2), (3) step, quadratic B oot code is all write among the Boot Rom, the processor that then can guarantee only to support the 16bit addressing to carry out Boot can be finished the importing to quadratic B oot program when initial Boot.
The 0x (n of the final burned Boot Rom of software package code
1+ n
2+ n
3) 00 later address field, this first address of burned section need and quadratic B oot program in during Boot the outside Boot Rom first address of appointment consistent.
Consult shown in Figure 7ly, the detailed process of processor processing is as follows:
Step 10: begin bootstrap after processor powers on.
Step 20: bootstrap imports internal memory with quadratic B oot program with the addressing of 16bit mode from serial Boot Rom.
Step 30: after having imported the secondary boot program, processor is carried out the jump instruction of depositing in the first address of internal processes memory block, jumps to quadratic B oot program and operation.Quadratic B oot program is finished the importing of application program in the mode of 24bit addressing.
Step 40: executive utility, finish corresponding operation.As: initialization processor communication interface, beginning and PERCOM peripheral communication, signal processing operations that execution is relevant etc.
Step 50: finish guiding.
The program that the secondary boot program imports can also be the control program code, and control program is realized the Boot once more of application programs, thereby realized repeatedly Boot after finishing the control judgement and carrying out corresponding operating.
Control program can be used for judging whether to upgrade application code, if then new application code is upgraded original application code, and then the code after will upgrading imports internal memory and carries out, if do not need to upgrade then directly application program is imported internal memory and carry out.
Though present embodiment is connected to example with the processor of supporting 16bit Boot addressing and 24bit serial Boot Rom and describes, but application of the present invention is not limited in this, as the processor of supporting 8bit Boot addressing is connected with 16bit serial Boot Rom etc. and can adopts method of the present invention to carry out the expansion of serial boot size of code equally, and its principle is same as described above.
Claims (5)
1. the method for an extended serial guidance code amount is characterized in that this method comprises the steps:
Processor is carried out bootstrap, imports the secondary boot program of addressing bit number greater than described bootstrap from serial storage; When described secondary boot program guides according to bootstrap the resolving of code block is write and stored, and this code is to adopt the address size of serial storage to come serial storage is carried out addressing when operation;
By depositing jump instruction at the first address of internal processes memory block, the body code that makes processor jump to the secondary boot program after finishing bootstrap brings into operation;
Carry out described secondary boot program, from serial storage, import designated program by this secondary boot programmed control processor;
Processor is carried out described designated program and is finished corresponding operating.
2. the method for claim 1 is characterized in that, described designated program is application program or control program.
3. method as claimed in claim 2 is characterized in that, when described designated program was control program, processor was carried out this control program and controlled judgement, and carries out corresponding operating according to judged result.
4. method as claimed in claim 3 is characterized in that, described control judgement is meant judges whether application program needs to upgrade; If then upgrade application program earlier, the application program after importing is upgraded is then also carried out, otherwise, directly import application program and execution.
5. the method for claim 1 is characterized in that, the first address of the exterior guiding program storage of appointment is consistent in the first address that described designated program is stored in serial storage and the described secondary boot program.
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| Application Number | Priority Date | Filing Date | Title |
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| CNB2004100483855A CN100405296C (en) | 2004-06-30 | 2004-06-30 | Method for extending serial guidance code quantity |
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| CNB2004100483855A CN100405296C (en) | 2004-06-30 | 2004-06-30 | Method for extending serial guidance code quantity |
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| CN100405296C true CN100405296C (en) | 2008-07-23 |
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| CN107015833B (en) * | 2017-04-14 | 2020-06-09 | 湖南威胜信息技术有限公司 | Self-recovery method for embedded device application program |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001052062A2 (en) * | 2000-01-14 | 2001-07-19 | Advanced Micro Devices, Inc. | Computer system initialization via boot code stored in sequential access memory |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001052062A2 (en) * | 2000-01-14 | 2001-07-19 | Advanced Micro Devices, Inc. | Computer system initialization via boot code stored in sequential access memory |
| US6601167B1 (en) * | 2000-01-14 | 2003-07-29 | Advanced Micro Devices, Inc. | Computer system initialization with boot program stored in sequential access memory, controlled by a boot loader to control and execute the boot program |
Non-Patent Citations (14)
| Title |
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| Creating a Second-Level BootloaderforFLASHBootloadingonTMS320C6000 PlatformWithCodeComposerStudio2.2. Kimberly Daniel,Shivashankar Gangadhar.Digital Signal Processing Solutions. 2004 |
| Creating a Second-Level BootloaderforFLASHBootloadingonTMS320C6000 PlatformWithCodeComposerStudio2.2. Kimberly Daniel,Shivashankar Gangadhar.Digital Signal Processing Solutions. 2004 * |
| DIGITAL SIGNJAL PROCESSING SOLUTIONS. KIMBERLY DANIEL,3-6，9，18,SHIVASHANKAR GANGADHAR CREATING A SECOND-LEVEL BOOTLOADEFORFLASHBOOTLOADINGONTMS320C6000 PLATFORM WITHCODECOMPOSERSTUDIO2。2. 2004 微型机与应用. 陆侃芸，宋莹，季晓勇，10-11，TMS320C6000 DSP系统的引导设计. 2004 微型机与应用. 詹荣开，2，嵌入式系统BOOT LOADER 技术内幕. 2003 |
| DIGITAL SIGNJAL PROCESSING SOLUTIONS. KIMBERLY DANIEL,3-6，9，18,SHIVASHANKAR GANGADHAR CREATING A SECOND-LEVEL BOOTLOADEFORFLASHBOOTLOADINGONTMS320C6000 PLATFORM WITHCODECOMPOSERSTUDIO2。2. 2004 * |
| TMS320C54'x DSP 引导应用的研究. 宋光清，翟锦奎，胡宏智.郑州轻工业学院学报，第18卷第1期. 2003 |
| TMS320C54'x DSP 引导应用的研究. 宋光清，翟锦奎，胡宏智.郑州轻工业学院学报，第18卷第1期. 2003 * |
| TMS320C6000 DSP 系统的引导设计. 陆佩芸，宋莹，季晓勇.微型机与应用，第3卷. 2004 |
| TMS320C6000 DSP 系统的引导设计. 陆佩芸，宋莹，季晓勇.微型机与应用，第3卷. 2004 * |
| TMS320VC5509数传平台中串行引导的研究与实现. 褚超，杜栓义.今日电子，第11期. 2003 |
| TMS320VC5509数传平台中串行引导的研究与实现. 褚超，杜栓义.今日电子，第11期. 2003 * |
| 嵌入式系统BOOT LOADER技术内幕. 詹荣开.今日电子，第11期. 2003 |
| 嵌入式系统BOOT LOADER技术内幕. 詹荣开.今日电子，第11期. 2003 * |
| 微型机与应用. 詹荣开，2，嵌入式系统BOOT LOADER 技术内幕. 2003 * |
| 微型机与应用. 陆侃芸，宋莹，季晓勇，10-11，TMS320C6000 DSP系统的引导设计. 2004 * |
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Effective date of registration: 20110510 Address after: 100191 Haidian District, Xueyuan Road, No. 40, Patentee after: Inst of Telecommunication Science and Technolgoy Address before: 100083 No. 40, Haidian District, Beijing, Xueyuan Road Patentee before: Datang Mobile Communication Equipment Co., Ltd. |