CN100437724C - 图形控制芯片中的旁路像素时钟产生和crtc电路 - Google Patents

图形控制芯片中的旁路像素时钟产生和crtc电路 Download PDF

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CN100437724C
CN100437724C CNB2004100905024A CN200410090502A CN100437724C CN 100437724 C CN100437724 C CN 100437724C CN B2004100905024 A CNB2004100905024 A CN B2004100905024A CN 200410090502 A CN200410090502 A CN 200410090502A CN 100437724 C CN100437724 C CN 100437724C
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video data
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CN1601598A (zh
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O·科巴亚施
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Genesis Microchip Inc
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/12Systems in which the television signal is transmitted via one channel or a plurality of parallel channels, the bandwidth of each channel being less than the bandwidth of the television signal
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G5/006Details of the interface to the display terminal
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264Details of driving circuits
    • G09G2310/027Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02Details of power systems and of start or stop of display operation
    • G09G2330/021Power management, e.g. power saving
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2370/00Aspects of data communication
    • G09G2370/04Exchange of auxiliary data, i.e. other than image data, between monitor and graphics controller
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/02Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed
    • G09G5/06Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed using colour palettes, e.g. look-up tables
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39Control of the bit-mapped memory
    • G09G5/395Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen

Abstract

在一个视频处理单元中,一种以独立于像素时钟速率的时钟速率来提供一个视频数据流的方法。以本地时钟速率从一个视频源接收本地视频数据,在存储单元中存储视频数据,以存储器时钟速率读取视频数据的选定部分,光栅化选定的视频数据,打包光栅化的视频数据,通过链路的方式以链路速率将打包的视频数据发送到显示单元,其中链路速率与存储器时钟速率有直接关系。

Description

图形控制芯片中的旁路像素时钟产生和CRTC电路
相关申请的交叉参考
本专利申请根据35.U.S.C.119(e)要求(i)Kobayashi于2003年9月18日提交的,题目为“数字/模拟视频互连及其使用方法”的美国临时专利申请No.60/504,060(代理卷号为GENSP013P2)以及(ii)Kobayashi于2004年4月15日提交的,题目为“图形控制芯片中的旁路像素时钟产生以及CRTC电路”的美国临时专利申请No.60/562,737(代理卷号为GENSP113P)的优先权,上述两篇文件在此全部结合并作为参考。本申请也涉及下面的共同待决的美国专利申请,它们在此也被全部结合参考:(i)美国专利申请No.10/726,802(代理卷号:GENSP014),题目为“适配连接视频源和视频显示器的方法”,Kobayashi为发明人;(ii)美国专利申请No.10/726,438(代理卷号:GENSP015),题目为“多媒体数据包的高效传输的方法和装置”,Kobayashi为发明人;(iii)美国专利申请No.10/726,440(代理卷号:GENSP105),题目为“优化多媒体包传输速率的方法”,Kobayashi为发明人;(iv)美国专利申请No.10/727,131(代理卷号GENSP104),题目为“使用辅助频道用于视频监视训练”,Kobayashi为发明人;(v)美国专利申请No.10/726,350(代理卷号:GENSP106),题目为“降低多媒体数据包开销的方法”,Kobayashi为发明人;(vi)美国专利申请No.10/726,362(代理卷号:GENSP107),题目为“具有周期性的状态检查的基于包的闭环视频显示接口”,Kobayashi为发明人;(vii)美国专利申请No.10/726,895(代理卷号:GENSP108),题目为“最小化数字视频系统中所需的缓冲器”,Kobayashi为发明人;(viii)美国专利申请No.10/726,441(代理卷号:GENSP109),题目为“用于提供独立于链路字符时钟的像素数据的视频接口”,Kobayashi为发明人;(ix)美国专利申请No.10/726,934(代理卷号:GENSP110),题目为“链路时钟速率和像素/音频时钟速率的列举方法”,Kobayashi为发明人;以及(x)美国专利申请No.10/726,794(代理卷号;GENSP013),题目为“基于包的视频显示接口以及其使用方法”,Kobayashi为发明人。
技术领域
本发明涉及显示设备。尤其是,本发明描述了一种使用驱动LCD屏驱动电路的方法和装置。
背景技术
直至最近,几乎目前使用的所有电视都依赖于一种已知的设备,阴极射线管或者CRT来显示图像。为了在整个屏幕上显示一幅图像,电视机内部的电路要使用磁偏转线圈(水平偏转线圈从左向右移动电子束,垂直偏转线圈上下移动电子束)以“光栅扫描”的方式在屏幕上水平和垂直的移动电子束。附图1表明了一个传统的阴极射线管上的光栅100,其中电子束在屏幕上从左向右画了一行102a,然后迅速的返回到左侧104,并且画出另一个水平行102b,同时稍微的持续向下移动。当电子束达到底部行107的右侧时,其移回到屏幕的左上角,用106表示。当电子束“画”行102时,其打开,并且当其回扫到行104时,其关闭,因此其不会在屏幕上留下一个拖尾。术语水平回扫用于表示电子束在每行的末端移回到左侧,而术语垂直回扫表示其从光栅的底部移回到顶部106。
为了在一个CRT显示屏上显示一幅图像,每幅图像都作为一个帧序列传输,每一帧都包括多个水平扫描行。通常,提供时间基准信号将视频信号分成水平扫描行和帧。这些基准信号包括表明一帧的开始的VSYNC信号和表明下一个源扫描行的开始的HSYNC信号。以这种方式,图像被分成一些点,每个点都作为一个像素进行显示,每个像素都具有相应的像素时钟,指定产生像素的速率(单位是像素/秒)。因此,为了显示来自于诸如CPU,DVD播放器等的视频源的视频数据,传统的视频处理单元(VPU)要对视频数据进行处理,该视频处理单元以存储单元所确定的时钟速率将输入的视频数据(本地格式)转换成视频显示格式的视频数据,数据暂时存储在上述存储单元当中。
然后阴极射线管(CRT)控制单元通过增加定时和控制信号(如Hsync和Vsync)将显示格式的视频数据转换成CRT兼容的显示定时,不论显示单元是基于阴极射线管的显示器还是诸如LCD的固定像素显示器。以这种方式,只根据显示器需要CRT类型信号的假设,CRT控制单元将从视频源读出的视频数据转换到像素时钟速率φpixel。应当注意,严格依赖于CRT的常规考虑,输入信号已经从本地视频时钟φnative转换成像素时钟φpixel,然后以高于像素时钟φpixel的链路速率LR传送到显示单元。在显示器中,视频信号必须被像素时钟再生电路再次处理从而使视频数据正确显示。
因此,即使在像素时钟速率没有意义的情况下(具有固定像素显示的情况,例如LCD),传统的视频处理器需要CRT控制单元强迫不在CRT类型显示器上显示的视频信号与传统CRT要求相一致。
因此,在显示器不是基于CRT的情况下,需要一种不执行CRT的传统要求的视频处理器。
发明内容
提供了一种视频处理器结构,具体为用于同诸如液晶显示器(LCD)的数字显示器一起实现的方法,装置和系统,所述的数字显示器提供了与存储器时钟速率直接相关并且独立于像素速率的视频信号。
在一个视频处理单元中,一种以独立于像素时钟速率的时钟速率提供一个视频数据流的方法。以本地时钟速率从一个视频源接收本地视频数据,在存储单元中存储视频数据,以存储器时钟速率读取视频数据的选定部分,光栅化(rasterizing)选定的视频数据,打包光栅化的视频数据,通过链路的方式以链路速率将打包的视频数据发送到显示单元,其中链路速率与存储器时钟速率直接相关。
在另一个实施例中,公开了一种视频处理器,用于在通过链路与其耦合的非CRT类型显示单元上显示视频数据,包括:一个具有相关的存储器时钟速率的视频存储单元;一个视频包传送单元,用于以链路速率以视频数据包的形式将视频数据传送到非CRT类型的显示器,所述链路速率直接与存储器时钟速率φmemory相关,这样视频处理器就不需要一个CRT控制单元;一个与视频源耦合的接口,用于以本地时钟速率φnative和本地视频格式提供一个视频信号V1;一个与接口和视频存储单元耦合的存储器控制单元,用于接收视频数据并通过写入操作或修改操作将视频数据存储在视频存储单元中、与正被显示的视频窗口相对应的存储器空间位置上;以及一个与存储控制器耦合的光栅引擎,其中为了显示存储在存储单元中的视频数据,通过存储控制器以读出操作的方式,以存储器时钟速率φmemory从视频存储器读出存储的视频数据的选定部分,并且将其传送到光栅引擎,从而根据显示单元的特征将本地视频格式φnative的视频信号V1转换成具有可显示格式的视频信号V2
在又一个实施例中,公开了一种用于向耦合其上的显示单元提供可显示的视频数据的可配置的视频处理器。该视频处理器包括一个CRTC电路,一个耦合到CRTC电路的可选的CRT控制电路以及一个耦合到可选择的CRT控制电路的光栅引擎。该处理器也包括一个耦合到显示单元和可选择的CRT控制电路的显示询问单元,用于确定与显示单元相应的显示器类型,其中当显示器类型是非CRT类型的显示器时,显示询问单元向可选择的CRT控制电路发送第一信号,禁止(如果已启动的话)CRTC电路从而使可显示的视频数据直接从光栅引擎发送到显示单元,并且其中当显示询问器确定显示器是一个CRT类型显示器时,那么显示询问器发送第二信号到可选择的CRT控制电路,启动(如果已被禁止的话)CRTC电路,从而使可显示的视频数据在通过链路发送到显示单元之前,由CRTC电路进行处理。
附图说明
附图1表明了一个传统的阴极射线管的光栅。
附图2表明了根据本发明的一个实施例的视频处理单元(VPU)的例子。
附图3表明了适于图2所示的VPU使用的LCD显示器的例子。
附图4表明了根据本发明的一个实施例用于在链路上进行传输的数据流的高级框图。
附图5表明了能够用于执行本发明的系统。
具体实施方式
现在将参照附图所示的本发明的特定实施例进行详细描述。尽管本发明是结合特定的实施例进行描述的,但是应用理解上述描述并不是将本发明局限于所述的实施例。相反,其期望覆盖包含在附加的权利要求所定义的本发明的精神和范围内的各种替换,变形和等价物。
直至最近,几乎目前使用的所有电视都依赖于一种已知的设备,阴极射线管或者CRT来显示图像。为了在整个屏幕上显示一幅图像,电视机内部的电路要使用磁偏转线圈(水平偏转线圈从左向右移动电子束,垂直偏转线圈上下移动电子束)以“光栅化”的方式在屏幕上水平和垂直的移动电子束。为了显示来自于一个视频源,例如CPU,DVD播放器等的视频数据,传统的视频处理单元(VPU)要对视频源所提供的本地时钟速率φnative的视频数据进行处理,所述处理是将视频数据存储在视频存储单元当中,直到从存储器中以存储器时钟速率φmemory将其读出并且由光栅引擎进行处理,从而根据图像将要显示于其上的显示单元的特征,将本地格式的视频数据转换成具有可显示格式的视频信号。
然后阴极射线管(CRT)控制单元通过增加定时和控制信号(例如Hsync和Vsync)使用显示定时来转换视频信号,不论显示单元是基于阴极射线管的显示器或者诸如LCD的固定像素显示器。以这种方式,CRT控制单元仅仅取决于显示器需要CRT类型信号的假设,就将以存储器时钟速率φmemory读取的视频数据转换到像素时钟速率φpixel。一旦CRT控制单元增加了基于CRT的控制和定时信号,就通过链路以链路速率LR将视频信号传送到显示单元。因此,即使在像素时钟速率没有意义(例如使用诸如LCD的固定像素显示器)的情况下,传统的视频处理器也要求CRT控制单元迫使不在一个CRT类型显示器上显示的视频信号与传统的CRT要求相一致。
因此,本发明描述了当视频信号将在一个诸如LCD的非CRT类型的显示单元上显示时,不需要执行CRT的常规要求的方法,系统和装置。尤其是,发明的视频处理器不需要强迫视频信号与像素时钟一致,但是通过以与存储器时钟速率直接相关的链路速率来传送视频数据包中的视频数据,从而保持存储器时钟速率。以这种方式,在显示单元连接了一个非CRT类型的显示器的情况下,发明的视频处理器不需要一个CRT类型控制单元。在一些实施例中,发明的处理器专用于一个固定像素显示器,并且因此去除了CRT控制器和相关的全部电路,而在另一个实施例中,为了保持与所有可能的显示条件相兼容,包括一个可选择的CRT控制电路。CRT控制器和相关电路的选择(或者未选)取决于初始化处理过程中的显示特征的询问,视频处理器会询问是否是一个CRT类型的显示器。
现在将根据具有代表性的LCD屏板来描述本发明。但是,应当注意任何的数字固定像素显示器,例如LCD,等离子,DLP也可以使用,并且下面描述中的LCD屏板的使用不能被看作是对本发明的范围或者意图的限制。应当注意本发明也适于与任何基于数据包的视频显示接口共同使用,所述的数据包例如在2003年12月3日提交的题目为“基于数据包的视频显示接口以及其使用方法”的待决的美国专利申请No.10/726,794以及由Kobayashi同时提交的题目为“使用包转移驱动LCD屏板驱动电路”的美国专利申请_________中有所描述,上述两篇专利申请在此结合以供参考。
因此,附图2表明了根据本发明的一个实施例的视频处理单元(VPU)200的例子。VPU200包括一个与诸如CPU,DVD播放器等能够以本地时钟速率φnative以及本地时钟格式提供视频信号V1的视频源(未显示)耦合的接口202。应当注意视频源可以包括数字图像源(即,静止或者数字视频源)和/或模拟图像(即静止或者模式视频)源。因此,视频源提供具有任何数目和类型的已知格式的多种视频信号,例如复合视频,串行数字,并行数字,RGB,或者用户数字视频。视频信号可以是模拟视频信号,只要信号源中包括某种形式的模拟视频源,例如模拟电视机,照相机,模拟VCR,DVD播放器,可携式摄像机,激光盘播放器,TV调谐器,机顶盒(利用卫星DSS或者有线信号)等。源也可以包括数字图像源,例如一个数字电视机(DTV),数字照相机,等。数字视频信号可以是任何数目和类型的已知的数字格式,例如SMPTE274M-1995(1920×1080分辨率,逐行或者隔行扫描),SMPTE296M-1997(1280×720分辨率,逐行扫描),以及标准480逐行扫描视频。
一旦接收到视频数据V1,就将其存储在耦合到接口202的视频存储单元204中、与正在显示的视频窗口相对应的存储器空间位置处。在多数情况下,存储单元204的尺寸足以存储至少一整帧视频数据。为了显示存储在存储单元204中的视频数据,以存储器时钟速率φmemory从存储器204读出视频数据V1的选定部分,并且由光栅引擎206进行处理从而根据显示单元208的特性将本地格式的视频数据转换成具有可显示格式的视频信号V2。例如,如果本地格式是8比特视频数据并且显示单元208需要24比特的视频数据,那么光栅引擎206在转换处理过程中就可以选择使用彩色查找表(CLUT)20。
一旦已经正确形成了在显示单元208上显示的视频信号V2,打包器212就将视频信号V2打包成一些数据流215形式的数据包214。数据流215通过链路216以传输速率传输到显示器208,所述的传输速率指的是独立于视频数据的本地流速率φnative,但是与存储器时钟速率φmemory直接相关(即,LR=α×φmemory)的链路速率LR。在所述的实施例中,链路216的速度或者链路速率可以配置成包括逻辑数据信道(未显示),其能够被调整从而补偿链路环境。例如,以2.5Gbps每信道,链路216能够在每个单一信道上支持每像素18比特的彩色深度的SXGA 60Hz。应当注意信道数目的减少不仅降低了互连的成本,而且降低了能量消耗,这是诸如便携式设备等能量敏感型设备需要重点考虑(和期望)的问题。但是,通过将信道的数目增加到4,链路216能够支持60Hz的每像素24比特的彩色深度的WQSXGA(3200×2048图像分辨率)和60Hz的每像素18比特的彩色深度的QSXGA(2560×2048),而不需要进行数据压缩。即使在每信道1.0Gbps的最低速率的情况下,仅需要两个信道来支持一个未压缩的HDTV(即,1080i或者720p)数据流。
但是,应当注意,链路216的带宽必须大于在链路216上传输的所有数据流的总带宽。以这种方式,数据包被接收并且由合适配置的显示器208进行适当的处理,下面将描述一个这样的实施例,其不需要在VPU200或者在显示器208中产生像素时钟。在一个实施例中,VPU200能够可选地包括一个与一个CRT控制单元耦合的开关,该CRT控制单元仅在显示器是传统CRT类型显示器的情况下提供必需的CRT控制信号和定时。以这种方式,VPU能够适用于各种类型的显示器。
附图3表明了适于与VPU200共同使用的LCD显示器300。因此,LCD显示器300包括一个LCD屏板302,在屏板上具有多个以矩阵方式排列通过多个数据线308和多个栅极线310连接到一个数据驱动器306的图像元304(像素)。在所述的实施例中,这些图像元304呈现出在数据线308和栅极线310之间连接的多个薄膜晶体管(TFT)312的形式。在操作过程中,存储了视频数据的多个数据锁存器314中的每一个通过数据线308将数字数据信号输出到相关的数字/模拟转换器(DAC)。同时,包含在栅极驱动器320中的多个逻辑电路318中的每一个在与水平同步信号同步的定时向栅极线310依次输出一个预定的扫描信号。以这种方式,当预定的扫描信号被提供给栅极线310时,TFT312被打开从而通过数据线408传送DAC316所提供的模拟数据信号,其中数据线最终驱动选定的图像元304。
为了传送视频数据,VPU200形成了数据流215,数据流包括几个数据包214,数据包被接收并且由显示器接口322处理。在所述的实施例中,数据包214直接传送到包含在列驱动器306中的数据锁存器314,这样用于显示视频帧的特定帧行n所使用的全部视频数据(以像素数据的格式)在一行周期τ内被传送到数据锁存器314。因此,一旦每个数据锁存器314具有存储于其中的适当的像素数据,数据驱动器306就驱动LCD阵列302中的每个合适的TFT312。
附图4表明了用于在链路216上传输的数据流400的高级框图,其中由一些视频数据包402和音频数据包404复用形成一个数据流400。在该实施例中,视频数据包402与具有音频包504(流ID=2)格式的相关音频的UXGA图形1280×720p的视频(流ID=1)相容。在该实施例中,每个帧行由至少1280个像素(或者3840个子像素)构成,因此需要3840个数据锁存器用于在行周期τ内存储视频数据的一个帧行。例如,在一个实施例中,当在显示器接口322接收到数据流400时,一组3840数据包(由相应的包头406定义)被存储在帧缓冲器或者行缓冲器形式的存储器中。但是,也应当注意,如果需要严格的管道结构,存储器也可以被旁路或者没有存储器。
附图5表明了一个能够用于执行本发明的系统500。系统500仅是一个可以实现本发明的图形系统的示例。系统500包括中央处理单元(CPU)510,随机访问存储器(RAM)520,只读存储器(ROM)525,一个或者多个外部设备530,图形控制器560,主存储设备540和550,以及数字显示单元570。CPU510也耦合到一个或者多个输入/输出设备590。图形控制器560产生图像数据和相应的参考信号,并且将图像数据和参考信号提供给数字显示单元570。能够根据例如从CPU510或者从外部电路接收到的像素数据来产生图像数据。
尽管仅描述了本发明的几个实施例,但是应当理解本发明可以在不背离本发明的精神和范围的情况下以多种其他的特定形式实现。目前的例子仅是为了示例,不是为了限制,并且本发明也并不局限于这里所给出的细节,可以在追加的权利要求的范围以及其等价替换的范围内进行改变。
尽管本发明是以优选实施例的方式进行描述的,但是在本发明的范围内存在各种改变,转换和等价替换。应当注意存在多种备选方式来实现本发明的处理方法和装置。因此本发明期望被理解成包含落入到本发明的精神和范围内的所有改变,转换和等价替换。

Claims (9)

1.在一个视频处理单元中,一种以独立于像素时钟速率的时钟速率提供视频数据流的方法,包括:
以本地时钟速率从一个视频源接收本地视频数据;
在存储单元中存储视频数据;
以存储器时钟速率读取存储单元中的视频数据的选定部分;
光栅化选定的视频数据;
将光栅化的视频数据打包成几个视频数据包;
通过链路以与存储器时钟速率直接相关的链路速率将打包的视频数据发送到显示单元。
2.根据权利要求1所述的方法,其中存储设备是一个用于存储至少与一个单独帧行相容的视频数据量的行缓冲器。
3.根据权利要求1所述的方法,其中每个视频数据包包括一个包头和一个包有效载荷,其中包头包括一个包ID,包有效载荷包括适于驱动相应像素的视频数据。
4.根据权利要求1所述的方法,其中光栅器与一个彩色查找表耦合。
5.一种视频处理器,用于在通过链路与其耦合的非CRT类型显示单元上显示视频数据,包括:
一个具有相关的存储器时钟速率的视频存储单元;
一个视频包传送单元,用于以链路速率以视频数据包的形式将视频数据传送到非CRT类型的显示器,所述链路速率直接与存储器时钟速率фmemory相关,这样视频处理器就不需要一个CRT控制单元;
一个与视频源耦合的接口,用于以本地时钟速率фnative和本地视频格式提供一个视频信号V1
一个与接口和视频存储单元耦合的存储器控制单元,用于接收视频数据并通过写入操作或修改操作将视频数据存储在视频存储单元中、与正被显示的视频窗口相对应的存储器空间位置上;以及
一个与存储控制器耦合的光栅引擎,其中为了显示存储在存储单元中的视频数据,通过存储控制器以读出操作的方式,以存储器时钟速率фmemory从视频存储器读出存储的视频数据的选定部分,并且将其传送到光栅引擎,从而根据显示单元的特征将本地视频格式фnative的视频信号V1转换成具有可显示格式的视频信号V2
6.根据权利要求5所述的一种视频处理器,其中非CRT类型的显示器是一个LCD类型的显示器。
7.根据权利要求5所述的一种视频处理器,进一步包括:
一个与光栅引擎耦合的打包器,用于将视频信号V2打包成视频数据包;
一个将打包器与链路耦合的链路接口,用于将视频数据包形成一个视频数据流,该视频数据流通过链路以独立于本地流速率фnative的链路速率LR传送到显示器,其中链路速率LR与存储器时钟速率фmemory直接相关。
8.根据权利要求7所述的一种视频处理器,其中链路被配置成包括几个可调整的逻辑数据信道,可以通过调整逻辑数据信道来补偿多种链路环境中的任何一种。
9.一种用于向耦合其上的显示单元提供可显示的视频数据的可配置的视频处理器,包括:
一个CRTC电路;
一个耦合到CRTC电路的可选择的CRT控制电路;
一个耦合到可选择的CRT控制电路的光栅引擎;
一个耦合到显示单元和可选择的CRT控制电路的显示询问单元,用于确定与显示单元相应的显示器类型,其中当显示器类型是非CRT类型显示器时,显示询问单元向可选择的CRT控制电路发送第一信号,以禁止(如果已启动的话)CRTC电路,从而使可显示的视频数据直接从光栅引擎发送到显示单元,并且其中当显示询问单元确定显示器是一个CRT类型显示器时,那么显示询问单元发送第二信号到可选择的CRT控制电路,以启动(如果已被禁止的话)CRTC电路,从而使可显示的视频数据在通过链路发送到显示单元之前,由CRTC电路进行处理。
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Families Citing this family (44)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8068485B2 (en) 2003-05-01 2011-11-29 Genesis Microchip Inc. Multimedia interface
US7405719B2 (en) * 2003-05-01 2008-07-29 Genesis Microchip Inc. Using packet transfer for driving LCD panel driver electronics
US7088741B2 (en) 2003-05-01 2006-08-08 Genesis Microchip Inc. Using an auxilary channel for video monitor training
US20040221315A1 (en) * 2003-05-01 2004-11-04 Genesis Microchip Inc. Video interface arranged to provide pixel data independent of a link character clock
US20040218599A1 (en) * 2003-05-01 2004-11-04 Genesis Microchip Inc. Packet based video display interface and methods of use thereof
US7733915B2 (en) * 2003-05-01 2010-06-08 Genesis Microchip Inc. Minimizing buffer requirements in a digital video system
US6992987B2 (en) * 2003-05-01 2006-01-31 Genesis Microchip Inc. Enumeration method for the link clock rate and the pixel/audio clock rate
US20040218624A1 (en) * 2003-05-01 2004-11-04 Genesis Microchip Inc. Packet based closed loop video display interface with periodic status checks
US8204076B2 (en) * 2003-05-01 2012-06-19 Genesis Microchip Inc. Compact packet based multimedia interface
US7068686B2 (en) 2003-05-01 2006-06-27 Genesis Microchip Inc. Method and apparatus for efficient transmission of multimedia data packets
US7620062B2 (en) * 2003-05-01 2009-11-17 Genesis Microchips Inc. Method of real time optimizing multimedia packet transmission rate
US8059673B2 (en) * 2003-05-01 2011-11-15 Genesis Microchip Inc. Dynamic resource re-allocation in a packet based video display interface
US7839860B2 (en) * 2003-05-01 2010-11-23 Genesis Microchip Inc. Packet based video display interface
US7567592B2 (en) * 2003-05-01 2009-07-28 Genesis Microchip Inc. Packet based video display interface enumeration method
US20040221312A1 (en) * 2003-05-01 2004-11-04 Genesis Microchip Inc. Techniques for reducing multimedia data packet overhead
US7424558B2 (en) * 2003-05-01 2008-09-09 Genesis Microchip Inc. Method of adaptively connecting a video source and a video display
US7487273B2 (en) * 2003-09-18 2009-02-03 Genesis Microchip Inc. Data packet based stream transport scheduler wherein transport data link does not include a clock line
US7800623B2 (en) 2003-09-18 2010-09-21 Genesis Microchip Inc. Bypassing pixel clock generation and CRTC circuits in a graphics controller chip
US7613300B2 (en) * 2003-09-26 2009-11-03 Genesis Microchip Inc. Content-protected digital link over a single signal line
US7634090B2 (en) * 2003-09-26 2009-12-15 Genesis Microchip Inc. Packet based high definition high-bandwidth digital content protection
US7956856B2 (en) * 2007-02-15 2011-06-07 Parade Technologies, Ltd. Method and apparatus of generating or reconstructing display streams in video interface systems
US8248960B2 (en) 2007-05-01 2012-08-21 Sharp Kabushiki Kaisha Data transmission with dynamic modulation scheme and/or transfer rate
US20090094658A1 (en) * 2007-10-09 2009-04-09 Genesis Microchip Inc. Methods and systems for driving multiple displays
US20090219932A1 (en) * 2008-02-04 2009-09-03 Stmicroelectronics, Inc. Multi-stream data transport and methods of use
US20090262667A1 (en) * 2008-04-21 2009-10-22 Stmicroelectronics, Inc. System and method for enabling topology mapping and communication between devices in a network
WO2009147839A1 (ja) * 2008-06-03 2009-12-10 キヤノン株式会社 通信デバイス及び変換アダプタ
US20100183004A1 (en) * 2009-01-16 2010-07-22 Stmicroelectronics, Inc. System and method for dual mode communication between devices in a network
JP5694292B2 (ja) * 2009-04-14 2015-04-01 エーティーアイ・テクノロジーズ・ユーエルシーAti Technologies Ulc 埋め込まれたクロックの回復
US8760461B2 (en) 2009-05-13 2014-06-24 Stmicroelectronics, Inc. Device, system, and method for wide gamut color space support
US8156238B2 (en) 2009-05-13 2012-04-10 Stmicroelectronics, Inc. Wireless multimedia transport method and apparatus
US8429440B2 (en) * 2009-05-13 2013-04-23 Stmicroelectronics, Inc. Flat panel display driver method and system
US8860888B2 (en) * 2009-05-13 2014-10-14 Stmicroelectronics, Inc. Method and apparatus for power saving during video blanking periods
US8291207B2 (en) * 2009-05-18 2012-10-16 Stmicroelectronics, Inc. Frequency and symbol locking using signal generated clock frequency and symbol identification
US8582452B2 (en) 2009-05-18 2013-11-12 Stmicroelectronics, Inc. Data link configuration by a receiver in the absence of link training data
US8370554B2 (en) * 2009-05-18 2013-02-05 Stmicroelectronics, Inc. Operation of video source and sink with hot plug detection not asserted
US8468285B2 (en) * 2009-05-18 2013-06-18 Stmicroelectronics, Inc. Operation of video source and sink with toggled hot plug detection
JP5570619B2 (ja) 2010-02-23 2014-08-13 ラムバス・インコーポレーテッド 異なるメモリ種類にアクセスする異なる速度での時分割多重化
US8671234B2 (en) 2010-05-27 2014-03-11 Stmicroelectronics, Inc. Level shifting cable adaptor and chip system for use with dual-mode multi-media device
CN102375714A (zh) * 2010-08-16 2012-03-14 慧荣科技股份有限公司 计算机系统及相关的影像绘图装置和显示装置
US8379145B2 (en) * 2011-01-25 2013-02-19 Silicon Image, Inc. Conversion and processing of deep color video in a single clock domain
US9053673B2 (en) 2011-03-23 2015-06-09 Parade Technologies, Ltd. Scalable intra-panel interface
US9106770B2 (en) * 2011-06-21 2015-08-11 Parade Technologies, Ltd. Column drivers with embedded high-speed video interface timing controller
US8988416B2 (en) 2012-12-14 2015-03-24 Parade Technologies, Ltd. Power reduction technique for digital display panel with point to point intra panel interface
CN114245029B (zh) * 2021-12-20 2023-08-01 北京镁伽科技有限公司 基于fpga的数据流处理方法、装置及pg设备

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1324163A (zh) * 2000-05-13 2001-11-28 三星电子株式会社 检测数据传输速率的装置及其方法
CN1326131A (zh) * 2000-05-24 2001-12-12 夏普株式会社 图象显示系统
US20020089517A1 (en) * 1998-06-18 2002-07-11 Harold Aaron Ludtke Method of and apparatus for handling high bandwidth on - screen - display graphics data over a distributed ieee 1394 network utilizing an isochronous data transmission format
CN1393084A (zh) * 2000-08-21 2003-01-22 索尼公司 数据流处理装置和方法以及程序存储介质

Family Cites Families (167)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4479142A (en) 1982-05-17 1984-10-23 M/A-Com Dcc, Inc. Interface apparatus and method for asynchronous encoding of digital television
US4868557A (en) * 1986-06-04 1989-09-19 Apple Computer, Inc. Video display apparatus
US4796203A (en) * 1986-08-26 1989-01-03 Kabushiki Kaisha Toshiba High resolution monitor interface and related interfacing method
DE68924737T2 (de) 1988-08-09 1996-05-02 Seiko Epson Corp Anzeigesignalgenerator.
US5369775A (en) 1988-12-20 1994-11-29 Mitsubishi Denki Kabushiki Kaisha Data-flow processing system having an input packet limiting section for preventing packet input based upon a threshold value indicative of an optimum pipeline processing capacity
JPH02226416A (ja) 1989-02-28 1990-09-10 Toshiba Corp カラー液晶表示制御装置
KR910006834A (ko) * 1989-09-29 1991-04-30 아오이 죠이치 전원회로의 제조건에 의해 휘도를 변경시킬수 있는 디스플레이 제어장치
FR2670973B1 (fr) 1990-12-19 1994-04-15 Ouest Standard Telematique Sa Systeme de transmission par paquets a compression de donnees, procede et equipement correspondant.
CA2034634C (en) * 1991-01-21 1995-02-07 Seiji Kachi Spread packet communication system
JPH04328919A (ja) * 1991-04-26 1992-11-17 Fujitsu Ltd 無線呼出し信号方式
US5926155A (en) * 1993-02-02 1999-07-20 Hitachi, Ltd. Digital video display system
US5838875A (en) 1993-02-05 1998-11-17 Goldstar Co., Ltd. Apparatus and method for discriminating between analog and digital video signals in high definition video cassette recorder
KR100363588B1 (ko) * 1993-03-25 2003-02-17 세이코 엡슨 가부시키가이샤 화상처리장치
CN1123577A (zh) * 1993-04-05 1996-05-29 西尔拉斯逻辑公司 液晶显示器中串扰的补偿方法和设备
US5506932A (en) * 1993-04-16 1996-04-09 Data Translation, Inc. Synchronizing digital audio to digital video
WO1995000917A1 (en) 1993-06-21 1995-01-05 Multimedia Design Corporation Integrated multimedia information management system
US5581280A (en) * 1993-07-29 1996-12-03 Cirrus Logic, Inc. Video processing apparatus, systems and methods
US5488570A (en) * 1993-11-24 1996-01-30 Intel Corporation Encoding and decoding video signals using adaptive filter switching criteria
US5425101A (en) * 1993-12-03 1995-06-13 Scientific-Atlanta, Inc. System and method for simultaneously authorizing multiple virtual channels
US5739803A (en) * 1994-01-24 1998-04-14 Arithmos, Inc. Electronic system for driving liquid crystal displays
DE69509420T2 (de) * 1994-01-28 1999-12-16 Sun Microsystems Inc Schnittstelle für eine flache Anzeige bei einem hochauflösenden graphischen Computersystem
FI95756C (fi) 1994-03-21 1996-03-11 Nokia Technology Gmbh Menetelmä digitaalista informaatiota sisältävän bittivirran salaamiseksi ja salauksen purkamiseksi
FI97928C (fi) 1994-03-21 1997-03-10 Nokia Technology Gmbh Menetelmä digitaalisessa muodossa siirrettävän televisiolähetyksen salaamiseksi
US5615376A (en) * 1994-08-03 1997-03-25 Neomagic Corp. Clock management for power reduction in a video display sub-system
US5621455A (en) * 1994-12-01 1997-04-15 Objective Communications, Inc. Video modem for transmitting video data over ordinary telephone wires
US5541919A (en) * 1994-12-19 1996-07-30 Motorola, Inc. Multimedia multiplexing device and method using dynamic packet segmentation
US5953350A (en) * 1995-03-13 1999-09-14 Selsius Systems, Inc. Multimedia client for multimedia/hybrid network
US5745837A (en) * 1995-08-25 1998-04-28 Terayon Corporation Apparatus and method for digital data transmission over a CATV system using an ATM transport protocol and SCDMA
US5805173A (en) * 1995-10-02 1998-09-08 Brooktree Corporation System and method for capturing and transferring selected portions of a video stream in a computer system
US5835498A (en) 1995-10-05 1998-11-10 Silicon Image, Inc. System and method for sending multiple data signals over a serial link
US6005861A (en) 1995-11-22 1999-12-21 Samsung Electronics Co., Ltd. Home multimedia network architecture
GB2309872A (en) 1996-02-05 1997-08-06 Ibm Digital display apparatus
US5940137A (en) * 1996-03-01 1999-08-17 Trw Inc. Symbol timing generation and recovery for data transmission in an analog video signal
US5790083A (en) * 1996-04-10 1998-08-04 Neomagic Corp. Programmable burst of line-clock pulses during vertical retrace to reduce flicker and charge build-up on passive LCD display panels during simultaneous LCD and CRT display
US6154225A (en) 1996-10-11 2000-11-28 Silicon Motion, Inc. Virtual refresh™ architecture for a video-graphics controller
US6543053B1 (en) * 1996-11-27 2003-04-01 University Of Hong Kong Interactive video-on-demand system
JP3434653B2 (ja) * 1996-12-05 2003-08-11 富士通株式会社 マルチメディアデータ蓄積伝送方法及び装置
US5909465A (en) * 1996-12-05 1999-06-01 Ericsson Inc. Method and apparatus for bidirectional demodulation of digitally modulated signals
US6038000A (en) * 1997-05-28 2000-03-14 Sarnoff Corporation Information stream syntax for indicating the presence of a splice point
US6542610B2 (en) * 1997-01-30 2003-04-01 Intel Corporation Content protection for digital transmission systems
WO1998036533A1 (en) * 1997-02-17 1998-08-20 Communication & Control Electronics Limited Local communication system
US5949437A (en) * 1997-02-19 1999-09-07 Appian Graphics Corp. Dual video output board with a shared memory interface
US6104414A (en) 1997-03-12 2000-08-15 Cybex Computer Products Corporation Video distribution hub
US5918002A (en) * 1997-03-14 1999-06-29 Microsoft Corporation Selective retransmission for efficient and reliable streaming of multimedia packets in a computer network
US6151632A (en) 1997-03-14 2000-11-21 Microsoft Corporation Method and apparatus for distributed transmission of real-time multimedia information
US6177922B1 (en) * 1997-04-15 2001-01-23 Genesis Microship, Inc. Multi-scan video timing generator for format conversion
JP3385301B2 (ja) * 1997-04-23 2003-03-10 シャープ株式会社 データ信号線駆動回路および画像表示装置
US6219736B1 (en) * 1997-04-24 2001-04-17 Edwin E. Klingman Universal serial bus (USB) RAM architecture for use with microcomputers via an interface optimized for integrated services device network (ISDN)
US6049316A (en) * 1997-06-12 2000-04-11 Neomagic Corp. PC with multiple video-display refresh-rate configurations using active and default registers
US6020901A (en) * 1997-06-30 2000-02-01 Sun Microsystems, Inc. Fast frame buffer system architecture for video display system
US5852630A (en) 1997-07-17 1998-12-22 Globespan Semiconductor, Inc. Method and apparatus for a RADSL transceiver warm start activation procedure with precoding
GB2329741A (en) 1997-09-29 1999-03-31 Holtek Microelectronics Inc Liquid crystal display driver
JPH11175045A (ja) 1997-12-16 1999-07-02 Matsushita Joho System Kk 多画面映像表示制御装置及びその制御方法
US6353594B1 (en) * 1998-03-04 2002-03-05 Alcatel Canada Inc. Semi-permanent virtual paths for carrying virtual channels
US6249319B1 (en) * 1998-03-30 2001-06-19 International Business Machines Corporation Method and apparatus for finding a correct synchronization point within a data stream
US6356260B1 (en) * 1998-04-10 2002-03-12 National Semiconductor Corporation Method for reducing power and electromagnetic interference in conveying video data
JP2000078573A (ja) 1998-09-03 2000-03-14 Hitachi Ltd 階層符号化データ配信装置
US6326961B1 (en) 1998-09-30 2001-12-04 Ctx Opto-Electronics Corp. Automatic detection method for tuning the frequency and phase of display and apparatus using the method
AU9686898A (en) 1998-10-06 2000-04-26 Huey-Shiang Chen A method for just-in-time retrieval of multimedia files over computer networks by transmitting data packets at transmission rate determined frame size
US6661422B1 (en) * 1998-11-09 2003-12-09 Broadcom Corporation Video and graphics system with MPEG specific data transfer commands
US6330605B1 (en) 1998-11-19 2001-12-11 Volera, Inc. Proxy cache cluster
US6697376B1 (en) * 1998-11-20 2004-02-24 Diva Systems Corporation Logical node identification in an information transmission network
US20040198386A1 (en) 2002-01-16 2004-10-07 Dupray Dennis J. Applications for a wireless location gateway
US7194554B1 (en) * 1998-12-08 2007-03-20 Nomadix, Inc. Systems and methods for providing dynamic network authorization authentication and accounting
US7046631B1 (en) * 1999-01-22 2006-05-16 Alcatel Canada Inc. Method and apparatus for provisioning traffic dedicated cores in a connection oriented network
US6441857B1 (en) * 1999-01-28 2002-08-27 Conexant Systems, Inc. Method and apparatus for horizontally scaling computer video data for display on a television
JP3768712B2 (ja) * 1999-02-09 2006-04-19 キヤノン株式会社 攪拌手段、現像装置、およびプロセスカートリッジ
US6223089B1 (en) * 1999-03-15 2001-04-24 Raylar Design, Inc. Method and apparatus for controlling computers remotely
US6446130B1 (en) 1999-03-16 2002-09-03 Interactive Digital Systems Multimedia delivery system
US6973069B1 (en) 1999-03-23 2005-12-06 Motorola, Inc. Method for transporting multimedia information in a communication system
JP3816689B2 (ja) 1999-03-31 2006-08-30 株式会社東芝 情報配信装置、情報受信装置及び通信方法
US6542967B1 (en) * 1999-04-12 2003-04-01 Novell, Inc. Cache object store
US6765931B1 (en) * 1999-04-13 2004-07-20 Broadcom Corporation Gateway with voice
KR100336280B1 (ko) * 1999-05-21 2002-05-13 유혁 중간 데이터 기반의 비디오/오디오 스트리밍 방법
US8266657B2 (en) * 2001-03-15 2012-09-11 Sling Media Inc. Method for effectively implementing a multi-room television system
US6704310B1 (en) * 1999-06-30 2004-03-09 Logitech Europe, S.A. Header encoding method and apparatus for packet-based bus
EP1069721B1 (en) 1999-07-12 2004-01-02 International Business Machines Corporation Apparatus and method for setting a data rate in a wireless communication system
JP2001036900A (ja) 1999-07-22 2001-02-09 Matsushita Electric Ind Co Ltd 光伝送装置とその光伝送方法と伝送フォーマットおよび光伝送素子と投射型表示装置と映像表示装置および液晶表示装置とその駆動方法
US6598161B1 (en) * 1999-08-09 2003-07-22 International Business Machines Corporation Methods, systems and computer program products for multi-level encryption
US6477252B1 (en) 1999-08-29 2002-11-05 Intel Corporation Digital video content transmission ciphering and deciphering method and apparatus
US6614800B1 (en) 1999-09-02 2003-09-02 International Business Machines Corporation Method and system for virtual private network administration channels
US6633288B2 (en) 1999-09-15 2003-10-14 Sage, Inc. Pixel clock PLL frequency and phase optimization in sampling of video signals for high quality image display
US6608828B1 (en) * 1999-09-15 2003-08-19 Ericsson Inc. Methods and systems for decoding headers that are repeatedly transmitted and received along with data on a radio channel
US6779037B1 (en) 1999-09-28 2004-08-17 Levan Roberto Djaparidze Method of obtaining optimum use of a shared transmission medium for multimedia traffic
JP3950926B2 (ja) 1999-11-30 2007-08-01 エーユー オプトロニクス コーポレイション 画像表示方法、ホスト装置、画像表示装置、およびディスプレイ用インターフェイス
JP4277148B2 (ja) * 2000-01-07 2009-06-10 シャープ株式会社 液晶表示装置及びその駆動方法
JP2001218082A (ja) 2000-02-04 2001-08-10 Sony Corp ビデオインタフェースの画質改善方法及びビデオインタフェース回路装置
JP3349490B2 (ja) * 2000-02-14 2002-11-25 インターナショナル・ビジネス・マシーンズ・コーポレーション 画像表示方法、画像表示システム、ホスト装置、画像表示装置、およびディスプレイ用インターフェイス
JP4639420B2 (ja) 2000-03-08 2011-02-23 ソニー株式会社 信号伝送装置および信号伝送方法
US6647015B2 (en) * 2000-05-22 2003-11-11 Sarnoff Corporation Method and apparatus for providing a broadband, wireless, communications network
US6545688B1 (en) * 2000-06-12 2003-04-08 Genesis Microchip (Delaware) Inc. Scanning an image within a narrow horizontal line frequency range irrespective of the frequency at which the image is received
WO2002015162A2 (en) * 2000-08-17 2002-02-21 Innotive Corporation System and method for displaying large images with reduced capacity buffer, file format conversion, user interface with zooming and panning, and broadcast of different images
DE10041772C2 (de) 2000-08-25 2002-07-11 Infineon Technologies Ag Taktgenerator, insbesondere für USB-Geräte
GB2366678B (en) * 2000-09-09 2004-04-21 Ibm Optical amplitude demodulator
WO2002025822A2 (en) 2000-09-20 2002-03-28 Main.Net Communication Ltd. Multimedia communications over power lines
US20020075902A1 (en) * 2000-09-22 2002-06-20 Abbas Syed Aun Optimum overhead framing techniques for ADSL DMT modems
DE60120466T2 (de) * 2000-10-11 2007-01-18 Broadcom Corp., Irvine Effiziente Übertragung von RTP Paketen in einem Netzwerk
CN1148020C (zh) 2000-11-02 2004-04-28 北京算通数字技术研究中心有限公司 数字视音频广播与数据广播集成混播系统数据注入的方法
KR100349205B1 (ko) * 2000-11-17 2002-08-21 삼성전자 주식회사 디지탈 영상표시기기의 디브이아이 커넥터 검출 장치 및방법
JP2002171449A (ja) * 2000-11-30 2002-06-14 Sony Corp 表示装置および方法、並びに記録媒体
US6820614B2 (en) * 2000-12-02 2004-11-23 The Bonutti 2003 Trust -A Tracheal intubination
CA2327898A1 (en) * 2000-12-08 2002-06-08 Alcatel Canada Inc. System and method for establishing a communication path associated with an mpls implementation on an atm platform
KR100467643B1 (ko) * 2000-12-28 2005-01-24 엘지전자 주식회사 무선 랜에서의 멀티미디어 데이터 전송 방법
WO2002057917A2 (en) * 2001-01-22 2002-07-25 Sun Microsystems, Inc. Peer-to-peer network computing platform
US20020163598A1 (en) 2001-01-24 2002-11-07 Christopher Pasqualino Digital visual interface supporting transport of audio and auxiliary data
US7161998B2 (en) 2001-01-24 2007-01-09 Broadcom Corporation Digital phase locked loop for regenerating the clock of an embedded signal
KR100456367B1 (ko) 2001-02-13 2004-11-10 인피니온 테크놀로지스 아게 Xdsl데이터 전송 링크를 수립하기 위한 시스템 및 방법
US6934389B2 (en) 2001-03-02 2005-08-23 Ati International Srl Method and apparatus for providing bus-encrypted copy protection key to an unsecured bus
TW518844B (en) 2001-03-21 2003-01-21 Ind Tech Res Inst Transmission method of multimedia data packet in network system
JP3861614B2 (ja) 2001-03-29 2006-12-20 ティアック株式会社 インターフェース端子を具備する電子機器
US20020149617A1 (en) 2001-03-30 2002-10-17 Becker David F. Remote collaboration technology design and methodology
JP3781980B2 (ja) 2001-04-09 2006-06-07 Necディスプレイソリューションズ株式会社 データ転送システム
US7194009B2 (en) * 2001-04-14 2007-03-20 John Wai Tsang Eng Full-service broadband cable modem system
US6970481B2 (en) 2001-04-17 2005-11-29 Microsoft Corporation Methods and systems for distributing multimedia data over heterogeneous networks
US20020184327A1 (en) 2001-05-11 2002-12-05 Major Robert Drew System and method for partitioning address space in a proxy cache server cluster
JP3744819B2 (ja) 2001-05-24 2006-02-15 セイコーエプソン株式会社 信号駆動回路、表示装置、電気光学装置及び信号駆動方法
US7257163B2 (en) * 2001-09-12 2007-08-14 Silicon Image, Inc. Method and system for reducing inter-symbol interference effects in transmission over a serial link with mapping of each word in a cluster of received words to a single transmitted word
US7295578B1 (en) 2001-09-12 2007-11-13 Lyle James D Method and apparatus for synchronizing auxiliary data and video data transmitted over a TMDS-like link
JP4011320B2 (ja) * 2001-10-01 2007-11-21 株式会社半導体エネルギー研究所 表示装置及びそれを用いた電子機器
US20030076282A1 (en) * 2001-10-19 2003-04-24 Semiconductor Energy Laboratory Co., Ltd. Display device and method for driving the same
US7589737B2 (en) * 2001-10-31 2009-09-15 Hewlett-Packard Development Company, L.P. System and method for communicating graphics image data over a communication network
GB2383240B (en) * 2001-12-17 2005-02-16 Micron Technology Inc DVi link with parallel test data
US7106757B2 (en) * 2001-12-19 2006-09-12 Intel Corporation System and method for streaming multimedia over packet networks
JP3778079B2 (ja) * 2001-12-20 2006-05-24 株式会社日立製作所 表示装置
US7088398B1 (en) * 2001-12-24 2006-08-08 Silicon Image, Inc. Method and apparatus for regenerating a clock for auxiliary data transmitted over a serial link with video data
US7308059B2 (en) * 2002-02-06 2007-12-11 Broadcom Corporation Synchronization of data links in a multiple link receiver
US7120203B2 (en) * 2002-02-12 2006-10-10 Broadcom Corporation Dual link DVI transmitter serviced by single Phase Locked Loop
JP2003241724A (ja) 2002-02-15 2003-08-29 Rohm Co Ltd ディスプレイモニタ装置
US7099277B2 (en) * 2002-02-20 2006-08-29 Mitsubishi Electric Research Laboratories, Inc. Dynamic optimal path selection in multiple communications networks
JP4218249B2 (ja) * 2002-03-07 2009-02-04 株式会社日立製作所 表示装置
JP4373111B2 (ja) 2002-03-14 2009-11-25 パナソニック株式会社 テスト回路
US7161557B2 (en) 2002-04-08 2007-01-09 Clearcube Technology, Inc. Selectively updating a display in a multi-display system
US7283566B2 (en) * 2002-06-14 2007-10-16 Silicon Image, Inc. Method and circuit for generating time stamp data from an embedded-clock audio data stream and a video clock
DE10227199A1 (de) 2002-06-18 2004-01-08 Robert Bosch Gmbh Schnittstelle und Verfahren zur Bilddatenübertragung
KR100475060B1 (ko) 2002-08-07 2005-03-10 한국전자통신연구원 다시점 3차원 동영상에 대한 사용자 요구가 반영된 다중화장치 및 방법
US7319706B2 (en) * 2002-08-12 2008-01-15 Broadcom Corporation Symmetrical clock distribution in multi-stage high speed data conversion circuits
US7634675B2 (en) * 2002-09-05 2009-12-15 Gateway, Inc. Monitor power management
US7075987B2 (en) * 2002-09-23 2006-07-11 Intel Corporation Adaptive video bit-rate control
US20060036788A1 (en) * 2002-09-24 2006-02-16 Monster Cable Products, Inc. HDMI cable interface
US7286536B2 (en) * 2002-10-28 2007-10-23 Nokia Corporation Method and system for early header compression
US7802049B2 (en) * 2002-10-30 2010-09-21 Intel Corporation Links having flexible lane allocation
US7203853B2 (en) * 2002-11-22 2007-04-10 Intel Corporation Apparatus and method for low latency power management on a serial data link
US7555017B2 (en) * 2002-12-17 2009-06-30 Tls Corporation Low latency digital audio over packet switched networks
US20040203383A1 (en) 2002-12-31 2004-10-14 Kelton James Robert System for providing data to multiple devices and method thereof
US7248590B1 (en) * 2003-02-18 2007-07-24 Cisco Technology, Inc. Methods and apparatus for transmitting video streams on a packet network
US7525975B2 (en) * 2003-03-07 2009-04-28 Rami Caspi System and method for integrated audio stream manager
JP2004297773A (ja) 2003-03-12 2004-10-21 Matsushita Electric Ind Co Ltd データ通信方法及びデータ通信装置
US7197680B2 (en) 2003-04-17 2007-03-27 Arm Limited Communication interface for diagnostic circuits of an integrated circuit
US7068686B2 (en) 2003-05-01 2006-06-27 Genesis Microchip Inc. Method and apparatus for efficient transmission of multimedia data packets
US7733915B2 (en) 2003-05-01 2010-06-08 Genesis Microchip Inc. Minimizing buffer requirements in a digital video system
US20040218624A1 (en) 2003-05-01 2004-11-04 Genesis Microchip Inc. Packet based closed loop video display interface with periodic status checks
US7620062B2 (en) 2003-05-01 2009-11-17 Genesis Microchips Inc. Method of real time optimizing multimedia packet transmission rate
US20040218599A1 (en) 2003-05-01 2004-11-04 Genesis Microchip Inc. Packet based video display interface and methods of use thereof
US7088741B2 (en) 2003-05-01 2006-08-08 Genesis Microchip Inc. Using an auxilary channel for video monitor training
US7424558B2 (en) 2003-05-01 2008-09-09 Genesis Microchip Inc. Method of adaptively connecting a video source and a video display
US20040221312A1 (en) 2003-05-01 2004-11-04 Genesis Microchip Inc. Techniques for reducing multimedia data packet overhead
US6992987B2 (en) 2003-05-01 2006-01-31 Genesis Microchip Inc. Enumeration method for the link clock rate and the pixel/audio clock rate
US7405719B2 (en) * 2003-05-01 2008-07-29 Genesis Microchip Inc. Using packet transfer for driving LCD panel driver electronics
US20040221315A1 (en) 2003-05-01 2004-11-04 Genesis Microchip Inc. Video interface arranged to provide pixel data independent of a link character clock
US7296204B2 (en) 2003-05-30 2007-11-13 Wegener Communications, Inc. Error correction apparatus and method
US7487273B2 (en) * 2003-09-18 2009-02-03 Genesis Microchip Inc. Data packet based stream transport scheduler wherein transport data link does not include a clock line
US7800623B2 (en) 2003-09-18 2010-09-21 Genesis Microchip Inc. Bypassing pixel clock generation and CRTC circuits in a graphics controller chip
US7634090B2 (en) 2003-09-26 2009-12-15 Genesis Microchip Inc. Packet based high definition high-bandwidth digital content protection
KR20050099305A (ko) 2004-04-09 2005-10-13 삼성전자주식회사 디스플레이시스템 및 그 제어방법
US8996603B2 (en) * 2004-09-16 2015-03-31 Cisco Technology, Inc. Method and apparatus for user domain based white lists
US20060209890A1 (en) 2005-03-15 2006-09-21 Radiospire Networks, Inc. System, method and apparatus for placing training information within a digital media frame for wireless transmission
JP4596259B2 (ja) * 2005-08-30 2010-12-08 株式会社デンソー 車載用電子機器の配線再構成システム

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020089517A1 (en) * 1998-06-18 2002-07-11 Harold Aaron Ludtke Method of and apparatus for handling high bandwidth on - screen - display graphics data over a distributed ieee 1394 network utilizing an isochronous data transmission format
CN1324163A (zh) * 2000-05-13 2001-11-28 三星电子株式会社 检测数据传输速率的装置及其方法
CN1326131A (zh) * 2000-05-24 2001-12-12 夏普株式会社 图象显示系统
CN1393084A (zh) * 2000-08-21 2003-01-22 索尼公司 数据流处理装置和方法以及程序存储介质

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