CN101127923B - Built-in three-dimension digital imaging device and its method - Google Patents

Built-in three-dimension digital imaging device and its method Download PDF

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CN101127923B
CN101127923B CN200710059671A CN200710059671A CN101127923B CN 101127923 B CN101127923 B CN 101127923B CN 200710059671 A CN200710059671 A CN 200710059671A CN 200710059671 A CN200710059671 A CN 200710059671A CN 101127923 B CN101127923 B CN 101127923B
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module
dsp
striped
fringe pattern
spatial carrier
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CN101127923A (en
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彭翔
王晓东
田劲东
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Shenzhen University
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Shenzhen University
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Abstract

The utility model relates to an embedded three-dimensional digital imaging device and method, comprising a signal processing board arranged to a LCD, a digital projection unit and a sensor unit respectively to form an integral three-dimensional digital imaging device. The method of the device is as the below: (1) the digital projector is controlled by the signal processing board to generate spatial carrier-structured lighting that carrier fringe patterns are projected on the surface of the object; (2) coded fringe patterns on the surface of the object acquired by the CCD or CMOS sensor unit are collected by the signal processing board; (3) automatic fringe analysis is conducted by the embedded digital signal processor DSP assembled by the signal processing board to work out a phase distribution diagram relevant to height of the object and a three-dimensional digital image of the object; the DSP application program comprises five modules, namely, the main function module, the fringe processing task module, the spatial carrier fringe projection module, the coded fringe collection module and the image display module. The utility model has the advantages of high integrity, fast imaging, low power consumption and ability to realize fast three-dimensional digital imaging with multiple resolutions.

Description

Built-in three-dimension digital imaging device and method thereof
Technical field
The present invention relates to a kind of digital imaging method and device.Particularly relating to a kind of spatial carrier fringe pattern projection, IMAQ and strip encoding figure are handled all finishes in a device automatically, have good flexibility and reconfigurable property, be suitable for the built-in three-dimension digital imaging device and the method thereof of the three-dimensional sensing measurement of any complex surface profile.
Background technology
3 D digital imaging and moulding (3DIM-3D Digital Imaging and Modeling) are active research emerging interdisciplinary fields in the world in recent years.It is applied to all many-sides such as reverse engineering, historical relic's protection, medical diagnosis, industrial detection and virtual reality widely.As obtaining one of main means of three-dimensional information, based on the three-dimensional active vision system of phase mapping have that speed is fast, resolution is high, advantage such as noncontact and whole audience data are obtained and be subjected to extensive concern and research.Up to now, the real-world object that has arbitrary shape and size in the real world only has a very little part to be stored in the computer with the form of three-dimensional digital, and a large amount of application requirements 3 D digital imagings has the ability of fast processing complex object.In addition, existing three-dimensional image forming apparatus and manipulate has relatively complicatedly limited the promotion and application of 3 D digital imaging technology.
The development of microelectronics, transducer and computer science has driven the development of EMBEDDED AVIONICS, and the volume of embedded electronic device is little, has eliminated the software and hardware redundancy, and is low in energy consumption, flexible and convenient to use, applied range.A lot of three-dimensional measurements are used real-time, volume, speed, power consumption and the reliability of measuring system are had higher requirement in the reality.
The technical literature that can contrast has following several pieces in the prior art:
[1]F.Chen,G.M.Brown?and?M.Song,″Overview?of?three-dimensional?shapemeasurement?using?optical?methods,″Opt.Eng.39(1),10-22(2000)。Document [1] is the summary about the optical method 3 D digital imaging, has introduced the development and the know-why of various optical method 3 D digital imaging technology.
[2]C.R.Coggrave,J.M.Huntley.High-speed?surface?profilometer?based?ona?spatial?light?modulator?and?pipeline?image?processor[J].Opt.Eng.,1999,38(9):1573-1581。A kind of use image processor introduced by document [2] and pipelining realizes launching time phase three-dimension digital imaging method, and not enough point is: (1) has used a large amount of two-port RAMs, the cost height; (2) utilize look-up table to find the solution phase place fully, low precision, and can only be used for the phase demodulating of four step phase shifts, narrow application range, and the multistep phase shift helps reducing the periodic measurement error; (3) use the LCD spatial light modulator to realize fringe projection, the cost height, contrast is low.
[3] Li Mingming: the research of quick three-dimensional scanning system, photon journal .2002 31 (5), 611-615.Document [3] is based on the 3 D scanning system of line-structured light image-forming principle, and it uses the MS master-slave formula structure of PC and DSP.The dsp processor plug-in card is responsible for handling the data of collection, and realizes IMAQ with PC, complex structure, and 3-D scanning speed is slow.
[4]M.Rioux,three?dimensional?imaging?method?and?device.US.Patent,
[5] Peng Xiang, Zhang Peng, ox are foolish stupid: sequential frequency conversion striped throw light on reconfigurable dynamic 3 D digital sensing device and process.Patent of invention: ZL03130441.9;
[6] Jiang Zhuande, Tian Ailing, Huang Mengtao, Li Bing: based on the optical grating projection formula three-dimensional contour outline measuring set and the method for measurement of phase shift.Patent of invention: 200410026180.7 (application numbers).
Document [4,5,6] is the relevant domestic and international patent about 3 D digital imaging, and they all are to adopt all-purpose computer and image pick-up card to realize 3 D digital imaging, the system hardware structure complexity, and reliability is lower, and power consumption is big.
Summary of the invention
Technical problem to be solved by this invention is, provide a kind of spatial carrier fringe pattern projection, IMAQ and strip encoding figure are handled all in a device, to finish automatically, have good flexibility and reconfigurable property, be suitable for the built-in three-dimension digital imaging device and the method thereof of the three-dimensional sensing measurement of any complex surface profile.
The technical solution adopted in the present invention is: a kind of method that is used for built-in three-dimension digital imaging device includes following process:
(1) adopts embedded dsp DSP software and hardware control figure projecting apparatus span carrier structure optical illumination;
(2) pass through the strip encoding figure that the DSP embedded signal-processing board is gathered the body surface of CCD or the acquisition of CMOS sensing unit;
(3) use DSP embedded to carry out striped and analyze automatically, solve the 3-dimensional digital picture of PHASE DISTRIBUTION figure relevant and object with object height;
Above-mentioned three processes are to adopt the DSP application program that is made of following five modules to finish:
First module: the main function processing module to the DSP initialization, enters second module after initialization is finished;
Second module: striped Processing tasks thread module, in carrying out striped Processing tasks process, finish the task of three module and four module;
Described striped Processing tasks thread module includes following steps:
1) the frequency initial value f of spatial carrier fringe pattern is set 0, trigger spatial carrier fringe pattern projection thread module then;
2) the spatial carrier fringe pattern projection of the current frequency mode of system wait and collection finish;
3) revise Streak parameters, the striped frequency and the initial phase of projection next time is set, they are put into message queue QUE0; If the striped frequency f that is provided with 1Be less than or equal to striped peak frequency f s, then trigger spatial carrier fringe pattern projection thread module again; If the striped frequency f that is provided with 1Greater than striped peak frequency f s, enter next step.
4) fringe analysis parses the object phase diagram from several bar graphs;
5) whether the bar graph projection of judging all frequency modes finishes, and finishing enters next step, otherwise returns the 2nd) step;
6) at first according to the 4th) D coordinates value of the phase diagram reduction object depth image measurement point cloud rebuild of step, trigger the three-dimensional display thread then;
Three module: spatial carrier fringe pattern projection thread module enters four module after the end;
Described spatial carrier fringe pattern projection thread module includes following steps:
1) DSP reads the parameter of spatial carrier fringe pattern from a message queue QUE0;
2), and deposit pre-assigned display memory in according to spatial carrier fringe pattern parameter span carrier fringe figure;
3) display memory discharges the driver module to DSP;
4) timer of startup DSP enters delay and waits for, postpones to trigger strip encoding collecting thread module after the wait end;
Four module: strip encoding collecting thread module, when collection does not reach set point, return three module and repeat, when collection reaches set point, turn back to second module and continue to finish the striped Processing tasks, after finishing, the striped Processing tasks enters the 5th module;
Described strip encoding collecting thread module includes following steps:
1) buffer memory of allocated code bar graph collection is given acquisition driver;
2) postpone to wait for, wait for that IMAQ finishes;
3) whether the spatial carrier fringe pattern collection of judging n phase shift of a frequency mode is finished, if finish, then send semaphore SEM0 to striped Processing tasks thread module, otherwise return spatial carrier fringe pattern projection thread module, repeat the projection and the collection of spatial carrier fringe pattern;
The 5th module: graphical display thread module.
Described fringe analysis be adopt n phase shift algorithm and time phase method of deploying analyze.
The parameter of the spatial carrier fringe pattern that is read comprises striped frequency and fringe phase.
Built-in three-dimension digital imaging device of the present invention and method thereof have following characteristics:
1, compact conformation, integrated level height, image taking speed are fast, easy to use, low in energy consumption.Fringe projection and picking rate can reach video rate, can realize multiresolution 3 D digital imaging fast.Spatial carrier fringe pattern projection, IMAQ and strip encoding figure handle all and finish automatically in this device, need not man-machine interactively.
2, volume is little, in light weight, and this device can hand-held or is embedded in the plant equipment, is used to realize 3D computer vision detection, detection of obstacles and location etc. based on depth image.
3, have good flexibility and reconfigurable property.The present invention adopts the DSP embedded software program that the frequency and the phase shift of spatial carrier are set, and the strip encoding treatment of picture is also finished by dsp software.The systems soft ware of DSP adopts the establishment of C language, neatly the field change system parameter is set, and can easily add and reduce relevant functional module, for example three-dimensional display, depth image splicing etc. according to user's request.
4, reliability height, real-time performance are good.The processing core of device adopts the DM642DSP processor of the TI C64 of company core, has a plurality of processing units, can realize that high-speed image is handled and collection.For the stability and the real-time performance that guarantee system, the DSP application program is developed on the basis of real time operating system DSP/BIOS, and has used multithreading.
5, Zhuan Zhi universality is good, and the three-dimensional sensing that is suitable for any complex surface profile is measured.
Description of drawings
Fig. 1 overall structure schematic diagram of the present invention;
Fig. 2 is the structural representation of the signal-processing board of invention;
The dsp software schematic flow sheet of Fig. 3 the inventive method;
The design sketch that Fig. 4 is to use the present invention to measure.
Wherein:
101: signal-processing board 102: the digital projection unit
103: sensing unit 104: the projecting cell emergent pupil
105: sensing unit entrance pupil 106: supporting seat
107: LCD 201: digital signal processor DSP
202:FPGA chip 203: video encoder
204: Video Decoder 205:flash memory
206: dynamic random access memory SDRAM 207: the grid interface chip
208: power management module 209:CPLD chip
Embodiment
Below in conjunction with embodiment built-in three-dimension digital imaging device of the present invention and method thereof are made a detailed description.
As shown in Figure 1, built-in three-dimension digital imaging device of the present invention, include LCD 107, also be provided with signal-processing board 101, digital projection unit 102, sensing unit 103, be formed with projecting cell emergent pupil 104 in digital projection unit 102, projecting cell can be with the DLP projector of LED or other white light sources.Be formed with sensing unit entrance pupil 105 in the sensing unit 103 that receives image information, wherein signal-processing board 101 is connected with LCD 107, digital projection unit 102, sensing unit 103 respectively.Sensing unit 103 can adopt the camera of CCD or cmos image sensor.The sensing unit 103 of described reception image information is supported on the supporting seat 106.
Signal-processing board 101 produces the bar graph of certain space frequency and phase-shift phase, be entered into (DigitalMicromirror Device based on DMD, digital micro-mirror) DLP of technology (Digital light processing, digital light is handled) digital projection unit 102, thereby produce the spatial carrier fringe pattern of high-contrast, signal-processing board 101 is finished bar graph by signal-processing board 101 at last and is handled by CCD sensing unit 103 capturing and coding stripeds, calculates depth image.Result after bar graph is handled is presented on the LCD 107.
As shown in Figure 2, described signal-processing board 101 is embedded signal disposable plates, is the core component of whole system, includes: embedded dsp DSP201; The Video Decoder 204 that links to each other and be used for the ccd image signals collecting and data image signal is provided to digital signal processor DSP 201 with digital signal processor DSP 201; The fpga chip 202 of the view data that receives Projection Display of linking to each other with digital signal processor DSP 201; Link to each other with fpga chip 202 and to be used for the video encoder 203 of picture signal D/A conversion output; The grid interface chip 207 that links to each other with digital signal processor DSP 201; The power management module 208 of the signal-processing board 101 that links to each other with digital signal processor DSP 201; The flash memory 205 that links to each other with fpga chip 202 with digital signal processor DSP 201, the dynamic random access memory SDRAM206 of DSP outside and be used for flash disk and the CPLD chip 209 of keyboard interface control; The synchronizing signal output pin RST0 of Video Decoder 204 also links to each other with fpga chip 202.The input of described Video Decoder 204 is from sensing unit.
Digital signal processor DSP 201 is embedded dsp chips, and it has three high speed image input and output port VP0, VP1 (idle in native system, so there is not this port among the figure), VP2.The function of digital signal processor DSP 201 comprises the strip encoding figure that produces frequency conversion and phase shift, catches data image signal, strip encoding figure is carried out analytical calculation, carries out three-dimensional coordinate transformation.The function of fpga chip 202 comprises the adhesive logic and the display interface control of Circuits System, and fpga chip 202 receives the view data of Projection Display by the VP2 port of digital signal processor DSP 201.Video encoder 203 is the D/A conversion output that is used for data image signal, and the picture signal of video encoder 203 outputs is directly sent into digital projection unit 102 and LCD 107.Video Decoder 204 is used for the video image decoding of ccd video camera, be about to analog video signal and be converted to digital video signal, Video Decoder 204 arrives fpga chip 202 by RST0 pin output field synchronizing signal, after fpga chip 202 receives field sync signal, generate the external interrupt signal INT of digital signal processor DSP 201, so that the IMAQ interrupt service routine of triggered digital signal processor DSP201.Digital signal processor DSP 201 uses the data image signal of VP0 port processing Video Decoder 204 outputs.The high address A19-A22 of flash memory 205 uses fpga chip 202 to carry out addressing, and flash memory 205 is used for forever preserving DSP program, look-up table data and fpga logic program.Dynamic random access memory SDRAM206 is used for the data RAM and the program RAM of DSP outside.Grid interface chip 207 carries out exchanges data by the EMAC interface of digital signal processor DSP 201.The CPLD chip 209 that is used for the control of flash disk and keyboard interface is realized the external interface expansion of system.Flash memory 205 and dynamic random access memory SDRAM 206 are connected on the external memory interface bus EMIFA (comprising data, address bus and control signal) of digital signal processor DSP 20I, in addition exchanges data and interface control between digital signal processor DSP 201 use EMIFA interface buss realization DSP and fpga chip 202, the CPLD chip 209.
Because 3 D digital imaging relates to the great amount of images computing, so embedded dsp DSP201 has adopted the C64 series high-end DSP (digital signal processor) of Ti company.
The method that is used for built-in three-dimension digital imaging device of the present invention includes following process:
(1) adopt DSP embedded software and hardware control figure projecting apparatus to generate the illumination of striped spatial carrier;
(2) pass through the deforming stripe figure that the DSP embedded signal-processing board is gathered the body surface of CCD or the acquisition of CMOS sensing unit;
(3) use embedded dsp DSP to carry out striped and analyze automatically, solve the 3-dimensional digital picture of PHASE DISTRIBUTION figure relevant and object with object height;
As shown in Figure 3, above-mentioned three processes are to adopt the DSP application program that is made of following five modules to finish:
First module: the main function processing module to the dsp processor initialization, enters second module after initialization is finished;
Second module: striped Processing tasks thread module, in carrying out striped Processing tasks process, finish the task of three module and four module;
Three module: spatial carrier fringe pattern projection thread module enters four module after the end;
Four module: strip encoding collecting thread module, when collection does not reach set point, return three module and repeat, when collection reaches set point, turn back to second module and continue to finish the striped Processing tasks, after finishing, the striped Processing tasks enters the 5th module;
Unit the 5th: graphical display thread module.
Above-mentioned five concrete courses of work of module are described respectively below:
(1) main function processing module: in order to improve the program running efficient and the stability of digital signal processor DSP 201, system application has used the real time operating system BIOS kernel and the multithreading of TI company.Behind the DSP program start, at first enter the main function program, to registers group, BIOS real-time kernel (operating system nucleus of the dsp processor that dsp chip producer provides), external memory interface and the inner Cache initialization of dsp processor.After the main function withdrawed from, system program at first started " striped Processing tasks " by the scheduler program of BIOS kernel.
(2) striped Processing tasks thread module includes following steps:
1) the frequency initial value f of spatial carrier fringe pattern is set 0=t triggers spatial carrier fringe pattern projection thread module then; So that carry out frequency f 0The projection and the acquisition process of n step phase shift bar graph.
2) the spatial carrier fringe pattern projection of the current frequency mode of system wait and collection finish;
3) revise Streak parameters, the striped frequency and the initial phase of projection next time is set, they are put into message queue QUE0; If the striped frequency f that is provided with 1Be less than or equal to striped peak frequency f s, then trigger spatial carrier fringe pattern projection thread module again; If the striped frequency f that is provided with 1Greater than striped peak frequency f s, enter next step;
4) fringe analysis, adopt n phase shift algorithm and time phase method of deploying analyze, from several bar graphs, parse the object phase diagram;
Does 5) the bar graph projection of judging all frequency modes finish? finishing enters next step, otherwise returns for the 2nd step;
6) D coordinates value of the phase diagram reduction object depth image measurement point cloud of at first rebuilding according to the 4th step triggers the three-dimensional display thread then.
The step 4) fringe analysis of striped Processing tasks is the core algorithm of system, at dsp processor, we have used the fixed-point number computing to realize fringe analysis computational process (comprise and launch phase shift algorithm and time phase computing), (fixed-point number is a kind of method of computer representation numerical value, and computer uses fixed point and two kinds of method representation actual numerical values of floating-point.) specific embodiment is as follows:
Apparatus of the present invention can adopt for example five phase shift methods parsing phase places, and the different phase shift bar graphs of the n width of cloth of a frequency mode of collection are respectively I 1, I 2..., I nPhase place then
Figure G2007100596715D00061
X in the formula, y are the pixel coordinate of image, and sin and cos trigonometric function use look-up table to calculate.Arctan function tg -1(x finds the solution and uses segment lookup table and linear interpolation method, and it is made up of LUT1 and LUT2, the absolute value of independent variable x | x| be divided into three intervals [O, K) with [K, L), [L ,+∞).
If x) L, tg -1(x)=pi/2;
Otherwise, if 0≤x|<K, x sampling interval Δ x=2 -a, use look-up table LUT1;
Otherwise, if K≤| x|<L, x sampling interval Δ x=2 -b, use look-up table LUT2.
When using LUT1 or LUT2, from the look-up table index pointer, find out and | immediate two pointer value x of x| 1And x 2, x 1<x 2By pointer x 1And x 2From look-up table, retrieve tg -1(x 1)=A, tg -1(x 1)=B uses then
Figure G2007100596715D00071
Calculate | the arc-tangent value of x|.
Phase (x, y) rebuild after, utilize DSP by following multinomial formula calculate the object dimensional coordinate (x, y, z), a in the formula 1(x, y), a 2(x, y), a 3(x, y) and a 4(x, y) matrix is demarcated by structure and is obtained.M, m c, n, n c, e, d be also by demarcate obtaining.
z(x,y)=a 1(x,y)+a 2(x,y)·φ(x,y)+a 3(x,y)·[φ(x,y)] 2+a 4(x,y)·[φ(x,y)] 3
x=(m-m c)(ez+d)
y=(n-n c)(ez+d)
After the object dimensional coordinate Calculation is finished, trigger the graphical display thread, on LCD screen, measurement result is carried out sense of reality three-dimensional display and handle.
(3) spatial carrier fringe pattern projection thread module includes following steps:
1) DSP reads the parameter of spatial carrier fringe pattern from a message queue QUE0; The described parameter that reads spatial carrier fringe pattern comprises striped frequency and fringe phase.
2), and deposit pre-assigned display memory in according to spatial carrier fringe pattern parameter span carrier fringe figure; If actual projected fringe figure matrix notation be F (m, n), 0≤n≤N, 0≤m≤M (standard is shown standard, as PAL, N=720, M=576).(m n) makes generation in the following method to F, deposits pre-assigned display memory then in.
The spatial carrier fringe pattern frequency is f=2 t(striped number), t is an integer.Space periodic is T (pixel count/striped).L=fT is the number of pixels that effective fringe area covers, L<N.F 0Be that initial phase is zero bar graph, A is a modulation degree, and B is the bar graph gray threshold, then:
F 0 ( m , T · i + j + b l ) = A · cos [ 2 π ( f · ( j + 1 ) - 1 ) K ] + B ; i=0,1,...,f-1;j=0,1,...,T-1
B in the following formula 1Be the left margin or the initial position of effective fringe area, ordinal number i represents i striped, and ordinal number j is illustrated in j pixel in the period T.Cos functional value in the one-period obtains by the look-up table of trigonometric function, and K is the sample number of the cos function in the one-period.
For making striped be full of whole projected image, carried out boundary extension, the boundary extension method is shown below.
F 0(m, b l-i-1)=F 0(m, b l+ i+1) 0≤i<b l(continuation left)
F 0(m, i)=F 0(m, i-L) (b l+ L)≤i<N (continuation to the right),
If δ is the pixel count that moves according to the reality that angle of phase displacement θ calculates, the then last fringe projection figure that generates is.
F ( m , n ) = F 0 ( m , n + δ ) n + δ ≤ N F ( m , n ) = F 0 [ m , n + δ - T ] n + δ > N
3) display memory discharges the driver module to DSP; DSP sends spatial carrier fringe pattern to video coding chip as data by driver module, exports to the DLP projector, so that form the spatial carrier fringe pattern illumination.
4) timer of startup dsp processor enters delay and waits for, postpones to trigger strip encoding collecting thread module after the wait end.
(4) strip encoding collecting thread module includes following steps:
1) buffer memory of allocated code bar graph collection is given acquisition driver; So that gather a width of cloth strip encoding image by acquisition driver.Gathering to drive uses the VP0 video port of DSP to finish.
2) after the buffer memory distribution that strip encoding figure gathers, postpone to wait for certain hour, wait for that IMAQ finishes;
3) whether the spatial carrier fringe pattern collection of judging n phase shift of a frequency mode is finished, if finish, then send semaphore SEM0 to striped Processing tasks thread module, otherwise return spatial carrier fringe pattern projection thread module, repeat the projection and the collection of spatial carrier fringe pattern.
(5) graphical display thread module
The graphical display thread carries out the screen coordinate projective transformation to the object dimensional coordinate, and the three-dimensional coordinate point cloud of depth image is presented on the screen.
Below in conjunction with the DSP application program signal-processing board 101 implementation processes are described:
1, behind the system power-on reset, digital signal processor DSP 201 loads the DSP program to dynamic random access memory SDRAM 206 from flash memory 205, loads the trigonometric function look-up table to DSP internal data RAM;
2, digital signal processor DSP 201 operation fpga chips 202 data load programs to fpga chip 202, are finished the configuration of fpga chip 202 from flash memory 205 loaded with hardware logics;
3, carry out system initialization then, the internal register of initialization digital signal processor DSP 201 and the video encoder on the plate 203 and Video Decoder 204;
4, behind the system initialization, the program of digital signal processor DSP 201 enters the striped Processing tasks, sets Streak parameters, triggers the soft interrupt thread of fringe projection.The fringe projection thread generates a width of cloth strip encoding figure by look-up table, by the video port VP2 of inside, visits EDMA mode process fpga chip 202 to video encoder 203 transfer encoding bar graphs with the immediate data that strengthens;
5, after the spatial carrier fringe pattern projection output, the fringe projection thread triggers the strip encoding collection and interrupts;
6, after strip encoding figure gathers end, change the phase place of spatial carrier fringe pattern, trigger spatial carrier fringe pattern projection thread, trigger projection and gatherer process, up to the spatial carrier fringe pattern projection end of a mode frequency and phase shift.
7, after the spatial carrier fringe pattern projection of a mode frequency and phase shift finished, program changed the Processing tasks of strip encoding over to, according to phase shifting method and time phase method of deploying, the continuous phase bitmap that calculates object distributes;
8, change striped frequency and phase shift, before calculating, triggers in each strip encoding figure the interruption of spatial carrier fringe pattern projection again, repeat 4)~7) process, finish up to collection and the processing of the spatial carrier fringe pattern projection of all setpoint frequency patterns and phase shifting modes, strip encoding figure.
After phase diagram is rebuild, DSP routine call three-dimensional display module, at first calculate the three-dimensional coordinate of degree of depth cloud data, pass through translation and projection coordinate's conversion process then after, degree of depth cloud data is presented on the color LCD LCD 107 with the three-dimensional grid form.
Be an embodiment who provides design sketch shown in Figure 4 below:
Built-in three-dimension digital imaging device of the present invention adopts five step phase shift methods, the initial phase of striped code pattern is respectively 0 °, 72 °, 144 °, 216 ° and 288 °, and bar graph frequency selection 1,2,4,8,16,32,64 is seven spatial frequency patterns altogether.A tooth model (typical complicated curved face object) is selected by system, and as test case, the image pattern of the input is 768 * 576 pal mode.Embedded signal-processing board is set to 1 and 0 ° respectively with striped original frequency and initial phase parameter, and deposits the Streak parameters message queue in after starting in initialization procedure.Behind the system initialization, enter the projection thread, from the Streak parameters message queue, read sinusoidal data, generate the striped coded image, video port VP2, FPGA and video coding chip by DSP output to the DLP projecting apparatus, so that produce the illumination of spatial carrier fringe pattern; When each projection finished, the system start-up collecting thread was with the video port VP0 capturing and coding bar graph of video decoder chip and DSP.For each frequency mode striped, repeat five phase shifts, projection and collections.As projection and the five step phase shift figure that gathered a spatial carrier fringe pattern frequency, system changes the strip encoding Processing tasks over to, and the wrapped phase figure that calculates strip encoding figure distributes.The projection of the spatial carrier fringe pattern of system's iteration execution 1,2,4,8,16,32,64 7 kind of frequency and the Processing tasks of collection and corresponding encoded bar graph, calculate the wrapped phase figure of the strip encoding figure of every kind of frequency respectively, finally calculate the continuous phase bitmap of object according to these wrapped phases figure.According to demarcating matrix, distribute by the continuous phase bitmap and can obtain the three-dimensional point cloud coordinate of object depth image.Fig. 4 (a) is a rule encoding spatial carrier fringe pattern for the treatment of projection, (b) is the high-order bar graph of object, (c) is the wrapped phase figure of high-order striped, (d) is that final one of object launches phase diagram; (e) and (f) be the depth image of tooth mould, wherein (f) is the grid chart of trigonometric ratio.

Claims (3)

1. method that is used for built-in three-dimension digital imaging device is characterized in that: include following process:
(1) adopts embedded dsp DSP software and hardware control figure projecting apparatus span carrier structure optical illumination;
(2) pass through the strip encoding figure that the DSP embedded signal-processing board is gathered the body surface of CCD or the acquisition of CMOS sensing unit;
(3) use DSP embedded to carry out striped and analyze automatically, solve the 3-dimensional digital picture of PHASE DISTRIBUTION figure relevant and object with object height;
Above-mentioned three processes are to adopt the DSP application program that is made of following five modules to finish:
First module: the main function processing module to the DSP initialization, enters second module after initialization is finished;
Second module: striped Processing tasks thread module, in carrying out striped Processing tasks process, finish the task of three module and four module;
Described striped Processing tasks thread module includes following steps:
1) the frequency initial value f of spatial carrier fringe pattern is set 0, trigger spatial carrier fringe pattern projection thread module then;
2) the spatial carrier fringe pattern projection of the current frequency mode of system wait and collection finish;
3) revise Streak parameters, the striped frequency and the initial phase of projection next time is set, they are put into message queue QUE0; If the striped frequency f that is provided with 1Be less than or equal to striped peak frequency f s, then trigger spatial carrier fringe pattern projection thread module again; If the striped frequency f that is provided with 1Greater than striped peak frequency f s, enter next step;
4) fringe analysis parses the object phase diagram from several bar graphs;
5) whether the bar graph projection of judging all frequency modes finishes, and finishing enters next step, otherwise returns the 2nd) step;
6) at first according to the 4th) D coordinates value of the phase diagram reduction object depth image measurement point cloud rebuild of step, trigger the three-dimensional display thread then;
Three module: spatial carrier fringe pattern projection thread module enters four module after the end;
Described spatial carrier fringe pattern projection thread module includes following steps:
1) DSP reads the parameter of spatial carrier fringe pattern from a message queue QUE0;
2), and deposit pre-assigned display memory in according to spatial carrier fringe pattern parameter span carrier fringe figure;
3) display memory discharges the driver module to DSP;
4) timer of startup DSP enters delay and waits for, postpones to trigger strip encoding collecting thread module after the wait end;
Four module: strip encoding collecting thread module, when collection does not reach set point, return three module and repeat, when collection reaches set point, turn back to second module and continue to finish the striped Processing tasks, after finishing, the striped Processing tasks enters the 5th module;
Described strip encoding collecting thread module includes following steps:
1) buffer memory of allocated code bar graph collection is given acquisition driver;
2) postpone to wait for, wait for that IMAQ finishes;
3) whether the spatial carrier fringe pattern collection of judging n phase shift of a frequency mode is finished, if finish, then send semaphore SEM0 to striped Processing tasks thread module, otherwise return spatial carrier fringe pattern projection thread module, repeat the projection and the collection of spatial carrier fringe pattern;
The 5th module: graphical display thread module.
2. the method that is used for built-in three-dimension digital imaging device according to claim 1 is characterized in that, described fringe analysis be adopt n phase shift algorithm and time phase method of deploying analyze.
3. the method that is used for built-in three-dimension digital imaging device according to claim 1 is characterized in that the parameter of the spatial carrier fringe pattern that is read comprises striped frequency and fringe phase.
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