CN101131868B - 等待时间计数器 - Google Patents
等待时间计数器 Download PDFInfo
- Publication number
- CN101131868B CN101131868B CN2007101469399A CN200710146939A CN101131868B CN 101131868 B CN101131868 B CN 101131868B CN 2007101469399 A CN2007101469399 A CN 2007101469399A CN 200710146939 A CN200710146939 A CN 200710146939A CN 101131868 B CN101131868 B CN 101131868B
- Authority
- CN
- China
- Prior art keywords
- circuit
- counter
- clock pulse
- internal clock
- demoder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4076—Timing circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1072—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
Abstract
Description
Claims (6)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006-224575 | 2006-08-21 | ||
JP2006224575A JP4400601B2 (ja) | 2006-08-21 | 2006-08-21 | レイテンシカウンタ |
JP2006224575 | 2006-08-21 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101131868A CN101131868A (zh) | 2008-02-27 |
CN101131868B true CN101131868B (zh) | 2012-07-04 |
Family
ID=39101246
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2007101469399A Expired - Fee Related CN101131868B (zh) | 2006-08-21 | 2007-08-21 | 等待时间计数器 |
Country Status (4)
Country | Link |
---|---|
US (1) | US7630275B2 (zh) |
JP (1) | JP4400601B2 (zh) |
CN (1) | CN101131868B (zh) |
TW (1) | TWI363348B (zh) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
ATE517906T1 (de) * | 2004-06-23 | 2011-08-15 | Otsuka Chemical Co Ltd | Organische antimonverbindung, verfahren zu deren herstellung, initiator für die lebende radikale polymerisation, verfahren zur herstellung eines polymers unter anwendung davon, und polymer |
JP4745782B2 (ja) * | 2005-10-05 | 2011-08-10 | エルピーダメモリ株式会社 | 半導体記憶装置 |
JP5666077B2 (ja) * | 2007-07-04 | 2015-02-12 | ピーエスフォー ルクスコ エスエイアールエルPS4 Luxco S.a.r.l. | アドレスカウンタ及びこれを有する半導体記憶装置、並びに、データ処理システム |
JP5420827B2 (ja) * | 2007-07-04 | 2014-02-19 | ピーエスフォー ルクスコ エスエイアールエル | アドレスカウンタ及びこれを有する半導体記憶装置、並びに、データ処理システム |
JP2009020932A (ja) * | 2007-07-10 | 2009-01-29 | Elpida Memory Inc | レイテンシカウンタ及びこれを備える半導体記憶装置、並びに、データ処理システム |
JP5474315B2 (ja) | 2008-05-16 | 2014-04-16 | ピーエスフォー ルクスコ エスエイアールエル | レイテンシカウンタ及びこれを備える半導体記憶装置、並びに、データ処理システム |
JP5456275B2 (ja) | 2008-05-16 | 2014-03-26 | ピーエスフォー ルクスコ エスエイアールエル | カウンタ回路、レイテンシカウンタ及びこれを備える半導体記憶装置、並びに、データ処理システム |
JP5410075B2 (ja) * | 2008-11-11 | 2014-02-05 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置および遅延路の制御方法 |
JP2011060355A (ja) | 2009-09-08 | 2011-03-24 | Elpida Memory Inc | レイテンシカウンタ及びこれを備える半導体記憶装置、並びに、データ処理システム |
JP2011060354A (ja) | 2009-09-08 | 2011-03-24 | Elpida Memory Inc | レイテンシカウンタ及びこれを備える半導体記憶装置、並びに、データ処理システム |
JP2011060353A (ja) | 2009-09-08 | 2011-03-24 | Elpida Memory Inc | レイテンシカウンタ及びこれを備える半導体記憶装置、並びに、データ処理システム |
US8266471B2 (en) * | 2010-02-09 | 2012-09-11 | Mosys, Inc. | Memory device including a memory block having a fixed latency data output |
JP5595240B2 (ja) * | 2010-11-17 | 2014-09-24 | ピーエスフォー ルクスコ エスエイアールエル | 半導体装置 |
WO2014129386A1 (ja) * | 2013-02-19 | 2014-08-28 | ピーエスフォー ルクスコ エスエイアールエル | コマンドfifo回路 |
JP2014099238A (ja) * | 2014-01-08 | 2014-05-29 | Ps4 Luxco S A R L | 半導体装置 |
JP5661208B2 (ja) * | 2014-02-05 | 2015-01-28 | ピーエスフォー ルクスコ エスエイアールエルPS4 Luxco S.a.r.l. | レイテンシカウンタ |
CN106849041B (zh) * | 2017-03-27 | 2018-12-18 | 上海华力微电子有限公司 | 一种浪涌电流控制模块及其方法 |
US20190196563A1 (en) * | 2017-12-22 | 2019-06-27 | Mediatek Inc. | Cost-Effective Clock Structure For Digital Systems And Methods Thereof |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01291321A (ja) | 1988-05-18 | 1989-11-22 | Mitsubishi Electric Corp | 論理回路 |
JPH03250497A (ja) | 1990-02-27 | 1991-11-08 | Sanyo Electric Co Ltd | シフトレジスタ |
JP3204744B2 (ja) | 1992-07-22 | 2001-09-04 | 株式会社東芝 | 信号遅延メモリ回路 |
JPH06224746A (ja) | 1993-01-25 | 1994-08-12 | Olympus Optical Co Ltd | 同期式カウンタ回路 |
JPH08180667A (ja) | 1994-12-26 | 1996-07-12 | Fujitsu Ltd | 半導体記憶装置 |
JP4057084B2 (ja) | 1996-12-26 | 2008-03-05 | 株式会社ルネサステクノロジ | 半導体記憶装置 |
JPH11176158A (ja) * | 1997-12-10 | 1999-07-02 | Fujitsu Ltd | ラッチ回路、データ出力回路及びこれを有する半導体装置 |
JP2001319500A (ja) * | 2000-05-10 | 2001-11-16 | Mitsubishi Electric Corp | 半導体集積回路装置 |
US6728162B2 (en) * | 2001-03-05 | 2004-04-27 | Samsung Electronics Co. Ltd | Data input circuit and method for synchronous semiconductor memory device |
JP4419074B2 (ja) | 2004-11-15 | 2010-02-24 | エルピーダメモリ株式会社 | 半導体記憶装置 |
US7170819B2 (en) * | 2005-05-04 | 2007-01-30 | Infineon Technologies Ag | Integrated semiconductor memory device for synchronizing a signal with a clock signal |
JP4745782B2 (ja) | 2005-10-05 | 2011-08-10 | エルピーダメモリ株式会社 | 半導体記憶装置 |
-
2006
- 2006-08-21 JP JP2006224575A patent/JP4400601B2/ja not_active Expired - Fee Related
-
2007
- 2007-07-27 TW TW096127449A patent/TWI363348B/zh not_active IP Right Cessation
- 2007-08-06 US US11/882,801 patent/US7630275B2/en not_active Expired - Fee Related
- 2007-08-21 CN CN2007101469399A patent/CN101131868B/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
TWI363348B (en) | 2012-05-01 |
CN101131868A (zh) | 2008-02-27 |
JP2008047267A (ja) | 2008-02-28 |
US20080043566A1 (en) | 2008-02-21 |
US7630275B2 (en) | 2009-12-08 |
JP4400601B2 (ja) | 2010-01-20 |
TW200816197A (en) | 2008-04-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
ASS | Succession or assignment of patent right |
Owner name: PS4 LASCO CO., LTD. Free format text: FORMER OWNER: ELPIDA MEMORY INC. Effective date: 20130826 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20130826 Address after: Luxemburg Luxemburg Patentee after: ELPIDA MEMORY INC. Address before: Tokyo, Japan, Japan Patentee before: Elpida Memory Inc. |
|
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120704 Termination date: 20150821 |
|
EXPY | Termination of patent right or utility model |