CN101764975B - Digital demodulation device and digital demodulation method - Google Patents
Digital demodulation device and digital demodulation method Download PDFInfo
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- CN101764975B CN101764975B CN2008101886264A CN200810188626A CN101764975B CN 101764975 B CN101764975 B CN 101764975B CN 2008101886264 A CN2008101886264 A CN 2008101886264A CN 200810188626 A CN200810188626 A CN 200810188626A CN 101764975 B CN101764975 B CN 101764975B
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Abstract
The invention discloses a digital demodulation device and a digital demodulation method. The digital demodulation device for receiving an input signal is arranged at a receiver and comprises a phase splitter, a complex multiplier, a frequency automatic controller, a limiter, a repeat tracker, a phase detector, an oscillator and a back multiplier. The phase splitter generates a complex signal according to the input signal, and utilizes the complex multiplier to multiply a first phase signal and a second phase signal to generate a first base-frequency signal and a second base-frequency signal; the frequency automatic controller receives the first base-frequency signal to generate a first output signal, and the repeat tracker generates a modulating signal; the limiter generates a trend signal according to the first output signal; the phase detector modulates a multiplying signal multiplied by the trend signal and the second base-frequency signal according to the modulating signal; the oscillator generates and outputs the first phase signal and the second phase signal according to the phase detector; and the back multiplier multiplies the trend signal by the first base-frequency signal and the second base-frequency signal so as to generate digital demodulation output.
Description
Technical field
The present invention relates to a kind of digital demodulating apparatus, particularly relate to a kind of digital demodulating apparatus and digital demodulation method.
Background technology
Television signal transmission system widely uses in people's the life in modern times.The receiver of traditional television signal transmission system comprises digital demodulating apparatus, with as the frequency phase lock loop, in order to pin the frequency of input signal.In recent years, the numerical frequency phase-locked loop is used to replace the frequency phase lock loop of traditional analog.Yet, how in the process of the frequency of pinning input signal, in time amplify or reduction phase-locked loop frequency range, to pin frequency exactly, be the quite challenge of difficulty.If the opportunity of adjustment is incorrect, then the efficient of global solution adjusting system will significantly reduce.And if through very long a period of time, system all can't lock the frequency of input signal, also needs reset mechanism to make system open the process of following the trail of locking again.
Therefore, how to design a new digital demodulating apparatus and digital demodulation method, incoming frequency can be locked after in time amplifying or reducing the phase-locked loop frequency range apace, be called this area problem demanding prompt solution.
Summary of the invention
Therefore the object of the invention is providing a kind of digital demodulating apparatus exactly; It is arranged in the receiver; Digital demodulating apparatus receiving inputted signal wherein, digital demodulating apparatus comprises: phase splitter, complex multiplier, frequency automatic controller, limiter, repetition tracker, phase detectors, oscillator and back multiplier.Phase splitter is in order to produce complex signal according to input signal; Complex multiplier is in order to multiply by complex signal first phase signal and second phase signal to produce first fundamental frequency signal and second fundamental frequency signal; Frequency automatic controller is in order to receive first fundamental frequency signal to produce the first output signal; Limiter is in order to export signal to produce a trend signal according to first; Repeat tracker in order to produce the adjustment signal according to the first output signal; Phase detectors produce multiplying signal and according to the adjustment signal multiplying signal are adjusted in order to trend signal and second fundamental frequency signal multiply by mutually; Oscillator produces first and second phase signal in order to the output according to phase detectors; And the back multiplier is in order to multiply by first and second fundamental frequency signal respectively with the trend signal, to produce digital demodulation output.
Another object of the present invention is that a kind of digital demodulation method is being provided, and it is used for digital demodulating apparatus, and with adjustment phase-locked loop frequency range, digital demodulation method comprises the following step: produce complex signal according to input signal; Complex signal multiply by first phase signal and second phase signal to produce first fundamental frequency signal and second fundamental frequency signal; Export signal according to first fundamental frequency signal to produce first; Export signal to produce the trend signal according to first; The trend signal and second fundamental frequency signal multiply by the generation multiplying signal mutually; Produce the adjustment signal; Receive multiplying signal and,, adjust the phase place of multiplying signal, to produce the second output signal through changing at least one frequency range variable of digital demodulating apparatus according to the adjustment signal; Produce first and second phase signal according to the second output signal; And the trend signal multiply by first and second fundamental frequency signal respectively, to produce digital demodulation output.
The invention has the advantages that and can utilize the error that removes frequency and phase place in real time, with the locking complex signal, and can be in that noise is excessive can't pin frequency the time; Carry out the replacement of digital demodulating apparatus; To restart the frequency locking process, carry out frequency locking apace, and reach above-mentioned purpose easily.
Behind the execution mode of consulting accompanying drawing and describing subsequently, those of ordinary skills just can understand the object of the invention, and technological means of the present invention and execution mode.
Description of drawings
For letting above and other objects of the present invention, characteristic, advantage and the embodiment can be more obviously understandable, the detailed description of appended accompanying drawing be following:
Fig. 1 is the calcspar of the receiver of one embodiment of the invention;
Fig. 2 is the calcspar of the digital demodulating apparatus in the first embodiment of the present invention;
Fig. 3 is the calcspar of the phase place automatic controller in the first embodiment of the present invention;
Fig. 4 is in one embodiment of the invention, and the repetition tracker that Fig. 2 illustrated repeats tracker and produces the flow chart of adjustment signal to follow the trail of when input signal is not locked;
Fig. 5 is in one embodiment of the invention, the repetition tracker that Fig. 2 illustrated, and after complex signal was locked, system repeated tracker and produces the flow chart of adjustment signal to follow the trail of owing to disturb when becoming instability; And
Fig. 6 is in one embodiment of the invention, the repetition tracker that Fig. 2 illustrated, and after complex signal was locked, system repeated tracker and produces the flow chart of adjustment signal to follow the trail of owing to disturb when becoming instability.
Embodiment
Please with reference to Fig. 1, it is the calcspar of the receiver (receiver) 1 of one embodiment of the invention.Receiver 1 comprises tuner 10, digital demodulation (demodulator) device 12 and image processor 14.Tuner 10 is in order to receive less radio-frequency (radio frequency from antenna; RF) signal 11, and convert radio frequency signal 11 into intermediate-freuqncy signal (intermediate frequency; IF), also control the amplitude of adjustment intermediate-freuqncy signal through bandpass filtering.Through after the extremely digital conversion of simulation, the intermediate-freuqncy signal of simulation promptly converts digital signal 13 into, i.e. the input signal 13 of digital demodulating apparatus 12 again.Digital demodulating apparatus 12 receiving inputted signals 13, and lock with the frequency of frequency tracking mechanism to input signal 13, in the signal of being accepted to remove, the error on frequency and the phase place.After the frequency of locking input signal 13, produce fundamental frequency signal 15.Image processor 14 further processes fundamental frequency signal 15, like balanced (equalization), decoding, deinterleaving (de-interleaving), separate randomization (de-randomizing), (does not illustrate) to display floater to produce picture signal 17.
Fig. 2 is the calcspar of the digital demodulating apparatus 12 in the first embodiment of the present invention.Digital demodulating apparatus 12 comprises: phase splitter (phase splitter) 200, complex multiplier 202, frequency automatic controller 204, limiter 206, repetition tracker 212, phase detectors 218 and oscillator 214.Phase splitter 200 is in order to receiving foregoing input signal 13, and further input signal 13 is divided into real part and imaginary part, to produce complex signal (complex signal) S201.Complex multiplier 202 comprises a real part multiplier 202a and an imaginary part multiplier 202b in fact, complex signal S201 multiply by the first phase signal S203 and the second phase signal S205 to produce the first fundamental frequency signal S207 and the second fundamental frequency signal S209.Wherein the phase difference between first and second phase signal S203, S205 is 90 degree.The first fundamental frequency signal S207 is corresponding to the real part after multiplying each other, and the second fundamental frequency signal S209 is corresponding to the imaginary part after multiplying each other.
Frequency automatic controller 204 is in order to receive the first fundamental frequency signal S207 to produce the first output signal S211.Frequency error when between the output voltage of the voltage-controlled oscillator (not illustrating) of the first fundamental frequency signal S207 and internal system is more little, and then the absolute value of the first output signal S211 is big more.And on the contrary, when frequency error is big more, then the absolute value of the first output signal S211 is more little.When the interior electric voltage frequency of building during greater than the frequency of the first fundamental frequency signal S207, the value of the first output signal S211 be on the occasion of, and less than the time be negative value.Limiter 206 is then exported signal S211 to produce trend signal (trend signal) S213 according to first.When the first output signal S211 be on the occasion of, then trend signal S213 be+1, be negative value or 0 and ought first export signal S211, then trend signal S213 is-1.
Phase detectors 218 comprise multiplier module 208 and phase place automatic controller 210.Multiplier module 208 is in order to multiply by generation multiplying signal S215 with trend signal S213 and this second fundamental frequency signal S209 mutually.The adjustment signal S217 that phase place automatic controller 210 receives multiplying signal S215 and produced by repetition tracker 212; With through changing at least one phase-locked loop frequency range variable (loop gain, Ki, Kp) of phase place automatic controller 210, adjust the phase place of multiplying signal S215.
Repeat the first output signal S211 that tracker 212 detects frequency automatic controller 204, and the first output signal S211 and a plurality of critical value are compared to produce adjustment signal S217.Wherein, critical value can be calculated according to input signal 13.For instance, in one embodiment, critical value is according to average absolute peak value (the absolute peak value) decision of the oscillator intensity of input signal 13 in present time interval.In other embodiments, repeating a mean value and the critical value of the tracker 212 detections first output signal S211 in Preset Time interval compares to produce adjustment signal S217.After the adjustment through 210 pairs of phase-locked loops of phase place automatic controller frequency range variable, the adjustment of phase place automatic controller 210 generations one multiplying signal is S215 ' as a result, and exports oscillator 214 to.Oscillator 214 is a Numerical Control oscillator (numerically controlledoscillator in the present embodiment; NCO), with according to the adjustment of multiplying signal as a result S215 ' produce first and second phase signal S203, S205.In case the frequency of complex signal S201 is locked in place, after i.e. the processing of first and second fundamental frequency signal S207 and S209, export image processor 14 to through a back multiplier 216.Back multiplier 216 multiply by first and second fundamental frequency signal S207 and S209 respectively with trend signal S213, to produce digital demodulation output.
Fig. 3 has further illustrated the first embodiment of the present invention, at the calcspar of the phase place automatic controller 210 shown in Fig. 2.Phase place automatic controller 210 mainly comprise one have loop gain amplifier 30, and two frequency range variable controllers 31 (Ki) and 32 (Kp).In other embodiments, can design different phase place automatic controller according to different adjustment demands.By repeating the adjustment signal S217 that tracker 212 is produced, amplifier 30 and frequency range variable controller 31,32 have been controlled in fact, with adjustment phase-locked loop frequency range.Phase place automatic controller 210 has more comprised switch 33 and low pass filter 34.Switch 33 the frequency range variable the adjustment period separated, and after adjustment finishes, be connected to multiplying signal S215.Wherein, switch 33 receives multiplying signal S215 through low pass filter 34 only after complex signal S201 is locked, with the adjustment that produces muting multiplying signal S215 ' as a result.
For specifying by repeating the frequency lock mechanism that tracker 212 provides; Please with reference to Fig. 4, it is in one embodiment of the invention, the repetition tracker 212 that Fig. 2 illustrated; When input signal is not locked, repeats tracker 212 and produce the flow chart of adjustment signal S217 to follow the trail of.In step 401, repeat tracker 212 according to a plurality of critical values of the mean value calculation of input signal 13.For instance, in the present embodiment, according to input signal 13 real-time present mean value calculation lowest critical value thr_L, middle critical value thr_M and maximum critical value thr_H.Calculation mode can be expressed as:
Thr_L=A* (mean value now)
Thr_M=B* (mean value now)
Thr_H=C* (mean value now)
Wherein A, B, C are the constants of suitably selecting, and A＜B＜C.
Critical value is in order to judge the convergence situation of phase-locked loop frequency range.The absolute value of the first output signal S211 of frequency automatic controller 204 will become a bigger numeral at frequency error near 0 o'clock.
In step 402, judge whether complex signal S201 is locked in place in crash time interval.When complex signal S201 all was not locked at interval in a crash time, the first output signal S211 will compare with lowest critical value thr_L in step 403.When the first output signal S211 less than lowest critical value thr_L, then repeat tracker 212 will be in step 404 replacement digital demodulating apparatus 12.And work as the first output signal S211 greater than lowest critical value thr_L; Repeat tracker 212 and will judge that digital demodulating apparatus 12 is under the sizable situation of noise; But complex signal S201 remains and can trust, and judges further that in step 405 complex signal S201 is locked.
If do not surpass the crash time at interval as yet, then in step 406, will judge that whether the first output signal S211 is greater than middle critical value thr_M.As the first output signal S211 during greater than middle critical value thr_M; The adjustment signal S217 that repeats tracker 212 generations will adjust the frequency range variable in step 407a; With under the situation that is not lower than a minimum frequency range critical value; The phase-locked loop frequency range of reduction digital demodulating apparatus 12 is with the frequency near complex signal S201.As the first output signal S211 during less than middle critical value thr_M; The adjustment signal S217 that repeats tracker 212 generations will adjust the frequency range variable in step 407b; With under the situation that is not higher than a maximum frequency range critical value; Increase the phase-locked loop frequency range of digital demodulating apparatus 12, with frequency near complex signal S201.Maximum frequency range critical value and minimum frequency range critical value for fear of the phase-locked loop frequency range excessive or too small and be provided with.In step 408, will judge that whether the first output signal S211 is greater than maximum critical value thr_H.When the first output signal S211 greater than maximum critical value thr_H, then repeat tracker 212 and will judge that complex signal S201 be locked in step 409.When the first output signal S211 less than maximum critical value thr_H, then will return step 401 to continue to follow the trail of the frequency of complex signal S201.
Please with reference to Fig. 5, it is that the repetition tracker 212 that Fig. 2 illustrated after complex signal S201 is locked, when system becomes instability owing to interference, repeats tracker 212 and produces the flow chart of adjustment signal S217 to follow the trail of in one embodiment of the invention.If noise produces suddenly in receiver 1, then input signal will be influenced by noise, and frequency lock mechanism can't be pinned blocked complex signal S201 before again.Therefore, repeat tracker 212 and must produce adjustment signal S217 to lock complex signal S201 as early as possible again.In step 501, will be as aforesaid step 401, a calculated complex critical value.Then, the first output signal S211 and lowest critical value thr_L are compared, to judge that whether the first output signal S211 is less than lowest critical value thr_L in step 502.When the first output signal S211 less than lowest critical value thr_L, then in step 503, will check that whether the phase-locked loop frequency range is greater than maximum frequency range critical value.Not less than lowest critical value thr_L, then will return step 501 like the first output signal S211.When the first output signal S211 less than lowest critical value thr_L, and the phase-locked loop frequency range is during less than maximum frequency range critical value, adjustment signal S217 produces to adjust at least one frequency range variable, to increase the phase-locked loop frequency range of digital demodulating apparatus 12 in step 504.If the phase-locked loop frequency range during greater than maximum frequency range critical value, then repeats tracker 212 with replacement digital demodulating apparatus 12.
, also be that the repetition tracker 212 that Fig. 2 illustrated after complex signal S201 is locked, when system becomes instability owing to interference, repeats tracker 212 and produces the flow chart of adjustment signal S217 to follow the trail of in one embodiment of the invention please with reference to Fig. 6.At first, in step 601, will be still as aforesaid step 501, a calculated complex critical value.Then, the first output signal S211 and maximum critical value thr_H are compared, to judge that whether the first output signal S211 is greater than maximum critical value thr_H in step 602.When the first output signal S211 greater than maximum critical value thr_H, then in step 603, will check that whether the phase-locked loop frequency range is less than minimum frequency range critical value.Not greater than maximum critical value thr_H, then will return step 601 like the first output signal S211.When the first output signal S211 greater than maximum critical value thr_H, and the phase-locked loop frequency range is during greater than minimum frequency range critical value, adjustment signal S217 produces to adjust at least one frequency range variable, with the phase-locked loop frequency range of reduction digital demodulating apparatus 12 in step 604.If the phase-locked loop frequency range during greater than maximum frequency range critical value, then repeats tracker 212 and will not process and return step 601.
Digital demodulating apparatus provided by the present invention and digital demodulation method can remove the error of frequency and phase place in real time, with locking complex signal S201.If can't complex signal S201 be locked because of too much noise, then repeat tracker with the replacement digital demodulating apparatus to restart new tracking lock program, to lock complex signal S201 as soon as possible again.
Though the present invention with a preferred embodiment openly as above; But it is not in order to limit the present invention; Any those skilled in the art; Do not breaking away from the spirit and scope of the present invention, when can doing various changes and retouching, so protection scope of the present invention is when looking being as the criterion that accompanying Claim defines.
Claims (19)
1. digital demodulating apparatus, it is arranged in the receiver, and wherein this digital demodulating apparatus receives an input signal, and this digital demodulating apparatus comprises:
One phase splitter is in order to produce a complex signal according to this input signal;
One complex multiplier, in order to this complex signal multiply by one first phase signal and one second phase signal to produce one first fundamental frequency signal and one second fundamental frequency signal, wherein this first and this second phase signal between phase difference be 90 the degree;
One frequency automatic controller is in order to receive this first fundamental frequency signal to produce one first output signal;
One limiter, in order to according to this first output signal to produce a trend signal;
One repeats tracker, in order to one to adjust signal according to relatively producing of this first output signal and a plurality of critical values;
One phase detectors; In order to being multiply by mutually, this trend signal and this second fundamental frequency signal produce a multiplying signal and according to this adjustment signal; Through changing at least one frequency range variable of the phase place automatic controller in these phase detectors, the phase place of this multiplying signal is adjusted;
One oscillator, in order to a output according to these phase detectors, produce this first and this second phase signal; And
One back multiplier, in order to this trend signal multiply by respectively this first and this second fundamental frequency signal, to produce digital demodulation output.
2. digital demodulating apparatus as claimed in claim 1, wherein this first fundamental frequency signal be this complex multiplier real part output, imaginary part output that this second fundamental frequency signal is this complex multiplier.
3. digital demodulating apparatus as claimed in claim 1, wherein these phase detectors more comprise:
One multiplier module is in order to multiply by this multiplying signal of generation with this trend signal and this second fundamental frequency signal mutually; And
This phase place automatic controller in order to receiving this multiplying signal, and according to this adjustment signal, through changing at least one frequency range variable of this phase place automatic controller, is adjusted the phase place of this multiplying signal.
4. digital demodulating apparatus as claimed in claim 3, wherein this phase place automatic controller comprises an amplifier and plural number to the frequency range variable controller, and this at least one frequency range variable is this amplifier and this plural number loop gain to the frequency range variable controller.
5. digital demodulating apparatus as claimed in claim 3; Wherein this repetition tracker should be adjusted signal according to these a plurality of critical values to produce, and these a plurality of critical values are according to the average absolute peak value decision of the oscillator intensity of this input signal in present time interval.
6. digital demodulating apparatus as claimed in claim 5, wherein this repetition tracker detects this first output signal, and this first output signal is compared to produce this adjustment signal with these a plurality of critical values.
7. digital demodulating apparatus as claimed in claim 5, wherein this repetition tracker more detects this first output signal, and the mean value of this first output signal in Preset Time interval is compared to produce this adjustment signal with these a plurality of critical values.
8. digital demodulating apparatus as claimed in claim 1, wherein this oscillator is a Numerical Control oscillator.
9. a digital demodulation method is used for a digital demodulating apparatus, and to adjust a phase-locked loop frequency range, this digital demodulation method comprises the following step:
Produce a complex signal according to an input signal;
This complex signal multiply by one first phase signal and one second phase signal to produce one first fundamental frequency signal and one second fundamental frequency signal, wherein this first and this second phase signal between phase difference be 90 degree;
Export signal according to this first fundamental frequency signal to produce one first;
According to this first output signal to produce a trend signal;
This trend signal and this second fundamental frequency signal multiply by generation one multiplying signal mutually;
One adjust signal according to relatively producing of these first output signal and a plurality of critical values;
Receive this multiplying signal and,, adjust the phase place of this multiplying signal, to produce one second output signal through changing at least one frequency range variable of this digital demodulating apparatus according to this adjustment signal;
According to this second output signal produce this first and this second phase signal; And
With this trend signal multiply by respectively this first and this second fundamental frequency signal, to produce digital demodulation output.
10. digital demodulation method as claimed in claim 9 before generation should be adjusted signal, more comprises the following step:
Average absolute peak value according to the oscillator intensity of this input signal in present time interval calculates these a plurality of critical values; And
This first output signal is compared to produce this adjustment signal with these a plurality of critical values.
11. digital demodulation method as claimed in claim 9 before generation should be adjusted signal, more comprises the following step:
Average absolute peak value according to the oscillator intensity of this input signal in present time interval calculates these a plurality of critical values; And
The mean value of this first output signal in Preset Time interval is compared to produce this adjustment signal with these a plurality of critical values.
12. digital demodulation method as claimed in claim 10; Wherein these a plurality of critical values comprise a maximum critical value, a middle critical value and a lowest critical value; When this first output signal during less than this lowest critical value; At least one frequency range variable of this digital demodulating apparatus increases via adjustment, increasing this phase-locked loop frequency range of this digital demodulating apparatus, when this first output signal during greater than this centre critical value; At least one frequency range variable of this digital demodulating apparatus reduces via adjustment, to reduce this phase-locked loop frequency range of this digital demodulating apparatus.
13. digital demodulation method as claimed in claim 11; Wherein these a plurality of critical values comprise a maximum critical value, a middle critical value and a lowest critical value; When this first output signal during less than this lowest critical value; At least one frequency range variable of this digital demodulating apparatus increases via adjustment, increasing this phase-locked loop frequency range of this digital demodulating apparatus, when this first output signal during greater than this centre critical value; At least one frequency range variable of this digital demodulating apparatus reduces via adjustment, to reduce this phase-locked loop frequency range of this digital demodulating apparatus.
14. digital demodulation method as claimed in claim 10; Wherein these a plurality of critical values comprise a maximum critical value, a middle critical value and a lowest critical value; When the frequency of this input signal was not locked at interval in a crash time; And this first output signal is less than this lowest critical value, and this digital demodulating apparatus will be reset.
15. digital demodulation method as claimed in claim 11; Wherein these a plurality of critical values comprise a maximum critical value, a middle critical value and a lowest critical value; When the frequency of this input signal was not locked at interval in a crash time; And this first output signal is less than this lowest critical value, and this digital demodulating apparatus will be reset.
16. digital demodulation method as claimed in claim 10; Wherein these a plurality of critical values comprise a maximum critical value, a middle critical value and a lowest critical value; When this first output signal less than this lowest critical value; And this phase-locked loop frequency range of this digital demodulating apparatus is during less than a maximum frequency range critical value, and at least one frequency range variable of this digital demodulating apparatus increases via adjustment, to increase this phase-locked loop frequency range of this digital demodulating apparatus.
17. digital demodulation method as claimed in claim 11; Wherein these a plurality of critical values comprise a maximum critical value, a middle critical value and a lowest critical value; When this first output signal less than this lowest critical value; And this phase-locked loop frequency range of this digital demodulating apparatus is during less than a maximum frequency range critical value, and at least one frequency range variable of this digital demodulating apparatus increases via adjustment, to increase this phase-locked loop frequency range of this digital demodulating apparatus.
18. digital demodulation method as claimed in claim 10; Wherein these a plurality of critical values comprise a maximum critical value, a middle critical value and a lowest critical value; When this first output signal greater than this maximum critical value; And this phase-locked loop frequency range of this digital demodulating apparatus is during greater than a minimum frequency range critical value, and at least one frequency range variable of this digital demodulating apparatus reduces via adjustment, to reduce this phase-locked loop frequency range of this digital demodulating apparatus.
19. digital demodulation method as claimed in claim 11; Wherein these a plurality of critical values comprise a maximum critical value, a middle critical value and a lowest critical value; When this first output signal greater than this maximum critical value; And this phase-locked loop frequency range of this digital demodulating apparatus is during greater than a minimum frequency range critical value, and at least one frequency range variable of this digital demodulating apparatus reduces via adjustment, to reduce this phase-locked loop frequency range of this digital demodulating apparatus.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0813345A2 (en) * | 1996-06-12 | 1997-12-17 | Samsung Electronics Co., Ltd. | Digital demodulator and method therefor |
| US6091780A (en) * | 1996-03-12 | 2000-07-18 | Nokia Mobile Phones, Ltd. | Transmitting and receiving radio signals |
| CN1518820A (en) * | 2001-04-16 | 2004-08-04 | ��ķɭ��ɹ�˾ | Phase tracking system |
| CN1808915A (en) * | 2004-11-02 | 2006-07-26 | 因芬尼昂技术股份公司 | Receiving apparatus of mobile communication system |
| CN1845543A (en) * | 2006-03-27 | 2006-10-11 | 上海承思微电子有限公司 | Non-coherent digital demodulation device for RDS signal |
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6091780A (en) * | 1996-03-12 | 2000-07-18 | Nokia Mobile Phones, Ltd. | Transmitting and receiving radio signals |
| EP0813345A2 (en) * | 1996-06-12 | 1997-12-17 | Samsung Electronics Co., Ltd. | Digital demodulator and method therefor |
| CN1518820A (en) * | 2001-04-16 | 2004-08-04 | ��ķɭ��ɹ�˾ | Phase tracking system |
| CN1808915A (en) * | 2004-11-02 | 2006-07-26 | 因芬尼昂技术股份公司 | Receiving apparatus of mobile communication system |
| CN1845543A (en) * | 2006-03-27 | 2006-10-11 | 上海承思微电子有限公司 | Non-coherent digital demodulation device for RDS signal |
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