CN102257635A - 光伏器件的薄吸收层 - Google Patents
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Abstract
提供了用于以与常规太阳能电池相比时增大的效率将电磁辐射(例如太阳能)转化为电能的方法及装置。在光伏(PV)器件的一个实施方式中,PV器件大致上包括n型掺杂层及p+型掺杂层,p+型掺杂层邻近所述n型掺杂层以形成p-n层,使得当电磁辐射被p-n层吸收时产生电能。n型掺杂层和p+型掺杂层可以构成吸收层,并且吸收层的厚度小于500nm。与常规太阳能电池相比,这样的薄吸收层可以允许PV器件具有更大的效率和及可挠性。
Description
背景
技术领域
本发明的实施方式一般涉及具有增大的效率和较大的可挠性的光伏(PV)器件(例如太阳能电池)及用以制造其的方法。
相关技术的描述
因为化石燃料正以不断增加的速率耗尽,所以对替代能源的需要变得越来越明显。源自风、源自太阳及源自流水的能量提供对化石燃料(例如煤、油及天然气)的可再生的、环境友好的替代物。因为太阳能在地球上的几乎任何地方都容易得到,所以它可能有朝一日成为可行的替代物。
为了利用来自太阳的能量,太阳能电池的结吸收光子以产生电子空穴对,这些电子空穴对被结的内部电场分离以产生电压,从而将光能转化为电能。所产生的电压可通过串联连接太阳能电池而增加,且电流可通过并联连接太阳能电池而增加。太阳能电池可在太阳电池板上组合在一起。逆变器可耦接至若干太阳电池板以将直流功率转换为交流功率。
然而,生产太阳能电池的当前高成本相对于当代器件的低效率水平阻止太阳能电池成为主流能源,且限制太阳能电池可适用的应用。因此,需要适于大量应用的更有效的光伏器件。
发明概述
本发明的实施方式一般涉及用于以与常规太阳能电池相比时增大的效率将电磁辐射(例如太阳能)转化为电能的方法及装置。
本发明的一个实施方式提供一种光伏(PV)器件。PV器件大致上包括n型掺杂层及p+型掺杂层,p+型掺杂层邻近n型掺杂层以形成p-n层,使得当电磁辐射被p-n层吸收时产生电能。
本发明的另一个实施方式为一种制造PV器件的方法。该方法大致上包括:在基底上方形成n型掺杂层;以及在n型掺杂层上方形成p+型掺杂层,以在n型掺杂层与p+型掺杂层之间形成p-n层,使得当电磁辐射被p-n层吸收时产生电能。
附图的简要说明
因此,可详细理解本发明的上述特征结构的方式,即,上文简要概述的本发明的更特定的描述可参照实施方式进行,一些实施方式在附图中示出。然而,应注意,附图仅示出本发明的典型实施方式,且因此不应被视为其范围的限制,因为本发明可允许其它同等有效的实施方式。
图1以横截面示出根据本发明的一个实施方式的具有半导体层的示例性厚度、组合物及掺杂的光伏(PV)单元的多个外延层。
图2A至图2D示出根据本发明的实施方式的PV单元的基极层及发射极层的各种层堆栈剖面。
图3A及图3B示出根据本发明的实施方式的PV单元的半导体层,这些半导体层具有在基极层与发射极层之间的偏移p-n层。
图4示出根据本发明的一个实施方式的PV单元的半导体层,这些半导体层具有发射极层,该发射极层具有精细调整的掺杂剖面以使得掺杂程度从p-n层至发射极层的顶部增加。
图5示出根据本发明的一个实施方式的PV单元的半导体层,这些半导体层具有多个AlGaAs发射极层,这些发射极层具有分级的铝(Al)含量。
详细描述
提供了用于以与常规太阳能电池相比时增大的效率将电磁辐射(例如太阳能)转化为电能的技术及装置。
示范性薄吸收层
图1以横截面示出在制造期间光伏(PV)单元100的各种外延层。可使用用于半导体生长的任何适合的方法在基底(未示出)上形成各种层,这些方法例如是分子束外延法(MBE)或金属有机化学汽相沉积法(MOCVD)。
为了形成PV单元100,可在基底上形成一个或多个缓冲层。缓冲层的目的在于提供介于基底与最终PV单元的半导体层之间的中间层,当形成各种外延层时,该中间层可容纳各种外延层的不同结晶结构。举例而言,具有大约200nm的厚度的缓冲层102可根据最终PV单元的期望组合物而包括III-V族化合物半导体,例如砷化镓(GaAs)。对于一些实施方式,例如当产生GaAs缓冲层时,基底可(例如)包含GaAs。
对于一些实施方式,释放层104可形成于缓冲层102之上。举例而言,释放层104可包含砷化铝(AlAs),且其厚度在约5至10nm的范围内。薄释放层104的目的被更详细地描述于下文。
在释放层104之上,可形成窗层106。窗层106可包含砷化铝镓(AlGaAs),例如Al0.3Ga0.7As。窗层106的厚度可在约5nm至30nm的范围内(例如,如所示的20nm),且可以是未掺杂的。窗层106可为透明的以允许光子穿过在PV单元的正面上的窗层传递到其它下伏层。
基极层108可形成于窗层106之上。基极层108可包含任何适合的III-V族化合物半导体,例如砷化镓。基极层108可为单晶体。基极层108可为n型掺杂的,且对于一些实施方式,n型掺杂基极层108的掺杂浓度可在约1×1016cm-3至1×1019cm-3的范围内(例如,如所示的2×1017cm-3)。基极层108的厚度可在约300nm至3500nm的范围内。
如图1中所示出的,发射极层110可形成于基极层108之上。发射极层110可包含用以与基极层108形成异质结的任何适合的III-V族化合物半导体。举例而言,如果基极层108包含GaAs,则发射极层110可包含诸如AlGaAs的不同半导体材料。如果发射极层110及窗层106都包含AlGaAs,则发射极层110的AlxGa1-xAs组合物可与窗层106的AlyGa1-yAs组合物相同或不同。发射极层110可为单晶体。发射极层110可为p型重掺杂(即,p+型掺杂),且对于一些实施方式,p+型掺杂发射极层的掺杂浓度可为约1×1017cm-3至1×1020cm-3的范围内(例如,如所示的1×1019cm-3)。举例而言,发射极层110的厚度可为约300nm。基极层108及发射极层110的组合可形成用以吸收光子的吸收层。对于一些实施方式,吸收层的厚度可小于800nm,或甚至小于500nm。
n型掺杂基极层与p+型掺杂发射极层的接触产生p-n层112。当光在p-n层112附近被吸收以产生电子空穴对时,内建电场可迫使空穴到p+型掺杂侧且迫使电子到n型掺杂侧。自由电荷的该位移导致两个层108、110之间的电压差,以使得电子流可在负载连接在耦接至这些层的端子两端时流动。
不同于如上所述的n型掺杂基极层108及p+型掺杂发射极层110,常规光伏半导体器件通常具有p型掺杂基极层及n+型掺杂发射极层。在常规器件中,由于载流子的扩散长度,基极层通常为p型掺杂。制造根据本发明的实施方式的较薄基极层允许改变n型掺杂基极层。与p型掺杂层内的空穴的迁移率相比,n型掺杂层内的电子的较高迁移率导致本发明的实施方式的n型掺杂基极层108的较低掺杂密度。
一旦形成发射极层110,就可在发射极层内形成空腔或凹槽114,这些空腔或凹槽114足够深以到达下伏基极层108。举例而言,通过使用光刻术将掩模应用于发射极层110,且使用任何适合的技术(例如湿式或干式蚀刻)移除发射极层110内的未由掩模覆盖的半导体材料,可形成这样的凹槽114。以此方式,可经由PV单元100的背面接近基极层108。
对于一些实施方式,可在发射极层110之上形成界面层116。界面层116可包含任何适合的III-V族化合物半导体,例如GaAs。界面层116可为p+型掺杂,且对于一些实施方式,p+型掺杂界面层116的掺杂浓度可为1×1019cm-3。举例而言,界面层116的厚度可为约300nm。
一旦在释放层104之上形成剩余外延层,薄释放层104就可例如经由使用含水HF的蚀刻而牺牲。以此方式,在外延层剥离(ELO)工艺期间,PV单元100的功能层(例如,窗层106、基极层108及发射极层110)可与缓冲层102及基底分离。
与常规太阳能单元相比,以此方式产生的PV单元具有相当薄的吸收层(例如,<500nm),而常规太阳能单元可为数微米厚。吸收层的厚度与PV单元内的暗电流电平成比例(即,吸收层越薄,暗电流越低)。暗电流为即使没有光子进入器件时也流过PV单元或其它类似感光性器件(例如,光电二极管)的小电流。该背景电流可作为热离子发射或其它效应的结果而存在。因为当暗电流在感光性半导体器件内减小时,开路电压(Voc)增加,所以对给定光强度而言,较薄的吸收层最可能导致较大的Voc,且因此导致增大的效率。只要吸收层能够捕集光,当吸收层的厚度减小时,效率增加。
吸收层的薄度可能不仅仅受薄膜技术能力及ELO的能力的限制。举例而言,效率随着吸收层的薄度增加而增加,但吸收层应足够厚以承载电流。然而,较高掺杂程度可允许电流流动,甚至在极薄的吸收层内流动。因此,可利用增加的掺杂来制造极薄的吸收层,并具有甚至更大的效率。常规PV器件可遭受体积重组效应,因此这样的常规器件并不在吸收层内使用高掺杂。当确定适当厚度时,也可考虑吸收层的薄层电阻。
不仅薄吸收层导致增大的效率,而且具有这样的薄吸收层的PV单元可比具有若干微米的厚度的常规太阳能电池更具可挠性。因此,根据本发明的实施方式的PV单元可比常规太阳能电池适于更大量的应用。
图2A至图2D示出根据本发明的实施方式的PV单元的基极层108及发射极层110的各种层堆栈剖面200a-d。图2A中的层堆栈剖面200a示出了如图1所示出的基极层108及发射极层110。对于一些实施方式,可在基极层108之上形成中间层202,且可在中间层之上形成发射极层110。中间层202可提供介于基极层108与发射极层110之间的更平缓过渡。
中间层202可为n型掺杂,n型重掺杂(即,n+型掺杂)或p+型掺杂的。举例而言,图2B示出包含n型AlGaAs的中间层202b。作为另一实例,图2C描绘包含n+型AlGaAs的中间层202c。作为又一实例,图2D描绘包含p+型GaAs的中间层202d。
在图1中,在基极层108与发射极层110之间的p-n层112为平坦的且未暴露于凹槽114内。换言之,图1的p-n层112可被视为仅具有二维几何形状的平面。如图3A及图3B所示,对于一些实施方式,可形成PV单元的半导体层以在基极层108与发射极层110之间产生偏移p-n层312。换言之,偏移p-n层312可被视为具有三维几何形状。偏移p-n层312可暴露于凹槽114内。
如图3A中所示出的,当如上所述形成凹槽114时,通过一直穿过发射极层110移除半导体材料且部分地进入基极层108内,可产生偏移p-n层312a。如图3B中所示出的,用以形成偏移p-n层312b的另一方法可包括在形成发射极层110之前,将掩模应用于基极层108。经由任何适合的技术(例如蚀刻),可从被预期保留发射极层的基极层108的一部分(即,除凹槽114的期望位置外的其它位置)移除半导体材料。一旦在发射极层内形成发射极层110及凹槽114,所得到的偏移p-n层312b就具有比平坦p-n层112的表面面积更大的表面面积。
对于一些实施方式,在制造期间,可在PV单元的层内将掺杂程度精细调整。举例而言,图4示出具有发射极层110的PV单元400,该发射极层110具有精细调整的掺杂剖面,以使得掺杂浓度在Z方向上从p-n层112增加至发射极层110的顶部。
对于一些实施方式,发射极层110可包括多个层,且多个层可包括不同的组合物。举例而言,图5示出根据本发明的一个实施方式的PV单元500的半导体层,这些半导体层具有多个p+型AlGaAs发射极层,这些发射极层具有分级(graded)的铝(Al)含量(即,百分比)。在该示例性实施方式中,可在基极层108之上形成包含p+型GaAs而无任何铝的第一发射极层5101。可在第一个发射极层5101之上形成包含p+型Al0.1Ga0.9As的第二发射极层5102。然后,又可在第二发射极层5102之上形成包含p+型Al0.2Ga0.8As的第三发射极层5103及包含p+型Al0.3Ga0.7As的第四发射极层5104。具有这些分级的Al含量可避免结势垒。
尽管上文针对本发明的实施方式,但是可设计本发明的其它及另外的实施方式而不偏离其基本范围,且其范围由随后的权利要求确定。
Claims (56)
1.一种光伏(PV)器件,包括:
n型掺杂层;以及
p+型掺杂层,其邻近所述n型掺杂层以形成p-n层,使得当电磁辐射被所述p-n层吸收时产生电能。
2.如权利要求1所述的PV器件,其中所述n型掺杂层与所述p+型掺杂层构成吸收层,并且所述吸收层的厚度小于800nm。
3.如权利要求1所述的PV器件,其中所述p-n层包括异质结。
4.如权利要求1所述的PV器件,其中所述n型掺杂层或所述p+型掺杂层包括III-V族半导体。
5.如权利要求4所述的PV器件,其中所述III-V族半导体是单晶体。
6.如权利要求4所述的PV器件,其中所述n型掺杂层包含n型GaAs。
7.如权利要求4所述的PV器件,其中所述p+型掺杂层包含p+型AlGaAs。
8.如权利要求7所述的PV器件,其中所述p+型掺杂层包含p+型Al0.3Ga0.7As。
9.如权利要求1所述的PV器件,还包括插在所述n型掺杂层和所述p+型掺杂层之间的中间层。
10.如权利要求9所述的PV器件,其中所述n型掺杂层包含n型GaAs,所述p+型掺杂层包含p+型AlGaAs,以及所述中间层包含n型AlGaAs。
11.如权利要求9所述的PV器件,其中所述n型掺杂层包含n型GaAs,所述p+型掺杂层包含p+型AlGaAs,以及所述中间层包含n+型AlGaAs。
12.如权利要求9所述的PV器件,其中所述n型掺杂层包含n型GaAs,所述p+型掺杂层包含p+型AlGaAs,以及所述中间层包含p+型GaAs。
13.如权利要求1所述的PV器件,还包括邻近所述n型掺杂层的窗层。
14.如权利要求13所述的PV器件,其中所述窗层包含AlGaAs。
15.如权利要求14所述的PV器件,其中所述窗层包含Al0.3Ga0.7As。
16.如权利要求13所述的PV器件,其中所述窗层具有大约5到30nm的厚度。
17.如权利要求1所述的PV器件,还包括邻近所述p+型掺杂层的界面层。
18.如权利要求17所述的PV器件,其中所述界面层包含p+型GaAs。
19.如权利要求17所述的PV器件,其中所述界面层具有大约300nm的厚度。
20.如权利要求17所述的PV器件,其中所述界面层具有1×1019cm-3的掺杂程度。
21.如权利要求1所述的PV器件,其中在所述n型掺杂层与所述p+型掺杂层之间形成的所述p-n层为偏移p-n层。
22.如权利要求1所述的PV器件,其中所述p+型掺杂层具有被精细调整的掺杂剖面,使得掺杂程度从所述p+型掺杂层的一侧到另一侧增加。
23.如权利要求1所述的PV器件,其中所述p+型掺杂层包括多个p+型掺杂层。
24.如权利要求23所述的PV器件,其中所述多个p+型掺杂层包含AlGaAs,并且所述多个p+型掺杂层的每个包含不同百分比的铝。
25.如权利要求24所述的PV器件,其中所述多个p+型掺杂层包括具有p+型GaAs的第一p+型掺杂层、具有p+型Al0.1Ga0.9As的第二p+型掺杂层、具有p+型Al0.2Ga0.8As的第三p+型掺杂层和具有p+型Al0.3Ga0.7As的第四p+型掺杂层。
26.如权利要求25所述的PV器件,其中所述第一p+型掺杂层邻近所述n型掺杂层。
27.如权利要求1所述的PV器件,其中所述n型掺杂层具有从约300nm至约3500nm的范围内的厚度。
28.如权利要求1所述的PV器件,其中所述p+型掺杂层的厚度为约300nm。
29.如权利要求1所述的PV器件,其中所述n型掺杂层具有2×1017cm-3的掺杂程度。
30.如权利要求1所述的PV器件,其中所述p+型掺杂层具有1×1019cm-3的掺杂程度。
31.一种制造光伏(PV)器件的方法,包括:
在基底上方形成n型掺杂层;以及
在所述n型掺杂层上方形成p+型掺杂层,以在所述n型掺杂层与所述p+型掺杂层之间形成p-n层,使得当电磁辐射被所述p-n层吸收时产生电能。
32.如权利要求31所述的方法,还包括使用外延剥离(ELO)来从所述基底移除所述n型掺杂层和所述p+型掺杂层。
33.如权利要求31所述的方法,其中所述n型掺杂层和所述p+型掺杂层组成吸收层,且所述吸收层具有小于800nm的厚度。
34.如权利要求31所述的方法,其中所述p-n层包括异质结。
35.如权利要求31所述的方法,其中所述n型掺杂层或所述p+型掺杂层包括III-V族半导体。
36.如权利要求35所述的方法,其中所述n型掺杂层包含n型GaAs。
37.如权利要求35所述的方法,其中所述p+型掺杂层包含p+型AlGaAs。
38.如权利要求31所述的方法,还包括在所述n型掺杂层上方形成中间层,其中形成所述p+型掺杂层包括在所述中间层上方形成所述p+型掺杂层。
39.如权利要求38所述的方法,其中所述n型掺杂层包含n型GaAs,所述p+型掺杂层包含p+型AlGaAs,以及所述中间层包含n型AlGaAs。
40.如权利要求38所述的方法,其中所述n型掺杂层包含n型GaAs,所述p+型掺杂层包含p+型AlGaAs,以及所述中间层包含n+型AlGaAs。
41.如权利要求38所述的方法,其中所述n型掺杂层包含n型GaAs,所述p+型掺杂层包含p+型AlGaAs,以及所述中间层包含p+型GaAs。
42.如权利要求31所述的方法,还包括在所述基底上方形成窗层,其中形成所述n型掺杂层包括在所述窗层上方形成所述n型掺杂层。
43.如权利要求42所述的方法,其中所述窗层包含AlGaAs。
44.如权利要求42所述的方法,还包括在所述基底上方形成缓冲层,其中形成所述窗层包括在所述缓冲层上方形成所述窗层。
45.如权利要求44所述的方法,其中所述缓冲层包含GaAs。
46.如权利要求44所述的方法,其中所述缓冲层具有大约200nm的厚度。
47.如权利要求44所述的方法,还包括在所述缓冲层上方形成释放层,其中形成所述窗层包括在所述释放层上方形成所述窗层。
48.如权利要求47所述的方法,其中所述释放层包含AlAs。
49.如权利要求47所述的方法,其中所述释放层具有大约5nm的厚度。
50.如权利要求31所述的方法,还包括在所述p+型掺杂层上方形成界面层。
51.如权利要求50所述的方法,其中所述界面层包含p+型GaAs。
52.如权利要求31所述的方法,还包括移除所述n型掺杂层的一部分,使得所述p-n层被偏移。
53.如权利要求31所述的方法,其中形成所述p+型掺杂层包括精细调整所述p+型掺杂层的掺杂剖面,使得掺杂程度从所述p+型掺杂层的一侧到另一侧增加。
54.如权利要求31所述的方法,其中形成所述p+型掺杂层包括形成多个p+型掺杂层。
55.如权利要求54所述的方法,其中所述多个p+型掺杂层包含AlGaAs,并且所述多个p+型掺杂层的每个包含不同百分比的铝。
56.如权利要求54所述的方法,其中所述多个p+型掺杂层包括具有p+型GaAs的第一p+型掺杂层、具有p+型Al0.1Ga0.9As的第二p+型掺杂层、具有p+型Al0.2Ga0.8As的第三p+型掺杂层和具有p+型Al0.3Ga0.7As的第四p+型掺杂层。
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CN106611803B (zh) * | 2015-10-19 | 2019-04-23 | 北京创昱科技有限公司 | 一种太阳能电池片、其制备方法及其组成的太阳能电池组 |
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WO2010048543A2 (en) | 2010-04-29 |
US20110041904A1 (en) | 2011-02-24 |
TW201029196A (en) | 2010-08-01 |
US20110056546A1 (en) | 2011-03-10 |
WO2010048543A3 (en) | 2010-07-22 |
US20100126570A1 (en) | 2010-05-27 |
US8674214B2 (en) | 2014-03-18 |
US8669467B2 (en) | 2014-03-11 |
EP2351098A2 (en) | 2011-08-03 |
KR20110086097A (ko) | 2011-07-27 |
US8912432B2 (en) | 2014-12-16 |
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