CN102291154A - Polar coordinate transmitter - Google Patents
Polar coordinate transmitter Download PDFInfo
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- CN102291154A CN102291154A CN2011102850435A CN201110285043A CN102291154A CN 102291154 A CN102291154 A CN 102291154A CN 2011102850435 A CN2011102850435 A CN 2011102850435A CN 201110285043 A CN201110285043 A CN 201110285043A CN 102291154 A CN102291154 A CN 102291154A
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Abstract
The invention provides a polar coordinate transmitter, which can meet the requirement of high speed rate at a low-speed clock frequency, i.e., compensate for integer time delay and fraction time delay under the condition of not increasing the sampling rate. The polar coordinate transmitter comprises a polar coordinate generating unit, an amplitude modulating unit, a phase modulating unit, a switch power amplifying unit, a time delay estimating unit and a variable fraction time delay filter, wherein the time delay estimating unit is used for estimating integer time delays of a phase channel and an amplitude channel on a time domain respectively, compensating for the integer time delays, estimating fraction time delays of the phase channel and the amplitude channel on a frequency domain respectively, adding an integer time delay error and a fraction time delay error between the phase channel and the amplitude channel to obtain a time delay error, and setting the variable fraction time delay filter according to the obtained time delay error; and the variable fraction time delay filter is used for performing time delay on a signal input into the phase channel and compensating for the time delay error between the phase channel and the amplitude channel.
Description
Technical field
The present invention relates to wireless communication technology, particularly the delay compensation technology of transmitter.
Background technology
The polar coordinates transmitter combines power supply modulation technique and Switch power amplifier technology.The polar coordinates transmitter comprises polar coordinates generation unit, amplitude modulation unit, phase modulation unit, switch power amplifying unit, the polar coordinates generation unit, the digital amplitude information that is used for generating is sent to amplitude modulation unit, and the digital phase information that generates is sent to phase modulation unit; Phase modulation unit is used for digital phase information is converted to analog signal, generates the phase modulated signal of the permanent envelope of radio frequency and exports the input of switch power amplifying unit to through phase modulated; Amplitude modulation unit, being used for the digital amplitude information translation is analog signal, the power supply modulation signal after the power supply modulation exports the control end of switch power amplifying unit to; The switch power amplifying unit is used for input signal is carried out being emitted to the spatial domain after the power amplification.The polar coordinates transmitter separates the signal into range signal and phase signal, and amplitude channels adopts the power supply modulation technique to carry out envelope-tracking, and phase path adopts the Switch power amplifier to amplify after being modulated to radio frequency.After the width of cloth was separated, because phase path adopts constant envelope signal, thereby the efficient of complete machine obtained to promote significantly.Amplitude channels adopts signal envelope, has than long time delay with respect to phase path.Time delay in the polar coordinates transmitter between phase path and the amplitude channels does not match and will cause nonlinear distortion, and the performance of final transmitter is exerted an influence.
The time delay of two passages does not match can decay ACLR (Adjacent Channel Leakage Ratio, adjacent channel leakage ratio) and EVM (Error Vector Magnitude, Error Vector Magnitude).For LTE (Long Term Evolution, Long Term Evolution) signal is an example, according to present standard, side channel ACLR should be less than-45dBc, 16QAM (Quadrature Amplitude Modulation, quadrature amplitude modulation) modulation EVM_rms (Error Vector Magnitude Root Mean Square, the root mean square of Error Vector Magnitude) should be less than 12.5%, 64QAM modulation EVM_rms should be less than 8%, QPSK (Quadrature Phase Shift Keying, Quadrature Phase Shift Keying) modulation EVM_rms should be less than 17.5%.When matching, two interchannel time delays do not reach 10%Ts when (sampling period), the requirement of the discontented toe mark of ACLR, as shown in Figure 1.Be that the time delay error of polar coordinates transmitter not only comprises integer time delay error, also comprise the mark time delay, two interchannel time delay errors should be less than 10%Ts.Delay time error, requiring the mark time delay is the hundredths in sampling period.If adopt different test signals, require standard to have difference, desired mark time delay least unit has tiny difference, but two interchannel time delay errors all can include mark time delay error.Integer time delay error is meant that the time of delay error equals the integral multiple in sampling period, and the integer time delay is easy to realize, only needs a time-delay integer sampling period to get final product.But the mark time delay need be carried out the interpolation processing or be improved sample rate, handles the complexity height, has increased the complexity of correcting time delay error greatly.
Summary of the invention
The present invention wants the technical solution problem to be, a kind of two-forty requirement that realizes under the low-speed clock frequency is provided, and promptly under the situation that does not improve sample rate, compensates the polar coordinates transmitter of integer time delay and mark time delay.
The present invention solves the problems of the technologies described above the technical scheme that is adopted to be, the polar coordinates transmitter comprises the polar coordinates generation unit, amplitude modulation unit, phase modulation unit, the switch power amplifying unit, it is characterized in that, also comprise the time delay estimation unit, variable mark time delay filter, an output of described polar coordinates generation unit connects the input of amplitude modulation unit, another output of polar coordinates generation unit connects the input of phase modulation unit through variable mark time delay filter, the output of amplitude modulation unit connects the control end of switch power amplifying unit, and the output of phase modulation unit connects the input of switch power amplifying unit; Amplitude modulation unit, phase modulation unit connect the input of time delay estimation unit respectively, and the output of time delay estimation unit links to each other with the control end of variable mark time delay filter;
Described time delay estimation unit is used for respectively estimating the integer time delay of phase path and amplitude channels on time domain, carry out the integer delay compensation after, on frequency domain, estimate the mark time delay of phase path and amplitude channels respectively; At last integer time delay error between phase path and the amplitude channels and mark time delay error addition are obtained time delay error, and variable mark time delay filter is set according to the time delay error that obtains;
Described variable mark time delay filter is used for the signal of input phase passage is carried out time delay, carries out the time delay error compensation between phase path and the amplitude channels.
The invention has the beneficial effects as follows, by amplitude channels and phase path time delay are estimated, add variable mark time delay filter in phase path and come the delay compensation error, not under the situation that changes the low-speed clock frequency, realize the two-forty delay compensation, the deterioration problem of the polar coordinates performance that solution is brought owing to time delay does not match realizes that really the high efficiency of signal is amplified.
Description of drawings
Fig. 1 is example with LTE, and amplitude and phase path time delay do not match to the influence of ACLR;
Fig. 2 polar coordinates transmitter architecture of the present invention schematic diagram;
Fig. 3 is the embodiment schematic diagram;
Fig. 4 can realize the schematic diagram of different mark time delays for different filter coefficients.
Embodiment
The polar coordinates transmitter comprises polar coordinates generation unit 10 as shown in Figure 2, amplitude modulation unit 20, phase modulation unit 30, time delay estimation unit 40, switch power amplifying unit 50, variable mark time delay filter 60, an output of polar coordinates generation unit 10 connects the input of amplitude modulation unit 20, another output of polar coordinates generation unit 10 connects the input of phase modulation unit 30 through variable mark time delay filter 60, the output of amplitude modulation unit 20 connects the control end of switch power amplifying unit 50, and the output of phase modulation unit 30 connects the input of switch power amplifying unit 50; Amplitude modulation unit 20, phase modulation unit 30 connect the input of time delay estimation unit 40 respectively, and the output of time delay estimation unit 40 links to each other with the control end of variable mark time delay filter 60.
Polar coordinates generation unit 10 generates digital amplitude information and is sent to amplitude modulation unit 20, and the digital phase information that generates is sent to phase modulation unit 30;
Time delay estimation unit 40, on time domain, estimate the integer time delay of phase path and amplitude channels respectively, after carrying out the integer delay compensation, on frequency domain, estimate the mark time delay of phase path and amplitude channels respectively, integer time delay error between phase path and the amplitude channels and mark time delay error addition obtain time delay error, and according to the time delay error that obtains mark time delay filter 60 are set;
Mark time delay filter 60 carries out time delay error compensation between phase path and the amplitude channels to the signal of input phase passage, exports the digital phase information after the time delay error compensation to phase modulation unit 30;
Switch power amplifying unit 50 carries out being emitted to the spatial domain after the power amplification to input signal.
Embodiment
As shown in Figure 3, comprise baseband signal generation unit 11, utmost point seat converting unit 12 in the polar coordinates generation unit 10.The I of the generation of baseband signal generation unit 11, Q signal are sat converting unit 12 through the utmost point and are handled, and sit converting unit 12 through the utmost point I, Q signal are transformed into polar coordinates (ρ, θ signal) from cartesian coordinate, and ρ is a digital amplitude information, and θ is a digital phase information:
Switch power amplifying unit 50 comprises switch power amplifier 51, radio-frequency antenna 52.
Phase-modulator unit 30 comprises digital to analog converter (DAC) 31, reconfigurable filter 32, phase-modulator 33, digital to analog converter 31 is converted to analog signal with digital phase information, after reconfigurable filter 32 filtering, be modulated to the radio frequency constant envelope signal through phase-modulator 33 again.Power supply modulator unit 20 comprises digital to analog converter 21, reconfigurable filter 22 and power supply modulator 23, digital to analog converter 21 is an analog signal with the digital amplitude information translation, after reconfigurable filter 22 filtering, come the control end of by-pass cock power-like amplifier again through power supply modulator 23.Power supply modulator 23 is according to the difference of power amplifier 51 power outputs, and the drain electrode supply power voltage that dynamically changes power amplifier 51 makes power amplifier always work in peak efficiency, thereby improves the efficient of power amplifier.
Cartesian coordinate is carried out under numeric field fully to polar conversion, and amplitude channels and the time delay error between phase path that utmost point seat converting unit 12 is produced can be ignored.Under the situation of not considering variable mark time delay filter 60, the digital signal of the two passages digital to analog converter 21,31 by separately respectively is converted to analog signal, and digital to analog converter 21,31 time delay errors that produced also can be ignored.Analog reconstruction filter 22,32 should have identical physics realization, but in fact owing to reasons such as power consumptions, makes the time delay of reconfigurable filter mate inaccuracy, and the time delay error that reconfigurable filter 22,32 causes is generally less than 0.1%Ts (sampling period).Time delay error between amplitude channels and the phase path mainly is to be caused by power supply modulator 23 and phase-modulator 33.The frequency of phase path is generally GHz, and with respect to the frequency MHz of amplitude channels, the time delay of phase-modulator 33 is less than power supply modulator 23, and promptly the time delay of phase path is less than the time delay of amplitude channels.Therefore, need add the delay compensation error in phase path.Time delay error not only comprises integer time delay error, also comprises mark time delay error.The time delay estimation unit 40 of present embodiment is estimated the time delay that the time delay that produced through reconfigurable filter 22 and power supply modulator 23 at signal on the amplitude channels and signal on phase path are produced through reconfigurable filter 32 and phase-modulator 33.Optionally, as not considering the time delay of reconfigurable filter 22,32, time delay estimation unit 40 can only be estimated time delay that is produced at signal process power supply modulator 23 on the amplitude channels and the time delay that signal is produced through phase-modulator 33 on phase path.
The integer time delay is meant that the time of delay equals the situation of the integral multiple in sampling period.The integer time delay is estimated to adopt related operation, estimates on time domain.The signal of supposing input reconfigurable filter 22 on amplitude channels is x
AM(n), the signal of power supply modulator 23 outputs is y
AM(n-d
AM).Time delay estimation unit 40 is with the data x that collects
AM(n) and y
AM(n-d
AM) carry out related operation and try to achieve maximum:
Wherein " * " for asking conjugation, N is the number of signal sampling point, n is a temporary variable.Pairing d when the maximum of related operation
AMBe the integer time delay of amplitude channels.Need to prove that the data starting point that collects should be corresponding here, not so the time delay calibration will comprise the error of instrument.In like manner, use related operation to try to achieve the integer time delay d of phase path
PM
Obtaining integer time delay d
AMAnd d
PMAfterwards, time delay estimation unit 40 carries out data after the integer time delay calibration, again will be after the calibration of integer time delay the data transaction of phase path and amplitude channels arrive frequency domain.For two relevant broadband signals, the phase place of the Fourier transform of cross-correlation function is linear in band.
Try to achieve after prolonging calibration data x ' on the amplitude channels on the frequency domain
AM(n) and y '
AM(n-d
AM) be converted to and again and again be X
AM(e
J ω) and
The maximum of the cross-correlation function on frequency domain:
Wherein " * " is for asking conjugation, pairing d ' when maximum
AMBe the mark time delay of amplitude channels.In like manner, try to achieve the mark time delay d ' of phase path
PM
The time delay error that time delay estimation unit 40 obtains between phase path and the amplitude channels is integer time delay error (d
AM-d
PM) and mark time delay error (d '
AM-d '
PM) sum.
After time delay estimation unit 40 obtained time delay error, the parameter of coming selective filter according to time delay error was as filter type and exponent number, coefficient.As shown in Figure 4, different filter coefficients can be realized different mark time delays.Realize variable mark time delay, only need to select different filter coefficients to get final product.Different coefficient sets (from the S0 to S10 of system) can realize any mark time delay from 0 to 1.At the same type filter, same integer time delay part, just the mark time delay from 0 to 1 under the optional situation, the exponent number of filter is also fixed, and by selecting different coefficients, can realize the arbitrary value of mark time delay from 0 to 1.
Variable mark time delay filter 60 can carry out integer time delay and mark time delay processing, variable mark time delay filter 60 comprises FIR (Finite Impulse Response, finite impulse response) filter and IIR (Infinite Impulse Response, wireless pulses response) filter.FIR mark time delay filter can pass through designs such as sinc (Singh) window function, Lagrangian interpolation, maximally-flat degree FIR filter, WLS (Weighted Least Squares, weighted least-squares) method, Oetken method.IIR mark time delay filter can pass through methods such as LS (least square) phase estimation, LS phase delay are estimated, group delay estimations of maximally-flat, the design of iteration WLS phase error, the design of iteration WLS phase delay error and design.
Amplitude and phase path the time postpone a meeting or conference with changes in environmental conditions.The bandwidth of power supply modulator 23 can change with load current; When the power output of power amplifier 51 changed, the time delay of power supply modulator 23 also can change; Power supply modulator 23 the time postpone a meeting or conference and vary with temperature.But the change procedure of two passages is slowly, after the setting-up time section, the polar coordinates transmitter carries out the time delay of amplitude channels and phase path again and estimates, to realize self adaptation, perhaps, the polar coordinates transmitter is after setting-up time arrives, and whether meet the demands by the test macro index determines whether revising the parameter of variable time delay filter, the simplified self-adaptive process.
Abovely show particularly and described the present invention with reference to embodiment, for one of ordinary skill in the art, according to the thought of the embodiment of the invention, part in specific embodiments and applications all can change, in sum, this description should not be construed as limitation of the present invention.
Claims (4)
1. polar coordinates transmitter, comprise the polar coordinates generation unit, amplitude modulation unit, phase modulation unit, the switch power amplifying unit, it is characterized in that, also comprise the time delay estimation unit, variable mark time delay filter, an output of described polar coordinates generation unit connects the input of amplitude modulation unit, another output of polar coordinates generation unit connects the input of phase modulation unit through variable mark time delay filter, the output of amplitude modulation unit connects the control end of switch power amplifying unit, and the output of phase modulation unit connects the input of switch power amplifying unit; Amplitude modulation unit, phase modulation unit connect the input of time delay estimation unit respectively, and the output of time delay estimation unit links to each other with the control end of variable mark time delay filter;
Described time delay estimation unit is used for respectively estimating the integer time delay of phase path and amplitude channels on time domain, carry out the integer delay compensation after, estimate the mark time delay of phase path and amplitude channels on the frequency domain respectively; At last integer time delay error between phase path and the amplitude channels and mark time delay error addition are obtained time delay error, and variable mark time delay filter is set according to the time delay error that obtains;
Described variable mark time delay filter is used for the signal of input phase passage is carried out time delay, carries out the time delay error compensation between phase path and the amplitude channels.
2. polar coordinates transmitter according to claim 1, it is characterized in that, described phase-modulator unit comprises digital to analog converter, reconfigurable filter, phase-modulator, the output of the digital to analog converter in the phase-modulator unit links to each other with the input of reconfigurable filter, and the output of reconfigurable filter links to each other with the input of phase-modulator; Described amplitude modulation unit comprises digital to analog converter, reconfigurable filter, power supply modulator, and the output of the digital to analog converter in the amplitude modulation unit links to each other with the input of reconfigurable filter, and the output of reconfigurable filter links to each other with the input of power supply modulator;
Described time delay estimation unit, be used for by integer time delay and mark time delay, to passing through integer time delay and the mark time delay that integer time delay that reconfigurable filter and phase-modulator produced and mark time delay estimate to obtain phase path on the phase path estimating to obtain amplitude channels through integer time delay that reconfigurable filter and power supply modulator produced and mark time delay on the amplitude channels.
3. polar coordinates transmitter according to claim 1, it is characterized in that, described phase-modulator unit comprises digital to analog converter, reconfigurable filter, phase-modulator, the output of the digital to analog converter in the phase-modulator unit links to each other with the input of reconfigurable filter, and the output of reconfigurable filter links to each other with the input of phase-modulator; Described amplitude modulation unit comprises digital to analog converter, reconfigurable filter, power supply modulator, and the output of the digital to analog converter in the amplitude modulation unit links to each other with the input of reconfigurable filter, and the output of reconfigurable filter links to each other with the input of power supply modulator;
Described time delay estimation unit, be used for by integer time delay and mark time delay, to passing through integer time delay and the mark time delay that integer time delay that phase-modulator produced and mark time delay estimate to obtain phase path on the phase path estimating to obtain amplitude channels through integer time delay that power supply modulator produced and mark time delay on the amplitude channels.
4. as polar coordinates transmitter as described in claim 2 or 3, it is characterized in that described time delay estimation unit is used for estimating by related operation the integer time delay of amplitude channels on time domain: order
Corresponding d
AMBe the integer time delay of amplitude channels up-sampling point n correspondence, wherein, N is the number of sampled point, and n is a temporary variable, and * is for asking conjugation, x
AM(n) be the time domain input signal of amplitude channels up-sampling point n correspondence, y
AM(n-d
AM) be the time domain output signal of amplitude channels up-sampling point n correspondence;
Estimate the integer time delay of phase path on time domain by related operation: order
Corresponding d
PMBe the integer time delay of phase path, wherein, N is the number of sampled point, and n is a temporary variable, and * is for asking conjugation, x
PM(n) be the time domain input signal of phase path up-sampling point n correspondence, y
PM(n-d
PM) be the time domain output signal of phase path up-sampling point n correspondence;
Estimate the mark time delay of amplitude channels on frequency domain by related operation: order
Corresponding d '
AMBe the mark time delay of amplitude channels, wherein, X
AM(e
J ω) be the frequency domain input signal of amplitude channels upper frequency ω correspondence behind the integer delay compensation,
Frequency domain output signal for amplitude channels upper frequency ω correspondence behind the integer delay compensation;
Estimate the mark time delay of phase path on frequency domain by related operation: order
Corresponding d '
PMBe the mark time delay of phase path, wherein, X
PM(e
J ω) be the frequency domain input signal of phase path upper frequency ω correspondence behind the integer delay compensation,
Frequency domain output signal for phase path upper frequency ω correspondence behind the integer delay compensation.
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| CN103455069A (en) * | 2013-09-12 | 2013-12-18 | 电子科技大学 | Broadband amplitude signal power supply modulator and modulation method thereof |
| CN103457602A (en) * | 2013-09-12 | 2013-12-18 | 电子科技大学 | Broadband signal phase modulator and modulating method |
| CN103516644A (en) * | 2012-06-21 | 2014-01-15 | 中兴通讯股份有限公司 | Method and device for outputting transmitting-terminal in-phase quadrature (IQ) calibration distortion parameters |
| CN103560758A (en) * | 2013-11-15 | 2014-02-05 | 上海无线电设备研究所 | Power amplifier used for polar coordinate transmitter |
| CN103969626A (en) * | 2014-05-20 | 2014-08-06 | 西安电子科技大学 | Wideband digital wave beam forming method based on all-pass type variable fractional delay filter |
| CN104808738A (en) * | 2015-04-24 | 2015-07-29 | 昆腾微电子股份有限公司 | Amplitude modulation circuit, signal emission circuit and card reader |
| CN106849880A (en) * | 2016-12-29 | 2017-06-13 | 中国电子科技集团公司第五十研究所 | Efficient linear digital radio frequency power signal generating method based on polar coordinates treatment |
| CN107171644A (en) * | 2016-03-08 | 2017-09-15 | 南方科技大学 | Modulated signal generative circuit based on phase regulator |
| CN107332539A (en) * | 2017-06-30 | 2017-11-07 | 电子科技大学 | A kind of high speed parallel duplex fraction filtering wave by prolonging time device implementation method |
| CN108777569A (en) * | 2018-05-23 | 2018-11-09 | 成都玖锦科技有限公司 | Arbitrary time-delay method based on multiphase filter |
| CN109274631A (en) * | 2018-12-11 | 2019-01-25 | 北京无线电测量研究所 | Data symbol synchronous method based on wildcard-filter style fractional time delay filter |
| CN111030611A (en) * | 2019-11-15 | 2020-04-17 | 安凯(广州)微电子技术有限公司 | Polar coordinate modulation circuit and modulation method thereof |
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| CN103516644B (en) * | 2012-06-21 | 2018-07-24 | 南京中兴新软件有限责任公司 | Transmitting terminal inphase quadrature calibrates the output method and device of distortion parameter |
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| CN103457602B (en) * | 2013-09-12 | 2016-08-31 | 电子科技大学 | A kind of broadband signal phase modulator and modulator approach thereof |
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| CN103560758B (en) * | 2013-11-15 | 2016-09-07 | 上海无线电设备研究所 | A kind of power amplifier for polar coordinate transmitter |
| CN103969626A (en) * | 2014-05-20 | 2014-08-06 | 西安电子科技大学 | Wideband digital wave beam forming method based on all-pass type variable fractional delay filter |
| CN104808738A (en) * | 2015-04-24 | 2015-07-29 | 昆腾微电子股份有限公司 | Amplitude modulation circuit, signal emission circuit and card reader |
| CN107171644A (en) * | 2016-03-08 | 2017-09-15 | 南方科技大学 | Modulated signal generative circuit based on phase regulator |
| CN107171644B (en) * | 2016-03-08 | 2020-08-28 | 南方科技大学 | Modulation signal generating circuit based on phase adjuster |
| CN106849880A (en) * | 2016-12-29 | 2017-06-13 | 中国电子科技集团公司第五十研究所 | Efficient linear digital radio frequency power signal generating method based on polar coordinates treatment |
| CN107332539A (en) * | 2017-06-30 | 2017-11-07 | 电子科技大学 | A kind of high speed parallel duplex fraction filtering wave by prolonging time device implementation method |
| CN107332539B (en) * | 2017-06-30 | 2020-09-15 | 电子科技大学 | High-speed parallel multi-path fractional delay filter implementation method |
| CN108777569A (en) * | 2018-05-23 | 2018-11-09 | 成都玖锦科技有限公司 | Arbitrary time-delay method based on multiphase filter |
| CN109274631A (en) * | 2018-12-11 | 2019-01-25 | 北京无线电测量研究所 | Data symbol synchronous method based on wildcard-filter style fractional time delay filter |
| CN109274631B (en) * | 2018-12-11 | 2021-04-23 | 北京无线电测量研究所 | Data symbol synchronization method based on all-pass fractional delay filter |
| CN111030611A (en) * | 2019-11-15 | 2020-04-17 | 安凯(广州)微电子技术有限公司 | Polar coordinate modulation circuit and modulation method thereof |
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