CN102497125B - Photovoltaic inversion control device and model free control method based on field programmable gata array (FPGA) - Google Patents

Photovoltaic inversion control device and model free control method based on field programmable gata array (FPGA) Download PDF

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CN102497125B
CN102497125B CN201110393358.1A CN201110393358A CN102497125B CN 102497125 B CN102497125 B CN 102497125B CN 201110393358 A CN201110393358 A CN 201110393358A CN 102497125 B CN102497125 B CN 102497125B
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photovoltaic
fpga
inverting system
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CN102497125A (en
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吴建华
刘刚
杨海涛
崔雷
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Northeastern University China
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Abstract

A photovoltaic inversion control device and a model free control method based on a field programmable gata array (FPGA) relate to the technical field of control. The model free control method mainly comprises a digitalized and field-programmable hardware design scheme and a model free adaptive control algorithm suitable for hardware implementation. The photovoltaic inversion control device comprises a programmable gata array, a synchronous dynamic random access memory and a nonvolatile memory, wherein the programmable gata array comprises an embedded soft core, an angular wave circuit and an Avnlon bus module, and the embedded soft core and the angular wave circuit are respectively connected with the synchronous dynamic random access memory and the nonvolatile memory through the Avnlon bus module. An FPGA digital chip of a large scale integrated circuit is used in a photovoltaic inversion system firstly, the model free control method is adopted, thereby controlling output of an inverter accurately, and having the advantages of changing, debugging and adding other functions at any time and the like.

Description

Photovoltaic inversion control device and non-model control method based on FPGA
Technical field
The present invention relates to control technology field, particularly a kind of photovoltaic inversion control device and model-free methods based on FPGA.
Background technology
Along with the high speed development of photovoltaic industry, traditional analog is controlled and is difficult to realize high-precision inversion output, and digital product with rapid changepl. never-ending changes and improvements provides new design tool to photovoltaic inverter.There is following shortcoming in traditional analog control device: control circuit is complicated, components and parts are more, be unfavorable for miniaturization; Control device flexibility is very poor, once after control device designs, not be apt to do modification, inconvenient debugging; Analog control device is difficult to realize novel Intelligentized control method, and therefore the digitlization photovoltaic inverter of exploitation and use field-programmable is with a wide range of applications.For the non-linear feature of photovoltaic inverter circuit, there is following shortcoming in traditional control method: non-linear for photovoltaic inverting system, set up accurate Mathematical Modeling very difficult, and affected the validity and reliability of controller design; And control the difficult optimization of parameter, controller parameter can not on-line tuning.
Summary of the invention
The deficiency existing for prior art, the present invention proposes a kind of photovoltaic inversion control device and non-model control method based on FPGA, makes photovoltaic inverting system efficient, the object of reliability service to reach.
Technical scheme of the present invention is achieved in that a kind of photovoltaic inversion control device based on FPGA, comprise programmable gate array (FPGA), synchronous DRAM (SDRAM) and nonvolatile memory (FLASH), wherein, programmable gate array (FPGA) comprises Embedded Soft Core (CPU), angle wave circuit, Avalon bus module and IO interface unit, and its annexation is: Embedded Soft Core (CPU) and angle wave circuit are connected with synchronous DRAM (SDRAM), nonvolatile memory (FLASH) by Avalon bus module respectively.
The non-model control method that the photovoltaic inversion control device of employing based on FPGA carries out photovoltaic inversion, comprises the following steps:
Step l: the initial parameter of Embedded Soft Core control device is set, and described initial parameter comprises: the current period desired output voltage y of photovoltaic inverting system load end *(k), step series η k, quantization step factor ρ k, weight factor λ, penalty factor μ, the pseudo-partial derivative initial value of photovoltaic inverting system
Step 2: Embedded Soft Core reads the instantaneous reference voltage level Q of angle wave circuit generation and the photovoltaic inverting system load terminal voltage value y (k) being collected by voltage sensor;
Step 3: determine the pseudo-local derviation numerical value of system, by pseudo-partial derivative initial value
Figure BDA0000114531210000012
bring formula (1) into:
Figure BDA0000114531210000013
In formula,
Figure BDA0000114531210000014
the pseudo-partial derivative that represents current period photovoltaic inverting system,
Figure BDA0000114531210000015
the pseudo-partial derivative that represents a upper cycle photovoltaic inverting system, Δ u (k-1) represents the changing value of a upper cycle photovoltaic Inversion Control System rule, Δ y (k) represents the changing value of current period photovoltaic inverting system load terminal voltage;
If
Figure BDA0000114531210000021
or the voltage change of photovoltaic inverting system load end | Δ u| < ε, pseudo-partial derivative
Figure BDA0000114531210000022
get initial value
Figure BDA0000114531210000023
otherwise pseudo-partial derivative
Figure BDA0000114531210000024
value by formula (1), calculate to be obtained;
Step 4: calculate control law, formula is as follows:
Figure BDA0000114531210000025
In formula, u (k) represents the control law of current period photovoltaic inverting system, and u (k-1) represents the control law of a upper cycle photovoltaic inverting system, y *(k+1) represent the desired output of next cycle photovoltaic inverting system;
Step 5: Embedded Soft Core output pwm pulse signal is controlled the shutoff of field effect transistor, method is: if control voltage u (k), be greater than or equal to instantaneous reference voltage level Q, modulation (PWM) output of pulse signal is 1, open field effect transistor, otherwise modulation (PWM) output of pulse signal is 0, turn-off field effect transistor;
ε value described in step 3 is 0.01;
Described in step 5, modulation (PWM) output of pulse signal is 0 o'clock, need to postpone a period of time T and be Dead Time, and described T value is 3~5ns.
Advantage of the present invention: first large scale integrated circuit FPGA digit chip has been used in photovoltaic inverting system, and can have controlled accurately inversion output; Utilize advanced SOPC art designs control device, this device has at any time advantages such as changing, debug, add other functions, have flexibly can cut out, extendible, scalable and possess software and hardware and the advantage such as all can debug at any time; First model-free adaption control method has been used in photovoltaic inverting system, it is more stable and accurate that it controls effect, the simple and easy Digital Realization of control algolithm.
Accompanying drawing explanation
Fig. 1 is the structured flowchart of a kind of photovoltaic inversion control device based on FPGA of the present invention;
Fig. 2 is the structured flowchart of a kind of photovoltaic inversion control device Embedded Soft Core control device based on FPGA of the present invention;
Fig. 3 is the angle wave circuit schematic diagram of a kind of photovoltaic inversion control device based on FPGA of the present invention;
Fig. 4 is the FLSH circuit theory diagrams of a kind of photovoltaic inversion control device based on FPGA of the present invention;
Fig. 5 is the SDRAM circuit theory diagrams of a kind of photovoltaic inversion control device based on FPGA of the present invention;
Fig. 6 is the model-free adaption algorithm flow chart of a kind of photovoltaic inversion control device based on FPGA of the present invention;
Fig. 7 is the output waveform figure of the control method photovoltaic inverting system of a kind of photovoltaic inverter based on FPGA of the present invention;
In figure, 1, Avalon bus 2, the soft core 3 of Nios II, angle wave circuit 4, IO interface 5, sdram interface 6, SDRAM memory 7, FLASH memory 8, FLASH interface.
Embodiment
Below in conjunction with drawings and Examples, the present invention is described in further detail.
The chip model of the FPGA that the present embodiment adopts is EP2C35F6762C6N, and the software of employing is Quartus II, and the model of FLSH memory is S29AL032D, and the model of sdram controller is A2V64S40CTP;
On the basis of the hardware platform of the photovoltaic inverter based on FPGA, utilize the Nios IDE exploitation model-free adaption control method that develops software; Utilize hardware description language Verilog development and Design angle wave circuit; The IP kernel design Flash interface, sdram interface, Embedded Soft Core and the IO interface that utilize the SOC (system on a chip) SOPC in Quartus II, utilize the FPGA (Field Programmable Gate Array) of SOPC software-hardware synergism technology based on FPGA to carry out SOC design.
A kind of photovoltaic inversion control device based on FPGA (Nios II) in the present embodiment, its structure as shown in Figure 1, wherein, program in Embedded Soft Core (Nios II) operation model-free adaption control method, the operation principle of the photovoltaic inversion control device based on Embedded Soft Core (Nios II) is as follows: Embedded Soft Core (Nios II) operation model-free adaption control algolithm, the control law calculating is in real time stored in SDRAM, the instantaneous voltage value of the Output rusults of the soft core of Nios II and the generation of angle wave circuit is compared, produce PWM waveform, and Dead Time is loaded in the PWM waveform of having calculated and is exported by IO interface, PWM1 in Fig. 1, PWM2, the PWM waveform on PWM3 and PWM4 tetra-tunnels is amplified to 18V through overdrive circuit by the pwm signal of 5V and drives V1, V2, V3, tetra-field effect transistor MOSFET of V4, wherein V1 and V4 are one group, V2 and V3 are one group, V1 and V4 conducting is simultaneously turn-offed simultaneously, and V1 and V2, V3 and V4 are respectively interlocking, it is the MOSFET pipe conducting simultaneously on same brachium pontis, break-make by four MOSFET pipes is controlled the current value that flows to load, to reach the desired output sine voltage of system.
Its structure of control device of Embedded Soft Core (Nios II) as shown in Figure 2, set up the soft core 2 of Nios, FLASH interface 8, sdram interface 5 and IO interface 4, its annexation is: the input/output terminal of the soft core 2 of Nios II connects Avalon bus 1, the input/output terminal of angle wave circuit 2 connects Avalon bus 1, the first input/output terminal of FLASH interface 8 connects Avalon bus 1, the first input/output terminal of sdram interface 5 connects Avalon bus 1, the input/output terminal of IO interface 4 connects Avalon bus 1, the input/output terminal of FLASH memory 7 connects the second input/output terminal of the FLASH interface 8 of FPGA, the input/output terminal of SDRAM memory 6 connects the second input/output terminal of sdram interface 5,
With hardware description language Verilog, design and develop angle wave circuit, distribute pin, in the present embodiment, the equivalent circuit theory figure of angle wave circuit as shown in Figure 3, in described equivalent electric circuit, No. 6 pin, 8~No. 13 pin connect respectively Avalon bus, and No. 7 pin are as the input of clock signal, with FPGA be that clock end is connected, 2~No. 5 connected rear and the first capacitances in series of pin, and ground connection, No. 1 pin ground connection, No. 14 pin connects power supply;
The circuit theory diagrams of FLASH memory as shown in Figure 4, the OE of S29AL032D end, CE end, WE end, ADDR[19..0] end and DQ[7..0] end connects respectively Avalon bus, its RST end connects the RESET end of FPGA;
The circuit theory diagrams of SDRAM memory as shown in Figure 5, the WE of A2V64S40CTP end, RAS end, CAS end, DQM end, DQ[15..0] end, CS end, ADDR[11..0], BA end connects respectively Avalon bus, its clock end CLK connects the clock end of FPGA;
The present embodiment moves Model free control adaptive algorithm in Embedded Soft Core (Nios II), and as shown in Figure 6, the control algolithm of a kind of photovoltaic inversion control device based on Embedded Soft Core of the present embodiment, comprises the following steps its flow process:
Embodiment 1:
Step 1: initiation parameter is set: y *(k)=24V, η k=1, ρ k=1.97, λ=0.017, μ=0.1,
Figure BDA0000114531210000041
Step 2: it is as shown in table 1 that Embedded Soft Core reads the instantaneous reference voltage level Q that angle wave circuit produces, and the current period photovoltaic inverting system load terminal voltage value y (k) that voltage sensor collects is as shown in table 2:
Table 1 is the instantaneous reference voltage level of angle wave circuit (Q)
Figure BDA0000114531210000042
Table 2 is photovoltaic inverting system load terminal voltage value y (k)
Figure BDA0000114531210000043
The first train value that Embedded Soft Core reads the second row of table 1 is Q=1.1, and the first train value that Embedded Soft Core reads the second row of table 2 is y (k)=23.2;
Step 3: calculate pseudo-local derviation numerical value, formula is:
Step 4: calculate control law, formula is:
u ( k ) = 1.1 + 1.97 * 2 0.017 + 2 2 * ( 24 - 23.6 ) = 1.49
Step 5: Embedded Soft Core output pwm pulse signal is controlled the shutoff of field effect transistor, when PWM=1, V in Fig. 1 1and V 4conducting, V 2and V 3turn-off; During PWM=0, V 1and V 4turn-off V 2and V 3conducting; And after time delay T=5ns, enter turning on and off of next cycle.
Embodiment 2:
Step 1: initiation parameter is set: y *(k)=24V, η k=1, ρ k=1.97, λ=0.017, μ=0.1,
Figure BDA0000114531210000046
Step 2: the second train value that Embedded Soft Core reads the second row of table 1 is Q=0.2V, the second train value that Embedded Soft Core reads the second row of table 2 is y (k)=23.996;
Step 3: calculate pseudo-local derviation numerical value, due to Δ u=0.004 < ε=0.01, therefore pseudo-partial derivative is got initial value:
Figure BDA0000114531210000051
Step 4: u ( k ) = 0.4 + 1.97 * 0.0059 0.1 + 0.0059 2 * ( 24 - 23.996 ) = 0.4006
During step 5:PWM=1, V in Fig. 1 1and V 4conducting, V 2and V 3turn-off; During PWM=0, V 1and V 4turn-off V 2and V 3conducting; And after time delay T=5ns, enter turning on and off of next cycle.
Fig. 7 is the output waveform of system after having used photovoltaic inversion control device of the present invention and having moved model-free adaption algorithm, wherein acts on the main circuit of Fig. 1, and circuit parameter is V in=70V, L=100mH, C 1=100uF, load R=10K Ω and y* (k)=24V, from the output waveform of the individual event full bridge inverter of Fig. 7, the 24V alternating voltage that application this method can stable output.

Claims (3)

1. the photovoltaic inversion non-model control method based on FPGA, the photovoltaic inversion control device of employing based on FPGA, this device comprises programmable gate array FPGA, synchronous DRAM SDRAM and nonvolatile memory FLASH, wherein, programmable gate array FPGA comprises Embedded Soft Core, angle wave circuit, Avalon bus module and IO interface unit, its annexation is: Embedded Soft Core and angle wave circuit are connected with synchronous DRAM SDRAM, nonvolatile memory FLASH by Avalon bus module respectively
It is characterized in that: photovoltaic inversion controlling method comprises the following steps:
Step 1: the initial parameter of Embedded Soft Core control device is set, and described initial parameter comprises: the current period desired output voltage y of photovoltaic inverting system load end *(k), step series η k, quantization step factor ρ k, weight factor λ, penalty factor μ, the pseudo-partial derivative initial value of photovoltaic inverting system
Step 2: Embedded Soft Core reads the instantaneous reference voltage level Q of angle wave circuit generation and the photovoltaic inverting system load terminal voltage value y (k) being collected by voltage sensor;
Step 3: determine the pseudo-local derviation numerical value of system, by pseudo-partial derivative initial value
Figure FDA0000431027070000012
bring formula (1) into:
Figure FDA0000431027070000013
In formula,
Figure FDA0000431027070000014
the pseudo-partial derivative that represents current period photovoltaic inverting system,
Figure FDA0000431027070000015
the pseudo-partial derivative that represents a upper cycle photovoltaic inverting system, Δ u (k-1) represents the changing value of a upper cycle photovoltaic Inversion Control System rule, Δ y (k) represents the changing value of current period photovoltaic inverting system load terminal voltage;
If
Figure FDA0000431027070000016
or the voltage change of photovoltaic inverting system load end | Δ u|< ε, pseudo-partial derivative
Figure FDA0000431027070000017
get initial value otherwise pseudo-partial derivative
Figure FDA0000431027070000019
value by formula (1), calculate to be obtained;
Step 4: calculate control law, formula is as follows:
Figure FDA00004310270700000110
In formula, u (k) represents the control law of current period photovoltaic inverting system, and u (k-1) represents the control law of a upper cycle photovoltaic inverting system, y *(k+1) represent the desired output of next cycle photovoltaic inverting system;
Step 5: Embedded Soft Core output pwm pulse signal is controlled the shutoff of field effect transistor, method is: if control law voltage u (k) is greater than or equal to instantaneous reference voltage level Q, modulation (PWM) output of pulse signal is 1, open field effect transistor, otherwise modulation (PWM) output of pulse signal is 0, turn-off field effect transistor.
2. the photovoltaic inversion non-model control method based on FPGA according to claim 1, is characterized in that: the ε value described in step 3 is 0.001.
3. the photovoltaic inversion non-model control method based on FPGA according to claim 1, is characterized in that: described in step 5, modulation (PWM) output of pulse signal is 0 o'clock, and need to postpone a period of time T and be Dead Time, described T value is 3~5ns.
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* Cited by examiner, † Cited by third party
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US4663703A (en) * 1985-10-02 1987-05-05 Westinghouse Electric Corp. Predictive model reference adaptive controller
CN101729002A (en) * 2009-11-27 2010-06-09 哈尔滨工业大学 SOPC-based remote monitoring system of no-position sensor brushless DC motor

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4663703A (en) * 1985-10-02 1987-05-05 Westinghouse Electric Corp. Predictive model reference adaptive controller
CN101729002A (en) * 2009-11-27 2010-06-09 哈尔滨工业大学 SOPC-based remote monitoring system of no-position sensor brushless DC motor

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