CN104320207A - Vector signal analysis device and method - Google Patents
Vector signal analysis device and method Download PDFInfo
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Abstract
The invention provides a vector signal analysis device. The vector signal analysis device is characterized in that an ADC (analog to digital converter) module performs A/D quantification on a received intermediate frequency signal, an I/Q (in-phase/quadrature) convertor performs I/Q conversion on a digital signal output by the ADC module so as to obtain base band I/Q data, an integer extraction module receives an I/Q signal output by the I/Q convertor, and extracts the I/Q signal after down conversion by integral multiples, a decimal fraction extraction module converts data velocity of I/Q data output by the integer extraction module into code element velocity which is an integral multiple of the data velocity, and further can perform decimal fraction multiple data velocity extraction conversion on an I/Q data file, and a vector demodulation analysis module performs subsequent vector demodulation analysis on I/Q data output by the decimal fraction extraction module. The vector signal analysis device can perform the flexible and complete vector demodulation analysis on digital modulation signals, uses the fixed velocity to perform A/D sampling, performs the I/Q conversion and integral multiple sampling rate conversion in a programmable device, and reduces design difficulty of A/D sampling of an existing vector signal analyzer and programmable hardware.
Description
Technical field
The present invention relates to technical field of measurement and test, particularly a kind of Vector Signal Analysis device, also relate to a kind of Vector Signal Analysis method.
Background technology
Digital modulation signals has the advantages such as large, the anti-interference and good confidentiality of information capacity, is widely used in the communication systems such as satellite communication, radio and television, communication countermeasures.Carrying out accurately weighing to the code element information of digital modulation signals and modulation quality is the important prerequisite of digital communication system application, VSA can realize symbol recovery and modulation quality is measured, and the test of other parameter such as power, frequency, for digital communication system provides test to ensure.
After the frequency-conversion processing of settling signal, VSA needs programmable hardware device and software in machine to coordinate the vector demodulation analysis of more modulation form and different chip rate digital modulation signals.Existing VSA completes the process such as I/Q conversion, the conversion of decimal sampling rate, even vector demodulation in programmable hardware device, and Programming complexity is high; And software in machine cannot carry out recovering and analysis, software flexibility and the poor universality of non-integral multiple chip rate I/Q data file.
As shown in Figure 1, existing Vector Signal Analysis implementation method generally has two kinds:
One is adopt variable high sampling rate to carry out A/D conversion, and sampling rate is the integral multiple of chip rate, after I/Q conversion, integral multiple filtering extraction, carries out vector demodulation analysis.The method requires that sampling clock is the integral multiple of chip rate, to the precision of sampling clock generator and area requirement very high, realize more difficult;
Two is adopt fixed sample rate to carry out A/D conversion, carries out I/Q conversion, little several times extract the I/Q data processing and obtain integral multiple chip rate, in follow-up hardware or software module, carry out vector demodulation analysis in programming device.
In the first implementation method above-mentioned, the data that VSA software in machine obtains are the results after vector demodulation, and the time-frequency domain information of original sampling data is dropped, and data message utilance is not high, causes interpretation of result angle comprehensive not; In addition, variable high sampling rate A/D is adopted to implement very difficult.
In the second implementation method, little several times extract process in programming device, and programming complexity is high; And software in machine lacks decimal sampling rate mapping function, only can realize the demodulation analysis of integral multiple sample rate I/Q data, cannot the I/Q data of non-integral multiple chip rate of other systematic conservation of recovering and analysis, the software compatibility is poor, use limitation large.
Summary of the invention
For solving the above-mentioned shortcoming of existing Vector Signal Analysis implementation method, the present invention proposes a kind of Vector Signal Analysis device and method.
Technical scheme of the present invention is achieved in that
A kind of Vector Signal Analysis device, comprising: ADC module, I/Q converter, integer decimation module, decimal abstraction module and vector demodulation analysis module;
ADC module carries out A/D quantification to the intermediate-freuqncy signal received;
I/Q converter carries out I/Q conversion to the digital signal that ADC module exports and obtains baseband I/Q data;
Integer decimation module receives the i/q signal that I/Q converter exports, integral multiple extraction is carried out to the i/q signal after down-conversion, integer decimation module adopts the mode of multistage cic filter and half-band filter cascade, all selector is had before every grade of cic filter and every grade of half-band filter, cic filter is placed on the front end extracting cascade, and half-band filter is in the rear end of cic filter;
The data rate of the I/Q data that integer decimation module exports by decimal abstraction module is converted into the chip rate of integral multiple, can also carry out decimal haplotype data speed extract conversion to I/Q data file;
Vector demodulation analysis module carries out follow-up vector demodulation analysis to the I/Q data that above-mentioned decimal abstraction module exports.
Alternatively, described ADC module adopts fixed sample rate, and sample rate value is the integral multiple of 10MHz.
Alternatively, described I/Q converter receives the intermediate-freuqncy signal that described ADC module exports, and after the frequency mixer that two multipliers are formed, be multiplied by the orthogonal sine signal that the digital signal of input and digital local oscillator produce, multiplied result is baseband I/Q data.
Alternatively, the extraction factor of described integer decimation module is with 1,2,5,10 static stall steppings.
Alternatively, described cic filter adopts the mode of 5 grades of cascades, and half-band filter adopts the mode of 3 grades of cascades.
Alternatively, decimal abstraction module adopts sinc interpolation filtering to carry out little several times extraction, obtains the I/Q data of integral multiple chip rate.
Alternatively, the signal analysis flow process of vector demodulation analysis module comprises matched filtering, vector demodulation and modulation quality analysis.
Present invention also offers a kind of Vector Signal Analysis method, comprise the following steps:
Step (a), carries out A/D quantification to the intermediate-freuqncy signal received;
Step (b), carries out I/Q conversion to the digital signal after A/D quantizes, digital medium-frequency signal higher for speed is down-converted to baseband I/Q data;
Step (c), integral multiple extraction is carried out to the i/q signal after down-conversion, integer decimation adopts the mode of multistage cic filter and half-band filter cascade, all selector is had before every grade of cic filter and every grade of half-band filter, cic filter is placed on the front end extracting cascade, and half-band filter is in the rear end of cic filter;
Step (d), the data rate of the I/Q data after being extracted by integral multiple is converted into the chip rate of integral multiple, can also carry out decimal haplotype data speed extract conversion to I/Q data file;
Step (e), carries out vector demodulation analysis to the I/Q data after step (d) process.
Alternatively, in step (b), the step of I/Q conversion specifically comprises: the digital signal after A/D quantizes is after the frequency mixer mixing that two multipliers are formed, and be multiplied by the orthogonal sine signal that the digital signal of input and digital local oscillator produce, multiplied result is baseband I/Q data.
Alternatively, vector demodulation analysis package draws together matched filtering, vector demodulation and modulation quality analysis.
The invention has the beneficial effects as follows:
(1) can carry out flexibly digital modulation signals, comprehensive vector demodulation analysis;
(2) adopt fixed rate A/D sampling, in programming device, carry out I/Q conversion and integral multiple sampling rate conversion, reduce the design difficulty of existing VSA A/D sampling and programmable hardware;
(3) in VSA software in machine, carry out the conversion of decimal sampling rate and vector demodulation, support the vector recovering and analysis of non-integral multiple chip rate I/Q file, enhance the comprehensive of vector analysis ability and analysis result.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is that existing Vector Signal Analysis method realizes schematic diagram;
Fig. 2 is the schematic diagram of Vector Signal Analysis device of the present invention;
Fig. 3 is the theory diagram of I/Q converter of the present invention;
Fig. 4 is the theory diagram of integer decimation module of the present invention;
Fig. 5 is the workflow diagram of decimal abstraction module of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, be clearly and completely described the technical scheme in the embodiment of the present invention, obviously, described embodiment is only the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
In existing VSA device, sampling rate conversion and vector demodulation analysis cause programming device logical design complicated near handling process front end, the analysis of software results in machine is comprehensive not and use limitation large, The present invention gives a kind of Vector Signal Analysis device and method, superhet VSA by tested modulation signal by being converted to intermediate frequency after filtering mixing, intermediate-freuqncy signal amplifies laggard digitized after filtering, intermediate-freuqncy signal after high-speed ADC quantizes is again through I/Q conversion and filtering extraction process, intermediate-freuqncy signal is become the digital I/Q complex signal of zero intermediate frequency, then vector demodulation analysis is carried out based on these I/Q data.
Below in conjunction with accompanying drawing, Vector Signal Analysis device and method of the present invention is described in detail.
As shown in Figure 2, first, ADC module adopts fixed sample rate to carry out A/D quantification to the intermediate-freuqncy signal received, and sample rate value of the present invention is the integral multiple of 10MHz, such as 100MHz, 400MHz, 500MHz etc.Sample rate determines the maximum of signal and analyzes bandwidth, adopt fixed sample rate reduce A/D sampling realize difficulty.
Then, the I/Q converter in programmable hardware device carries out I/Q conversion to the digital signal that ADC module exports and obtains baseband I/Q data.
I/Q conversion basic function be that digital medium-frequency signal higher for speed is down-converted to digital baseband signal, Fig. 3 be I/Q converter of the present invention realize schematic diagram.In Fig. 3, the intermediate-freuqncy signal that high-speed ADC module exports sends into I/Q converter; After the frequency mixer that two multipliers are formed, be multiplied by the orthogonal sine signal that the digital signal of input and digital local oscillator produce, multiplied result is I/Q two paths of signals.
Subsequently, i/q signal sends into integer decimation module, and the integral multiple completing the i/q signal after to down-conversion extracts.The factor is extracted with 1,2,5,10 static stall steppings in Vector Signal Analysis device of the present invention, data transfer rate after extraction is defaulted as and is not less than 2 times of chip rates, consider the flexibility of I/Q data subsequent applications and the compatibility with other system, the data transfer rate after extraction can be arranged within the scope of 1 ~ 20 times of chip rate.Suppose that N is that every symbol is counted, (N* chip rate) round up be 1,2,5,10 obtain extract after data transfer rate, then extracting ratio is (A/D sample rate)/(data transfer rate after extraction), thus obtains the I/Q data of little several times chip rate.For the WCDMA signal of 3.84MHz chip rate, when the A/D sampling clock of 100MHz, arranging that every symbol counts is 2, then 2*3.84MHz=7.68MHz, rounding up and obtaining the data transfer rate after extracting is 10MHz, and extracting than computing formula is 100MHz/10MHz=10.
Integer decimation module of the present invention adopts the mode of multistage cic filter and half-band filter cascade to realize.Because cic filter can contraction in multiplication device and coefficient memory, operation efficiency is higher, so place it in the front end extracting cascade, realizes the extraction of high sampling rate data.Half-band filter frequency characteristic is better than cic filter, is used in the rear end of cic filter.In the present invention, cic filter realizes 1 ~ 1000 times and extracts ratio, adopts the mode of 5 grades of cascades to realize, can ensure the Out-of-band rejection of 67dB, meet stopband attenuation requirement.Half-band filter adopts the mode of 3 grades of cascades, realizes the extraction ratio of 1 ~ 8 times.All there is selector before cic filter and every grade of half-band filter, select whether carry out filtering extraction.Extracting than selection principle is select half-band filter when realizing 2,4,8 times of extraction-types, is combined realize extracting in other situation by half-band filter and cic filter.Extract ratio for 10 times, will realize 5 times of filtering extractions by cic filter, half-band filter realizes 2 times of filtering extractions.
Next, the I/Q data transformations of 1 ~ 20 little several times chip rate that above-mentioned integer decimation module exports by decimal abstraction module is the chip rate of integral multiple, can also carry out decimal haplotype data speed extract conversion to I/Q data file.The present invention adopts sinc interpolation filtering to carry out little several times extraction, obtains the I/Q data of integral multiple chip rate, and integer can be set to 1,2,4,8,16 equivalences commonly used.When data transfer rate changes, remove high fdrequency component, just need by signal by a low pass filter, ideal low-pass filter is exactly sinc function in the form of expression of time domain, as long as the convolution therefore realizing input data and sinc function can realize the conversion of sampling rate.In implementation procedure, as shown in Figure 5, need to carry out brachymemma and windowing sharpening to sinc function, for taking into account accuracy and runtime two kinds of different application situations that little several times extract, use the sinc function of 8 and 40 points respectively, add Kaiser window and carry out transition band sharpening, realized the selection optimization of speed and precision by control switch.
I/Q data not only contain the amplitude information of signal, further comprises the phase information that vector analysis is necessary, there is application widely in signal analyzer, back end signal analysis is nearly all carried out based on I/Q data, the signal analyzer of current main flow all provides I/Q data file hold function, some signal simulation software such as MATLAB etc. also can carry out I/Q file output easily, therefore carries out vector recovering and analysis to I/Q data file and has very important realistic meaning.Owing to there is little several times extract function in decimal abstraction module of the present invention, as long as the data in file are read in internal memory according to specific format vector demodulation analysis can be carried out, greatly improve the versatility of vector analysis function.
Finally, the I/Q data of vector demodulation analysis module to the integral multiple chip rate that above-mentioned decimal abstraction module exports carry out follow-up vector demodulation analysis, comprise a series of signal analysis process such as matched filtering, vector demodulation and modulation quality analysis.
Vector Signal Analysis device and method of the present invention, can carry out flexibly digital modulation signals, comprehensive vector demodulation analysis; Adopt fixed rate A/D sampling, in programming device, carry out I/Q conversion and integral multiple sampling rate conversion, reduce the design difficulty of existing VSA A/D sampling and programmable hardware; In VSA software in machine, carry out the conversion of decimal sampling rate and vector demodulation, support the vector recovering and analysis of non-integral multiple chip rate I/Q file, enhance the comprehensive of vector analysis ability and analysis result.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1. a Vector Signal Analysis device, is characterized in that, comprising: ADC module, I/Q converter, integer decimation module, decimal abstraction module and vector demodulation analysis module;
ADC module carries out A/D quantification to the intermediate-freuqncy signal received;
I/Q converter carries out I/Q conversion to the digital signal that ADC module exports and obtains baseband I/Q data;
Integer decimation module receives the i/q signal that I/Q converter exports, integral multiple extraction is carried out to the i/q signal after down-conversion, integer decimation module adopts the mode of multistage cic filter and half-band filter cascade, all selector is had before every grade of cic filter and every grade of half-band filter, cic filter is placed on the front end extracting cascade, and half-band filter is in the rear end of cic filter;
The data rate of the I/Q data that integer decimation module exports by decimal abstraction module is converted into the chip rate of integral multiple, can also carry out decimal haplotype data speed extract conversion to I/Q data file;
Vector demodulation analysis module carries out follow-up vector demodulation analysis to the I/Q data that above-mentioned decimal abstraction module exports.
2. a kind of Vector Signal Analysis device as claimed in claim 1, is characterized in that, described ADC module adopts fixed sample rate, and sample rate value is the integral multiple of 10MHz.
3. a kind of Vector Signal Analysis device as claimed in claim 1, it is characterized in that, described I/Q converter receives the intermediate-freuqncy signal that described ADC module exports, after the frequency mixer that two multipliers are formed, be multiplied by the orthogonal sine signal that the digital signal of input and digital local oscillator produce, multiplied result is baseband I/Q data.
4. a kind of Vector Signal Analysis device as claimed in claim 1, is characterized in that, the extraction factor of described integer decimation module is with 1,2,5,10 static stall steppings.
5. a kind of Vector Signal Analysis device as claimed in claim 4, it is characterized in that, described cic filter adopts the mode of 5 grades of cascades, and half-band filter adopts the mode of 3 grades of cascades.
6. a kind of Vector Signal Analysis device as claimed in claim 1, is characterized in that, decimal abstraction module adopts sinc interpolation filtering to carry out little several times extraction, obtains the I/Q data of integral multiple chip rate.
7. a kind of Vector Signal Analysis device as claimed in claim 1, is characterized in that, the signal analysis flow process of vector demodulation analysis module comprises matched filtering, vector demodulation and modulation quality analysis.
8. a Vector Signal Analysis method, is characterized in that, comprises the following steps:
Step (a), carries out A/D quantification to the intermediate-freuqncy signal received;
Step (b), carries out I/Q conversion to the digital signal after A/D quantizes, digital medium-frequency signal higher for speed is down-converted to baseband I/Q data;
Step (c), integral multiple extraction is carried out to the i/q signal after down-conversion, integer decimation adopts the mode of multistage cic filter and half-band filter cascade, all selector is had before every grade of cic filter and every grade of half-band filter, cic filter is placed on the front end extracting cascade, and half-band filter is in the rear end of cic filter;
Step (d), the data rate of the I/Q data after being extracted by integral multiple is converted into the chip rate of integral multiple, can also carry out decimal haplotype data speed extract conversion to I/Q data file;
Step (e), carries out vector demodulation analysis to the I/Q data after step (d) process.
9. a kind of Vector Signal Analysis method as claimed in claim 8, it is characterized in that, in step (b), the step of I/Q conversion specifically comprises: the digital signal after A/D quantizes is after the frequency mixer mixing that two multipliers are formed, be multiplied by the orthogonal sine signal that the digital signal of input and digital local oscillator produce, multiplied result is baseband I/Q data.
10. a kind of Vector Signal Analysis method as claimed in claim 9, is characterized in that, vector demodulation analysis package draws together matched filtering, vector demodulation and modulation quality analysis.
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