CN104993704A - Digital constant current controller based on flyback primary side feedback - Google Patents

Abstract

The invention provides a digital constant current controller based on flyback primary side feedback. The digital constant current controller comprises an auxiliary winding output voltage sampling state machine, a demagnetizing time Td compensation module, a bidirectional counter module, a primary side peak current Ip, pk(n) compensation module, a primary side peak current threshold value setting module and a switch signal control module. The digital constant current controller controls a flyback converter to enable the flyback converter to work in a discontinuous conduction mode (DCM), guarantees that the primary side peak value is constant in each switch period through frequency pulse modulation (PFM), and also guarantees that the ratio of the demagnetizing time to the switch period is constant so that digital constant current is realized. Based on the flexibility of digital control, the digital constant current controller provides demagnetizing time compensation and compensates for the delay of demagnetizing time sampling, thereby improving the constant current accuracy. A novel primary side peak value compensation method is provided for the delay in a flyback system, so that the primary side current compensation accuracy is improved and the linearity of output current is higher.

Description

A kind of digital constant-current controller based on inverse-excitation type former limit feedback

Technical field

The present invention relates to Switching Power Supply, particularly relate to a kind of digital constant-current controller based on inverse-excitation type former limit feedback, can be applicable in charger current constant control and LED constant current driving.

Background technology

Inverse-excitation type switch power-supply because volume is little, cost is low, can input voltage range be large etc. that advantage is widely used in low-power device, especially in charger and LED driver.The Switching Power Supply of constant current output is mainly used in charger quick charge when low loading condition, improves capacity usage ratio and operating efficiency.In field of LED drive, in order to improve the useful life of LED, putting forward high-octane utilance simultaneously, needing constant electric current to drive.

Classical inverse excitation type converter current constant control scheme mainly contains, and directly carries out directly feedback from output to output current and regulates.This traditional control mode needs optocoupler to carry out electric current isolation to input and output side, and when change of external conditions, the Energy Transfer performance of optocoupler can be subject to very large interference, reduces control precision, as shown in Figure 1.Meanwhile, this regulative mode, also can reduce the precision of output current.The control mode of former limit feedback is proposed based on this, by auxiliary winding, output voltage is sampled, be then sampled by the peak value of a sampling resistor to primary current to the sampling of output current, thus estimate the value of output current in secondary loop, as shown in Figure 2.The control mode of former limit feedback, eliminates optical coupling isolation device, reduces the cost of the transducer of inverse-excitation type, also improve the precision of output current and output voltage simultaneously.

The control mode of common realization numeral constant current has the control model of PWM to realize.The product that this control model is measured by guarantee former limit peak current, degaussing time and switch periods three is constant, thus realizes constant current output.But such control mode, needs consideration three to measure cooperation control, realizing circuit more complicated.The control model of PFM effectively reduces the circuit structure of controller, is the control mode that constant-current switch power source is common, but the current ripples exported under this control mode is larger.

Because analogue technique is ripe at field of power supplies Technical comparing, design cost is relatively low.The control mode realizing constant current output in traditional switch power supply designs mainly through the mode simulated.But analogue technique is difficult to the control realizing complicated algorithm, be difficult to promote to some extent again to the precision of output current or output voltage and control rate.Digital control approach is more flexible on control algolithm realizes compared to analog control mode, can realize complicated control algolithm, improves the precision and speed that control.

Existing Matlab and Modelsim software associative simulation well approaches actual simulated conditions for digital front-end design provides.Hardware description language parts on Modelsim software such as direct Verilog HDL write digitial controller, and directly can be observed the problem in Design of Digital Controller by associative simulation, one-step optimization of going forward side by side.This effectively shortens design cycle and the design difficulty of digitial controller, improves the market competitiveness simultaneously.

Under prior art condition, analog control mode remains the main control mode of field of switch power.Mainly because the production cost ratio of digitial controller is higher than analog controller, wanting to realize high performance digital control needs adopts high-performance, and the analog to digital converter (ADC) of high cost, this adds the production cost of digitial controller undoubtedly.How replace the requirement to high-performance analog to digital converter by good control technology, improve the control precision of digital implementation simultaneously, reduce production cost, become the heat subject of present field of switch power research.

Summary of the invention

For prior art to digital control switch Power Management Design Problems existing, the invention provides a kind of digital constant-current controller based on inverse-excitation type former limit feedback, by digital compensation technique, solve the dependence of digitial controller to high cost High Performance ADC, reduce the cost of controller.Meanwhile, digital control approach, adds the flexibility of control, improves the precision of output current.

For achieving the above object, the technical scheme that the present invention takes is: a kind of digital constant-current controller based on inverse-excitation type former limit feedback, it is characterized in that, comprise auxiliary winding output voltage sample states machine, degaussing time Td compensating module, bidirectional counter module, former limit peak current Ip, pk (n) compensating module, former limit peak current threshold arrange module and switching signal control module; Wherein:

Auxiliary winding output voltage sample states machine, the Ton switch controlling signal that receiving key signal controlling module exports and the voltage on auxiliary winding carry out dividing potential drop sampling, low and high level signal Vsamp relatively and former limit peak current threshold arrange the current constant control marking signal sign_start that module exports, export A, B and C tri-control signals, corresponding S1, S2 and S3 tri-kinds of states, for controlling bidirectional counter plus-minus counting state, and pass through value Td_1 and the Td_2 of S2 state and S3 state two initial time counter count, count to get degaussing time Td_n=Td_1 ﹣ Td_2, Td_n represents the length of degaussing time, Td_1 and Td_2 represents the count value of degaussing time starting point and end point counter respectively,

Degaussing time Td compensating module, receive degaussing time Td_n and the status signal C of auxiliary winding output voltage sample states machine output, former limit peak current threshold arranges current constant control marking signal sign_start and the clock signal clk of module output, reset signal rst, when sign_start and C signal is all high level, i.e. current time, control system operates in digital current constant control state, and state machine operates in S3 state, degaussing time Td_n is compared by multichannel comparison module and obtains a data select signal data_select control data selector, under utilizing data selector to select current state from data register, need clock periodicity Δ Ts (n) compensated,

Bidirectional counter module, receive the count value count that A, B, C tri-control signals of auxiliary winding output voltage sample states machine output and degaussing time bias value Δ Ts (n) of degaussing time Td compensating module output and switching signal control module provide, control the value of bidirectional counter, under finally obtaining this state, switch periods end signal cc_sign_off passes to switching signal control module, for control switch cycle control signal Ton, switch periods is made to enter next cycle circulation;

Former limit peak current Ip, pk (n) compensating module, receive the current constant control marking signal sign_start that the sampled signal Isamp of input primary current and the counter count signal of switching signal control module output and former limit peak current threshold arrange module output, by the compensation rate Δ Ip of former limit peak current threshold calculated, pk (n) passes to former limit peak current threshold and arranges module;

Former limit peak current threshold arranges module, receive former limit peak current Ip, the compensation rate Δ Ip of the former limit peak current threshold that pk (n) compensating module exports, the Ton switch controlling signal that pk (n) and switching signal control module export arranges former limit peak reference threshold value Ip, ref (n), Ip under current constant control operating state, the value of ref (n) in each switch periods, by the maximum reference threshold Ip of primary current, ref (n) max and primary current peak compensation amount Δ Ip, pk (n) determines, Ip, ref (n)=Ip, ref (n) max ﹣ Δ Ip, pk (n), Ip in formula, ref (n) is new former limit peak reference threshold value, export to switching signal control module, former limit peak current threshold arranges module output constant current and controls marking signal sign_start signal, realize control and the switching of controller different operating state,

Switching signal control module, receive former limit peak current threshold and the current constant control marking signal sign_start of module output and former limit peak reference threshold value Ip is set, the switch periods end signal cc_sign_off that the sampled signal Isamp of ref (n) and input primary current and bidirectional counter module provide, in conjunction with own count value count, the control signal Ton of control and by-pass cock pipe.

Advantage of the present invention and remarkable result: the present invention's numeral constant-current controller controls inverse excitation type converter, under allowing it work in discontinuous conduction mode (DCM), and control (PFM) by frequency pulse, under ensureing each switch periods, former limit peak current is constant, ensures that degaussing time and switch periods proportions constant realize digital constant current simultaneously.Utilize numerically controlled flexibility, propose degaussing time bias, the delay of sampling degaussing time is compensated, improve constant current accuracy.For the delay existed in inverse-excitation type system, propose a kind of former limit peak current compensation mode newly, improve the compensation precision of primary current, make the linearity of output current higher.Control mode structure of the present invention is simple, and cost is low.

Accompanying drawing explanation

The classical inverse excitation type converter system of Fig. 1 band light-coupled isolation;

The inverse excitation type converter system that Fig. 2 feeds back based on former limit;

The digital constant current inverse-excitation type system fed back based on former limit that Fig. 3 is involved in the present invention;

The numerically controlled structured flowchart of Fig. 4;

Fig. 5 assists winding output voltage sample states machine;

Fig. 6 degaussing time bias module circuit diagram;

Fig. 7 bidirectional counter flow chart;

Fig. 8 former limit peak current compensation design sketch;

Fig. 9 former limit peak-current compensation circuit figure;

Figure 10 former limit peak current threshold setting procedure figure;

Figure 11 switching signal control flow chart;

Figure 12 system Chief waveform is always schemed;

Figure 13 Matlab and Modelsim associative simulation design sketch;

Embodiment

In order to more detailed explanation the present invention, below in conjunction with accompanying drawing technical scheme is specifically implemented to the present invention and relative theory describes in detail and illustrates.

Fig. 3 is a numerically controlled inverse excitation type converter system, and the digitial controller in figure is the present invention.The present invention is used in this inverse excitation type converter, controls and regulates the constant current of this inverse excitation type converter to export.In this inverse excitation type converter system, sampled by the current value of a sampling resistor Rs to former limit, and after being quantized by 8 ADC, sampled signal Isamp is passed to digitial controller.Pass through bleeder circuit, dividing potential drop is carried out to the voltage on auxiliary winding, and by comparison module, the signal after dividing potential drop on auxiliary winding and 0V voltage are compared, obtain a low and high level signal Vsamp, as shown in Vsamp signal in Figure 12, and by this signal transmission to digitial controller, obtain degaussing time Td_n and A, B, C tri-control signals by the controlling of sampling of digitial controller.By a resistor voltage divider circuit, obtain the level Vin that powers on of this converter, start digitial controller.Meanwhile, the output voltage on auxiliary winding is powered for this digitial controller.The constant current principle of this digitial controller is as shown in formula (1):

$I_o=\frac{1}{2}\frac{I_{p,pk}\left(n\right)T_d\left(n\right)}{T_s\left(n\right)}\frac{N_p}{N_s}---\left(1\right)$

Wherein, Ip, pk (n) represent former limit peak current, and (n represents the count value of degaussing time to Td, and Ts (n) represents the counting step of switch periods, the turn ratio of Np:Ns indication transformer.The turn ratio of transformer is the preset parameter of transformer, can not change.Under above-mentioned different switch periods, former limit peak current is constant, and when the ratio of degaussing time and switch periods is also constant, output current is also just constant.

Fig. 4 is the structured flowchart of digitial controller of the present invention.This digitial controller comprises auxiliary winding output voltage sample states machine, degaussing time (Td) compensating module, bidirectional counter module, former limit peak current (Ip, pk (n)) compensating module, former limit peak current threshold arrange module and switching signal control module.

Auxiliary winding sample states machine, for realizing the sampling of the Td_n of degaussing time, obtains A, B and C tri-control signals by Ton switch controlling signal and Vsamp two signal controlling, corresponding S1, S2 and S3 tri-kinds of states.For controlling bidirectional counter plus-minus counting state.And pass through value Td_1 and the Td_2 of S2 state and S3 state two initial time counter count, count to get degaussing time Td_n, shown in following formula (2):

T _d_n＝＝T _d_1-T _d_2 (2)

Wherein, Td_n represents the length of degaussing time, Td_1 and Td_2 represents the count value of degaussing time starting point and end point counter respectively.

Assist the State Transferring of winding sample states machine as shown in Figure 5: the working method of this state machine is as follows:

S1 state: under this state, MOS switching tube is in conducting state, now sampling module does not perform any operation.Under this state, in code, variable is all set init state.After MOS switching tube is converted to off state by conducting state, state machine just enters S2 state by S1 state.

S2 state: after entering S2 state, records the count value of switch periods counter this moment, is designated as Td_1 (this clock keeps adding counting in whole switch periods, and resets after each switch periods terminates).Under this state, in Figure 12, signal Vsamp remains high level, and when in a switch periods, Vsamp first time, state machine entered S3 state from after this level becomes low level.

S3 state: the value of current time counter, after entering S3 state, is designated as Td_2 by state machine.Waiting for MOS switching tube again after conducting, is S1 state by S3 State Transferring.Degaussing time Td_n can be obtained from S3 state.The account form of degaussing time is as formula (2).

Time in Figure 12 due to degaussing time sampling, there is delay relative to knee point in C point, causes degaussing time sampling to there is error, affect output current precision.Therefore, need a compensating circuit to compensate this section retards, become degaussing time bias.The mode compensated, shortens Δ Ts (n), whole switch periods Ts (n) is shortened, makes switching tube shorting advance within the t3 time.Bidirectional counter, after counting down to compensation after counting count value Dpre (n) new, switching tube is conducting again, and switching tube enters next switch periods.

D _pre(n) _new＝D _pre(n)-ΔT _s_n (3)

Wherein, after Dpre (n) new compensates, bidirectional counter counting terminates counting reference value, and before Dpre (n) compensates, bidirectional counter counting terminates counting reference value, and Δ Ts (n) is a switch periods offset.Under different output load condition, need the amount that compensates different, when digital compensation circuit designs, by the size of degaussing time Td_n sampled, relatively and select to obtain suitable compensation rate Δ Ts (n) in a lookup table by comparison value.

Degaussing time (Td) compensating module is used for compensating the delay of degaussing time, and its input signal comprises degaussing time Td_n, current constant control marking signal sign_start, status signal C, clock signal clk and reset signal rst.When sign_start and C signal is all high level, i.e. current time, controller operates in digital current constant control state, and state machine operates in S3 state, degaussing time Td_n is compared by multichannel comparison module and obtains a data select signal data_select control data selector, according to look-up table, under utilizing data selector can select current state from data register, need clock periodicity Δ Ts (n) compensated.Fig. 6 is degaussing time (Td) compensating module specific implementation circuit.

Bidirectional counter module is used for by state control signal A, B, C and degaussing time bias value Δ Ts (n), control the value of bidirectional counter, finally obtain switch periods end signal cc_sign_off under this state, for control switch cycle control signal Ton, switch periods is made to enter next cycle circulation.By at state S1 with realize in the S3 time adding a counting, under state S2 state, the time subtracts b counting and realizes the proportions constant of degaussing time and switch periods, thus realizes digital constant current.

The control principle of numeral current constant control:

$I_0=\frac{1}{2}\frac{I_{p,pk}\left(n\right)T_d\left(n\right)}{T_s\left(n\right)}\frac{N_p}{N_s}$

Wherein, Ip, pk (n) represent former limit peak current, and Td (n) represents the count value of degaussing time, and Ts (n) represents the counting step of switch periods, the turn ratio of Np:Ns indication transformer.The turn ratio of transformer is the preset parameter of transformer, can not change.Under above-mentioned different switch periods, former limit peak current is constant, and when the ratio of degaussing time and switch periods is also constant, output current is also just constant.

The operation principle of bidirectional counter,

$\frac{T_d\left(n\right)}{T_s\left(n\right)}=\frac{t_2}{t_1+t_2+t_3}=\frac{a}{a+b}$

Wherein, Ts (n) represents the count value of switch periods, Td (n) represents the count value of degaussing time, t1, t2 and t3 represent three time periods in a switch periods, a represents that counter adds the increment of counting hour counter within each clock cycle, and b represents that counter subtracts the decrement of counting hour counter within each clock cycle.

Fig. 7 is this bidirectional counter workflow, and its waveform transformation is as shown in b_count signal in Figure 12.In switching tube ON time, namely under S1 state, control signal A is high level, bidirectional counter adds counting from non-vanishing initial value Dpre (n), in each clock cycle, counter adds a counting, and to arrange cc_sign_off signal be low level.After the sampled value of primary current reaches reference threshold, switching tube disconnects, and namely under S2 state, when control signal B is high level, the basis that bidirectional counter counts under S1 state is changed into and subtracts counting, and in each clock cycle, counter subtracts b counting.After the degaussing time terminates, namely state machine is under S3 state, control signal C is high level, on the basis of the counting in S2 state for time, change into again and add counting, each clock cycle inside counting device adds a counting, until the value that counter is Dpre (n)-Δ Ts (n) or counter count reaches 998, cc_sign_off signal is set to high level, and unison counter is initialized as Dpre (n) again.The ratio that can calculate degaussing time and whole clock cycle is:

T _s(n)＝t ₁+t ₂+t ₃(4)

T _d(n)＝t ₂(5)

$\frac{T_d\left(n\right)}{T_s\left(n\right)}=\frac{t_2}{t_1+t_2+t_3}=\frac{a}{a+b}---\left(6\right)$

In formula, Ts (n) represents the count value of switch periods, and Td (n) represents the count value of degaussing time, and t1, t2 and t3 represent three time periods in a switch periods.

Former limit peak current compensation module is used for compensating former limit peak current reference threshold value, makes the former limit peak current that obtains in each switch periods equal.For the delay existed in converter system, by carrying out preliminary treatment to the reference value of former limit peak current, as the reference value of new primary current peak value, thus compensate for owing to postponing the impact caused former limit peak value, thus improve the precision of output current, effectively improve line regulation.

Due under different switch periods, input voltage is different, makes the rate of rise of primary current in each cycle of opening the light also different.In working control process, there is time delay in the sampling process transfer of data of ADC module, and due to the effect of far-end leakage inductance be that switching tube turns off and there is time delay constantly, therefore, in different switch periods, due to the effect of above-mentioned delay cause different switch periods under to obtain former limit peak current different, and the actual former limit peak current obtained is larger than ideal value.Can illustrate that input voltage changes by following formula, the increment of the former limit peak value obtained identical time of delay is different.

$I_{p,\mathrm{pk}}=\frac{V_{\mathrm{in}}}{L_m}{T}_{\mathrm{on}}---\left(7\right)$

In formula, Ip, pk represent former limit peak current, and Vin represents input voltage, and Lm represents former limit inductance value, and Ton represents the ON time of switching tube.

$I_p=\frac{V_{\mathrm{in}}}{L_m}t---\left(8\right)$

Wherein, Ip represents primary current value, and Vin/Lm is the rate of rise of primary current, and former limit inductance is a preset parameter of transformer.

Former limit peak current threshold arrange module for according to digitial controller under different operating states, former limit peak reference threshold value Ip, ref (n) are set.Under startup operating state, Ip, ref (n) are from an initial value, and switch periods increases one by one, does not adopt any compensation simultaneously, reduces the loss to MOS switching tube.Under current constant control operating state, Ip, ref (n) value in each switch periods, is determined by maximum reference threshold Ip, ref (n) max of primary current and primary current peak compensation amount Δ Ip, pk.By former limit peak current reference threshold value Ip, ref (n), deduct compensation rate Δ Ip, pk as new compensation rate, thus reaches the effect of compensation.

Former limit peak current reference threshold value Ip, ref (n), obtained by following formula:

I _p,ref(n)＝I _p,ref(n) _max-ΔI _p,pk(n)

Wherein, Ip, ref (n) are new former limit peak reference threshold value, the maximum reference threshold of Ip, ref (n) max primary current.Former limit peak current threshold arranges module, provides current constant control marking signal sign_start signal, realizes control and the switching of the different operating state of digitial controller.

In order to make the actual former limit peak current obtained, close to perfect condition, can by compensating former limit peak reference threshold value, thus make in side circuit, after one period of time of delay, primary current be close to ideal value, and Fig. 8 is its compensation effect figure.The control signal of former limit peak current compensation module mainly contains counter signals count, primary current sampled value Isamp, current constant control marking signal sign_start, clock signal clk and reset signal rst, finally obtain the offset Δ Ip of a former limit peak current, pk, as shown in Figure 9.C_ref1, C_ref2, C_ref3, C_ref4, C_ref5 in Fig. 9, they represent the reference value of counter, and their relation is as shown in formula (9):

$\left\{\begin{array}{c}C\_ref2=C\_ref1+1\\ C\_ref3=C\_ref2+1\\ C\_ref4=C\_ref3+1\\ C\_ref5=C\_ref4+1\end{array}\right.---\left(9\right)$

By comparator C1, C2 and C3, count value and C_ref1, C_ref2, C_ref3 of counter count compare, when the count value of count equals individual count device reference value, respectively by data selector, the sampled value of current time primary current is preserved in a register.When the value of counter count equals reference threshold C_ref4, adder work, carries out plus-minus by the primary current sampled value be kept at before in register Q1, Q2 and Q3 by plus-minus counting module and calculates.When the value of counter count equals reference threshold C_ref5, shift register work, what adder addition obtained moves right 1 with sum, and realize except 2 calculate, the value obtained is exactly the compensation rate Δ Ip of former limit peak current, pk.

Foregoing circuit to realize formula as follows

${\mathrm{\ΔI}}_{p,pk}\left(n\right)=\frac{\left(I_{t3}\right(n)-I_{t2}(n\left)\right)+\left(I_{t2}\right(n)-I_{t1}(n\left)\right)}{2}---\left(10\right)$

In formula, Δ Ip, pk represent primary current peak compensation amount, and It1, It2, It3 are the sampled points of three continuous moment primary currents after blanking ahead of the curve.Ahead of the curve after blanking, this former limit peak current compensation modular design, can be applicable to inverse excitation type converter and be operated in DCM pattern, under CCM pattern and BCM pattern, increases application scenario.

By former limit peak current reference threshold value, deduct compensation rate Δ Ip, pk as new compensation rate, thus reaches the effect of compensation.Which calculates the compensation rate of former limit peak value, not only may be used for the inverse excitation type converter under DCM mode of operation, also may be used in the inverse excitation type converter under CCM mode.Simultaneously, because this compensation rate account form removes the primary current sampled value of the several points after the magnetic time, the mode of averaging, to realize the calculating of primary current compensation rate, effectively raises the situation of antigen limit current disturbing, improves the computational accuracy of compensation rate.If need the computational accuracy improving compensation rate further, more point can be got continuously and average, calculation compensation amount.

I _p,ref(n)＝I _p,ref(n) _max-ΔI _p,pk(n) (11)

Wherein, Ip, ref (n) are new former limit peak reference threshold value, the maximum reference threshold of Ip, ref (n) max primary current.

Figure 10 is that former limit peak current threshold arranges block flow diagram, and the effect that former limit peak current threshold arranges module is the reference threshold arranging former limit peak current.When the value of primary current is greater than the reference threshold of former limit peak current, switch controlled signal Ton will be converted to low level by high level.As shown in Figure 10, when after the input of Vin signal, digitial controller is just started working, former limit peak current threshold arranges module initialization, former limit peak current reference threshold value Ip is set, the maximum reference threshold Ip of ref (n), primary current, the maximum reference threshold Ip of primary current under ref (n) max and starting state, ref (n) max_start, be low level by current constant control marking signal sign_start, switch tube working status marking signal Ton_sign is low level.When switching tube conducting, Ton is 1, and Ton_sign is low level, then judge whether current primary current reference threshold is greater than Ip, ref (n) max_start, if meet, then illustrates that digitial controller is also in starting state.Arranging sign_start is low level, Ip, ref (n) are added 1 certainly, and to arrange Ton_sign be that high level ensures this process Exactly-once in a switch periods.Wait switching tube disconnects, and Ton becomes low level, and Ton_sign is re-set as low level.Then return judgement, wait for, until next switch periods Ton high level signal, enter next circulation.If, judge that current primary current reference threshold is less than Ip, ref (n) max_start, then illustrate that digitial controller should be switched to constant-current control module, and to arrange sign_start be high level, after this digitial controller will be operated in current constant control state always, until external power source power-off powering on again.Now, former limit peak current threshold is by maximum reference threshold Ip, ref (n) max of primary current and former limit peak current compensation value Δ Ip, and pk, as shown in formula ().Wait switching tube disconnects, and Ton becomes low level, and Ton_sign is re-set as low level.Then return judgement, wait for, until next switch periods Ton high level signal, enter next circulation.Wherein, current constant control marking signal sign_start works in current constant control state or starting state to distinguish digitial controller.When sign_start is low level, digitial controller is operated in startup operating state; When sign_start is high level, digitial controller is operated in constant current operation state.

The control signal that switching signal control module is provided by modules, current constant control marking signal ss_start, switch periods end signal cc_sign_off, former limit peak reference threshold value Ip, ref (n), and the count signal carried, control and by-pass cock pipe control signal Ton.

Figure 11 is switching signal control module flow chart, and the effect of switching signal control module, mainly by the control result of modules, regulates ON time and the turn-off time of Ton in a switch periods.Its control signal mainly contains counter count, current constant control marking signal sign_start, conducting marking signal cc_sign, primary current sampled signal Isamp, former limit peak current reference threshold value Ip, ref (n).After Vin signal powers on, digitial controller is just started working, the initialization of switching signal control module, by count clearing, Ton signal and cc_start home position signal low level.When the count value of count is greater than zero and is less than 10, Ton is set to high level, cc_start is high level.

If sign_start is low level, then illustrate that digitial controller is operated in startup operating state, when judging that count is more than or equal to 10, whether primary current sampled value Isamp is less than Ip, ref (n), if met, then judge whether the value of current time counter is greater than 30, if be greater than 30, Ton is set to low level, cc_start is set to low level, if be less than 30, then return and continue to judge whether Isamp is less than Ip, ref (n); If Isamp is less than Ip, ref (n), then illustrate that primary current will reach threshold value, switching signal Ton is set to low level, and cc_start is set to low level; Wait for and working as, when the value of counter equals 299, under starting state, this switch periods terminates, and Ton is set to high level, and cc_start is set to high level, and is reset by counter count.

If sign_start is high level, then illustrate that digitial controller is operated in current constant control operating state, when judging that count is more than or equal to 10, whether primary current sampled value Isamp is less than Ip, ref (n), if met, then judge whether the value of current time counter is greater than 150, if be greater than 150, Ton is set to low level, cc_start is set to low level, if be less than 150, then return and continue to judge whether Isamp is less than Ip, ref (n); If Isamp is less than Ip, ref (n), then illustrate that primary current will reach threshold value, switching signal Ton is set to low level, and cc_start is set to low level; Wait for, until it is high level that bidirectional counter module provides switch periods end signal cc_sign_off, under current constant control state, this switch periods terminates, and Ton is set to high level, and cc_start is set to high level, and is reset by counter count.

Above-mentioned, the reference comparison value 10,30,150,299 of counter count can regulate according to actual conditions situation, wherein 10 represent, shortest time needed for lead-edge-blanking, 30 representative digit controllers are in the maximum permission ON time of startup operating state switching signal Ton, the maximum permission ON time of switching signal Ton under 150 expression current constant control operating states, 299 represent the clock cycle starting operating state switching signal Ton.

In Fig. 4, the signal between modules controls mutually, mutually regulates the effect reaching digital constant current.After whole inverse excitation type converter powers on, Vin has a high level and produce, using the enabling signal of Vin signal as whole digitial controller, start whole digitial controller.After digitial controller starts, former limit peak current threshold arranges module and begins operating in startup operating state, and provides sign_start by signal in Fig. 4 4011, controls whole digitial controller.Former limit peak current threshold arranges module by the reference threshold Ip of former limit peak current, ref (n) passes to switching signal control module, simultaneously, switching signal control module is also transmitted switching tube duty cycle control signal Ton signal and is arranged module to former limit peak current threshold, allows the threshold value of this module former limit peak current in a switch periods only convert once.After sign_start signal becomes high level, digitial controller is converted to current constant control state by starting operating state.Former limit peak current threshold arranges module by the reference threshold Ip of former limit peak current, ref (n) passes to switching signal control module (as shown in holding wire 4010), switching signal control module is also transmitted Ton signal and is arranged module (as shown in holding wire 405) to former limit peak current threshold, allows the threshold value of this module former limit peak current in a switch periods only convert once; Auxiliary winding output voltage sampling module, Ton (4012) signal utilizing switching signal control module to transmit, the signal of Vsamp shown in Figure 12 is sampled, obtains A, B, C tri-control signals and control to bidirectional counter, as shown in holding wire 403; Meanwhile, auxiliary winding output voltage sampling module utilizes the count signal at switching signal control module place, calculates Td, and passes to (degaussing time) compensating module C control signal and degaussing time Td_n, as shown in holding wire 404.Degaussing time bias module passes through the mode of look-up table to compensation rate Δ Ts (n) of bidirectional counter degaussing time, as shown in holding wire 406.Bidirectional counter, by A, B, C tri-control signals, control the plus-minus of bidirectional counter, the count value count (holding wire 409) simultaneously given in conjunction with switching signal control module judges to provide sign_cc_off signal to switching signal control module, as shown in holding wire 409, the end in control switch cycle.Under digitial controller is operated in current constant control state, former limit peak current compensation module starts to start work, calculate by the count signal (holding wire 406) provided sampled signal Isamp (holding wire 402) and the switch periods of input primary current and obtain the compensation rate Δ Ip of former limit peak current threshold, pk, and this compensation rate is passed to former limit peak current threshold module is set, as shown in holding wire 408.No matter digitial controller is operated in and starts operating state or current constant control state, and switching signal control module all will to switching tube control signal Ton, as shown in holding wire 407.

Figure 12 is the Chief oscillogram of this digitial controller.When switching tube conducting, the work of switch periods counter (count) keeping count, bidirectional counter (b_count) adds counting from counting initial value Dpre (n) simultaneously, and primary current (Ip) rises gradually.Now, state machine is operated in S1 state.When primary current reaches former limit peak current reference threshold module (Ip, ref (n)), switch controlling signal Ton high level becomes low level, state machine by S1 State Transferring to S2 state, simultaneously bidirectional counter b_count is become subtracted counting, now transformer secondary side current (Is) linear decline from the original counting that adds.Auxiliary winding sample amplitude when reproduced Vaux is compared by no-voltage, can obtain Vsamp signal, by auxiliary winding output voltage sample states machine, can obtain degaussing time Td_n.After the degaussing time that state machine samples terminates, state machine enters S3 state, bidirectional counter, becomes add counting from subtracting counting, until bidirectional counter, count down to initial count value again, this switch periods terminates, enter next switch periods, counter count resets and again counts.By each switch periods s2 state start time counter value Td_1 and S3 state start time Td_2, degaussing time Td_n can be calculated, as shown in formula (2).

Meanwhile, owing to there is the time delay of four/harmonic period surely between knee point and C point, need to adopt degaussing time compensation circuit, switch periods is compensated.Due to Installed System Memory delayed impact, need former limit peak-current compensation circuit to compensate former limit peak current, make converter can export high-precision electric current.

Above-mentioned said modules can by hardware description language Verilog HDL, and description can realize.

Figure 13 is the associative simulation design sketch of Matlab and Modelsim.In figure, waveform is followed successively by output current Io from top to bottom, auxiliary winding sample amplitude when reproduced Vaux, comparison module output signal Vsamp, switching tube duty cycle control signal Ton.Constant output current is at 2A.

Claims (1)

1. the digital constant-current controller based on inverse-excitation type former limit feedback, it is characterized in that, comprise auxiliary winding output voltage sample states machine, degaussing time Td compensating module, bidirectional counter module, former limit peak current Ip, pk (n) compensating module, former limit peak current threshold arrange module and switching signal control module; Wherein:

Auxiliary winding output voltage sample states machine, the Ton switch controlling signal that receiving key signal controlling module exports and the voltage on auxiliary winding carry out dividing potential drop sampling, low and high level signal Vsamp relatively and former limit peak current threshold arrange the current constant control marking signal sign_start that module exports, export A, B and C tri-control signals, corresponding S1, S2 and S3 tri-kinds of states, for controlling bidirectional counter plus-minus counting state, and pass through value Td_1 and the Td_2 of S2 state and S3 state two initial time counter count, count to get degaussing time Td_n=Td_1 ﹣ Td_2, Td_n represents the length of degaussing time, Td_1 and Td_2 represents the count value of degaussing time starting point and end point counter respectively,

Degaussing time Td compensating module, receive degaussing time Td_n and the status signal C of auxiliary winding output voltage sample states machine output, former limit peak current threshold arranges current constant control marking signal sign_start and the clock signal clk of module output, reset signal rst, when sign_start and C signal is all high level, i.e. current time, control system operates in digital current constant control state, and state machine operates in S3 state, degaussing time Td_n is compared by multichannel comparison module and obtains a data select signal data_select control data selector, under utilizing data selector to select current state from data register, need clock periodicity Δ Ts (n) compensated,

Bidirectional counter module, receive the count value count that A, B, C tri-control signals of auxiliary winding output voltage sample states machine output and degaussing time bias value Δ Ts (n) of degaussing time Td compensating module output and switching signal control module provide, control the value of bidirectional counter, under finally obtaining this state, switch periods end signal cc_sign_off passes to switching signal control module, for control switch cycle control signal Ton, switch periods is made to enter next cycle circulation;

Former limit peak current Ip, pk (n) compensating module, receive the current constant control marking signal sign_start that the sampled signal Isamp of input primary current and the counter count signal of switching signal control module output and former limit peak current threshold arrange module output, by the compensation rate Δ Ip of former limit peak current threshold calculated, pk (n) passes to former limit peak current threshold and arranges module;

Former limit peak current threshold arranges module, receive former limit peak current Ip, the compensation rate Δ Ip of the former limit peak current threshold that pk (n) compensating module exports, the Ton switch controlling signal that pk (n) and switching signal control module export arranges former limit peak reference threshold value Ip, ref (n), Ip under current constant control operating state, the value of ref (n) in each switch periods, by the maximum reference threshold Ip of primary current, ref (n) max and primary current peak compensation amount Δ Ip, pk (n) determines, Ip, ref (n)=Ip, ref (n) max ﹣ Δ Ip, pk (n), Ip in formula, ref (n) is new former limit peak reference threshold value, export to switching signal control module, former limit peak current threshold arranges module output constant current and controls marking signal sign_start signal, realize control and the switching of controller different operating state,

Switching signal control module, receive former limit peak current threshold and the current constant control marking signal sign_start of module output and former limit peak reference threshold value Ip is set, the switch periods end signal cc_sign_off that the sampled signal Isamp of ref (n) and input primary current and bidirectional counter module provide, in conjunction with own count value count, the control signal Ton of control and by-pass cock pipe.