Image sensing element simulator
Technical field
The present invention relates to a kind of image sensing element simulator, particularly relate to a kind of output signal that can the virtual image sensing element, and the sequential of virtual generation sensing element, the image sensing element simulator of trigger output signal is used the exploitation debug for picture system or element.
Background technology
Fig. 1 is the line construction calcspar that summary shows one scan device 10.Light source drive 101 driving light source devices (not shown) irradiation in the scanner 10 is scanned, scanned image pattern 102 is through mechanism such as projection, focusing and by 103 receptions of image sensing element (for example CCD, CIS), and the clock signal Timing that the acts may of image sensing element 103 is exported by scanner control device 106 is controlled.The image of image sensing element 103 inputs to analog/digital converter 105 through amplifier 104, the simulated image data that image sensing element 103 is received is converted into DID, scanner control device 106 is then given analog/digital converter 105 by digital/analog converter 110 output reference voltage values at this moment, so that carry out mould/number conversion.This digital information may deposit in for example medium pending by the storage buffer 109 of the fifo structure that SRAM constituted by scanner control device 106.When host computer system 108 is wanted display image, after scanner control device 106 is read digital image information and handled by storage buffer 109, by interface control unit 107 digital image information is sent to host computer system 108 and shows.
In addition, other accessory circuits of scanner still comprise oscillator 111, in order to required basic clock pulse to be provided; Power initiation resetting apparatus 112 provides the power management of scanner; The stepper motor of being monitored by scan controller 106 113; And, relevant sensing apparatus 114, and more can connect other required external devices 115.
In the research and development process of scanner system, when not reaching requirement if the picture quality of scanning output has flaw, problem might be to occur in the processing of input picture sensing element 103, for example, image sensing element 103 quality own or image pattern 102 are disturbed by signal when input picture sensing element 103.If not said circumstances, then problem points roughly occurs on the follow-up processing of circuit of image sensing element 103, as analog/digital converter etc.
Since existing function generator can't the virtual image sensing element output signal and in order to trigger the clock signal of image sensing element, so the engineer is in debug, in the adjusting stage, can't be about to the wrong possibility of image sensing element earlier forecloses, so that verify the correctness of the treatment circuit that analog/digital converter etc. is follow-up in advance.So, for the engineer, will expend the plenty of time in debug and adjustment process.
Summary of the invention
Given this, purpose of the present invention just is to propose a kind of image sensing element simulator, the mode that application can be planned produces the behavior that virtual signal comes the analog image sensing element, and its output timing can be triggered by programming or by the sequential of outside with image sensing element.
For achieving the above object, a kind of image sensing element simulator of the present invention, in order in the debug process of a picture system, to replace image sensing element wherein, it comprises a main control unit, at least one storage arrangement, at least one output conversion device, described output conversion device comprises a digital/analog converter at least, wherein, described main control unit is connected with a host computer system by bus interface, this main control unit produces and exports a reference picture sensing clock signal voluntarily, described host computer system downloads the reference picture pattern to this main control unit, this main control unit receives this reference picture pattern and is stored in described storage arrangement, and trigger voluntarily by triggering or this inner reference picture sensing clock signal of the image sensing clock signal of picture system, by reading this reference picture pattern in this memory, and being sent to described output conversion device, this output conversion device carries out output signal after the digital-to-analogue conversion with this reference picture pattern.
According to technique scheme, the present invention also can further comprise a subsystem storage device for described main control unit temporal data.
Described memory device is changed to dual-ported memory.
Described output conversion device comprises a filter amplifier at least, and the signal after the described digital/analog converter conversion is sent into this filter amplifier.
When applying the present invention to the development process of a new images system, the present invention's image sensing element simulator can produce specific picture signal, makes things convenient for system's debug, efficient that can accelerate development.Simultaneously, this system can also have the suggestion sequential of set of pulses output as the virtual image sensing element, can compare than usefulness in order to the sequential with the real sensing element in outside.
Description of drawings
Fig. 1 is the line construction calcspar that summary shows the one scan device;
Fig. 2 shows that image sensing element simulator of the present invention is applied to implement in the scanner system configuration scenario of debug;
Fig. 3 is the first embodiment line block diagram that shows the present invention;
Fig. 4 is the second embodiment line block diagram that shows the present invention;
Fig. 5 is the 3rd embodiment line block diagram that shows the present invention.
Embodiment
Fig. 2 shows that the present invention's image sensing element simulator is applied to implement in the scanner system configuration scenario of debug, and wherein identical with Fig. 1 device is all represented with same-sign.Among the figure, numeral 200 expressions image sensing element simulator of the present invention, it has replaced image sensing element 103 devices such as grade among Fig. 1.
Image sensing element simulator 200 of the present invention, as ISA, EISA, PCI etc. and connects with above-mentioned host computer system 108 by the bus interface 202 of host computer system 108 inside.The triggering of the image sensing clock signal S_timing that produces by scanner control device among the figure 106, also or by the image sensing element simulator 200 inner reference picture sensing clock signal R_timing that produce trigger voluntarily, and make image sensing element simulator 200 output analog signals.The reference picture sensing clock signal R_timing that is produced by image sensing element simulator 200 also can be compared to carry out debug in order to the image sensing clock signal S_timing with 106 generations of scanner control device.
First embodiment
Fig. 3 shows the present invention's the first embodiment line block diagram.The image sensing element simulator 200 of present embodiment comprises following device.One main control unit 300, the bus by host computer system 108 inside (Address_bus, Data_bus, and Control_bus) and connecting with it.First and second memories (301a, 301b) are downloaded the reference picture pattern of giving above-mentioned main control unit 300 in order to store host computer system 108.First and second buffer (302a, 302b) then is the direction in order to data access in the coordinate memory (301a, 301b).
The first output conversion device OPC1 is made of the first digital/analog converter 303a and filter amplifier 304a; The second output conversion device OPC2 is made of the second digital/analog converter 303b and filter amplifier 304b.Two output conversion devices will be in order to becoming analogue data output by the digital data conversion of reading in the above-mentioned memory (301a, 301b).
Stagger the time applying the present invention to remove, at first reference pattern or standard pattern to be written in first and second memories (301a, 301b) in the image sensing element simulator.Scanner control device 106 output image sensing clock signal S_timing and trigger main control unit 300 make its analog image element action (or triggered by the reference picture sensing clock signal R_timing that image sensing element simulator itself is produced).By the control of main control unit 300, the image pattern that is stored in the above-mentioned memory (301a, 301b) then exports output conversion device (OPC1, OPC2) respectively to.In this embodiment, the output signal (OS, CS) of output conversion device (OPC1, OPC2) is promptly distinguished the main output signal and the compensation output signal of image sensing element in the analog scanner.And output signal (OS, CS) is the amplifier 104 in the input scanner, then is shown on the host computer system 108 at last.Again in addition relatively can be as the foundation of debug with shown pattern and reference pattern.
Visual its of the present invention's image sensing element simulator needs and sets up subsystem storage device 305, and it is made of ROM or RAM memory, can be in order to data such as the control program of storage main control unit, information.
By above-mentioned description the present invention's image sensing element simulator as can be known, remove in the exploitation of scanner system and to stagger the time, can produce specific picture signal (OS and CS), to replace the action of image sensing element, be convenient to the problem that image sensing element itself is possible and get rid of (also can suppose earlier to carry out debug earlier under the image sensing element situation out of question) in advance.Therefore, the engineer can be earlier at the debug of going ahead of the rest of the follow-up circuit of image sensing element, can improve correct and accelerate the speed of debug.Simultaneously, image sensing element simulator itself also can produce reference picture sensing clock signal R_timing, can be compared to carry out debug in order to the image sensing clock signal S_timing with scanner system.And reference picture sensing clock signal R_timing can comply with actual Information Requested, and is set by programming.
Second embodiment
Fig. 4 shows the present invention's the second embodiment line block diagram, and wherein identical with first embodiment part device is still with identical symbolic representation.
Please comparison diagram 3, Fig. 4, the structure of second embodiment is roughly similar to first example structure, and difference is that second embodiment uses two dual-ported memories (dual port memory) 400a and 400b to store host computer system 108 to download the reference picture pattern of giving image sensing element simulator.Because host computer system 108 and master control system 300 can read while write different storage address among above-mentioned dual-ported memory 400a and the 400b, download the supreme usefulness of stating image sensing element simulator of above-mentioned image pattern so can promote above-mentioned host computer system.Simultaneously, among first embodiment employed first and second buffer 302a and 302b also can omit need not.Other operating principle is identical with first embodiment, is then no longer given unnecessary details.
The 3rd embodiment
Fig. 5 shows the present invention's the 3rd embodiment line block diagram, and wherein identical with first embodiment part device is still with identical symbolic representation.
Please comparison diagram 3, Fig. 5, the structure of the 3rd embodiment roughly with the structural similarity of first embodiment, difference be not have among the 3rd embodiment among first embodiment first and second buffers existence.Therefore, among the 3rd embodiment, be stored in the image pattern among memory 301a and the 301b, after must reading via main control unit 300 earlier, portion is temporary within it, is resent to output conversion device (OPC1, OPC2).Other operating principles are identical with first embodiment, then no longer given unnecessary details.
Among the above embodiment, be the application of doing debug at the picture system of scanner, but the present invention is only applicable to scanner, the picture system that contains such as the image component of CCD and CIS etc. all can utilize the present invention, to promote the convenience of system's debug.In addition, in the foregoing description, in order to the memory of store images pattern, its number and amount of capacity are decided by the pattern size that institute's desire is downloaded.