CN1149764A - 用于将半导体器件安装到基片上的互连结构 - Google Patents

用于将半导体器件安装到基片上的互连结构 Download PDF

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CN1149764A
CN1149764A CN96109653A CN96109653A CN1149764A CN 1149764 A CN1149764 A CN 1149764A CN 96109653 A CN96109653 A CN 96109653A CN 96109653 A CN96109653 A CN 96109653A CN 1149764 A CN1149764 A CN 1149764A
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semiconductor chip
semiconductor device
interconnection structure
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姜大淳
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Covinson Intelligent Finance N.B.868 Co.
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Abstract

在基片上安装半导体器件的互连结构包括：具有固定于其上的多个焊料球的半导体芯片，及与半导体芯片紧密粘结且其中有多个孔的底部填充物层。通过使用该结构，当对半导体芯片和基片进行电连接时，利用预先提供的底部填充物层，而不用任何另外的底部填充步骤，这样便可简化整个工艺过程，并可改善可靠性。

Description

用于将半导体器件安装到基片上的互连结构
本发明涉及一种把半导体器件安装到基片一的互连结构，特别涉及一种在把半导体器件安装到支撑板或基片上的同时进行底部填充的互连结构。
图1A和1B示出了一种把半导体器件安装到基片上的公知的常规互连结构。参考标号1表示在其底部有多个焊料球2的半导体芯片。多个焊料球可以由焊料凸出物构成。形成于半导体芯片1和印刷电路板3间的焊料球2的外圆周表面处构成底部填充区4。
在有如此构型的半导体器件中，由加热或加压在印刷电路板3上安装半导体芯片1。如图1B所示，此后，用喷嘴7将环氧树脂模制化合物(未示出)注入到底部填充区4。然后，环氧树脂模制化合物流到底部填充区，进行底部填充，因而完成倒装片封装或芯片式封装。
然而，为了安装半导体器件，由于如上构成的互连结构采用把环氧树脂模制化合物急剧地或利用重力注入到半导体芯片和印刷电路之间的方法，所以会产生以下问题。
首先，由于不容易去除包含于注入到半导体芯片和印刷电路板间的物质中的任何气泡，所以在底部填充物质和焊料球(凸点)中会发生龟裂。
第二，由于注入到半导体芯片和印刷电路板间的物质无法总保持其结合力，所以产品的可靠性下降，并会发生短路现象。
第三，因为必须另外进行底部填充工艺，所以整个工艺复杂，从而引起生产成本增加和生产率下降。
因此，本发明的一个目的是提供一种克服上述问题的易于将半导体器件安装到基片上的改进互连结构。
本发明的另一目的是提供一种能通过淀积底部填充物质并对其加压将半导体器件安装到基片上的互连结构，该结构能增加半导体器件和印刷电路板间的层间结合力。
为了实现上述目的，本发明提供一种包括具有多个固定于其上的焊料球的半导体芯片；和其中具有多个孔的底部填充物层。
图1A是常规倒装片封装的透视图；
图1B是沿图1A的A-A线的剖面图；
图2A是根据本发明的一个实施例的互连结构的透视图；
图2B是根据本发明的底部填充物层的透视图；
图2C是适合本发明的半导体芯片的透视图；
图3是沿图2A的B-B线的剖面图；
图4A是表示底部填充物层的加压步骤的剖面图；
图4B是已完成的倒装片封装的剖面图。
下面将参照附图说明本发明的优选实施例。
图2A是根据本发明的一个实施例的互连结构的透视图。如该图所示，将平面化的底部填充物层14和具有多个焊料球16(参见图2C)的半导体芯片18以层叠的方式依次粘结和安装到印刷电路板13的整个表面上。
在印刷电路板13上安装半导体芯片(或半导体器件)18的各结构示于图2B和2C。
参见图2B，底部填充物层14为方形，其中以阵列形式在固定间隔处形成有多个孔15。孔15的形状和结构可随焊料球16(下面说明)的形状和结构而改变，如图2B所示，对此最好是椭圆型。
图2C是半导体芯片的透视图。适合本发明的半导体芯片18就象在BGA(球网格阵列)封装中的一样具有多个焊料球16。形成多个焊料球16和孔15，使它们相吻合地互相插在一起。这样，在印刷电路板的上表面上，形成底部填充物层14，然后，安装半导体芯片18。
图3是沿图2A的B-B线的剖面图。如图3所示，底部充物层14与半导体芯片18紧密结合(参见图4A和4B)以致于相互构成一体。在这一点上，最好是使底部填充物层14的高度“d”，低于焊料球16的高度“d′”。
图4A是表示底部填充物层的加压步骤的剖面图。如该图所示，把有焊料球16的半导体芯片18置于印刷电路板13上，此后，通过加热和加压，进行安装步骤。此时，首先把焊料球16压缩预定距离“G”，接着用加压装置(未示出)对底部填充物层14加压，在这方面，对底部填充物层14加压时，它在横向和纵向的宽度从W1扩大至W2(见图4B)。
图4B是已完成的倒装片封装的剖面图。如该图所示，在对底部填充物层14加压时，形成底部填充区19。底部填充区19连接半导体芯片18和印刷电路板13，而对焊料球16没有任何影响。即，用本发明互连结构，通过一步安装焊料球16，并用加压装置对底部填充物层14加压，这样有利于把半导体芯片18安装到印刷电路板上。
如上所述，根据本发明的互连结构，当把置于半导体芯片上的焊料球或金属凸出物安装到基片上时，同时进行底部填充，这样便可简化制造工艺，提高生产率。另外，在晶片处理中，在淀积底部填充物后对其加压，这样便可增加半导体芯片和印刷电路板间的层间结合力，同时可除去它们间的任何气泡，从而改善可靠性。

Claims (3)

1.一种在基片上安装半导体器件的互连结构，包括：
具有固定于其上的多个焊料球的半导体芯片；及
其中有相应的多个孔的底部填充物层。
2.根据权利要求1的结构，其特征在于：使形成的底部填充物层的高度低于焊料球的高度。
3.根据权利要求1的结构，其特征在于：使在底部填充物层中形成的多个孔的每一个相应于所说多个焊料球中的一个。
CN96109653A 1995-09-22 1996-09-11 用于将半导体器件安装到基片上的方法 Expired - Lifetime CN1072840C (zh)

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KR31431/1995 1995-09-22
KR1019950031431A KR0157899B1 (ko) 1995-09-22 1995-09-22 기판에 반도체 장치를 부착시키기 위한 연결구조
KR31431/95 1995-09-22

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US5883438A (en) 1999-03-16
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KR970018433A (ko) 1997-04-30
KR0157899B1 (ko) 1998-12-01

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