CN1207785C - 半导体器件、电子装置的制造方法、电子装置和携带式信息终端 - Google Patents

半导体器件、电子装置的制造方法、电子装置和携带式信息终端 Download PDF

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CN1207785C
CN1207785C CNB018005950A CN01800595A CN1207785C CN 1207785 C CN1207785 C CN 1207785C CN B018005950 A CNB018005950 A CN B018005950A CN 01800595 A CN01800595 A CN 01800595A CN 1207785 C CN1207785 C CN 1207785C
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circuit board
mentioned
base plate
semiconductor chip
electrode
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CN1365521A (zh
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滨口恒夫
利田贤二
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
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Abstract

低成本的半导体器件、电子装置的制造方法、电子装置和携带式信息终。其中半导体器件，包括在布线基板的一个面上具有规定高度的突起电极、比上述突起电极高度小的半导体芯片、在布线基板的另一个面上比上述半导体芯片的厚度大的电子部件，使得上述一个的面侧翘曲成凹状，因此确保刚性，并且，确保半导体芯片与安装基板的间隙。电子装置和携带式信息终端，按照在配置于壳体内的安装基板上介以具有规定高度的突起电极安装在布线基板双面具有逻辑LSI的上述半导体器件，使得上述布线基板的上述突起电极一侧翘曲成凹状，因此可确保刚性和间隙，即使受到外压力时逻辑LSI也无损。

Description

半导体器件、电子装置的制造方法、 电子装置和携带式信息终端
技术领域
本发明是关于一种高密度装配半导体芯片的半导体器件、装有该半导体器件的携带式信息终端等电子装置的制造方法、电子装置和携带式信息终端。
背景技术
在以移动电话等的携带式信息终端为代表的电子装置中，需要实现小型化，特别是薄型化。可以提出各种用于该小型化的半导体芯片的安装方法，然而其中将2个半导体芯片相对向，分别配置在布线板的背面和背面的办法也用过。至于这样的将半导体芯片安装于1个布线板的背面和背面的办法，主要有两种办法。
其中第1种办法是，在布线板与安装基板之间设置安装连接用的基板，介以该连接用的基板把布线板连接到安装基板上，现在已经使背面的半导体芯片不与安装基板接触就可以安装。
图11是用这种办法安装现有的电子装置的剖面图，例如，是特开平7-240496号公报中公开的现有电子装置的剖面图。如图11所示，安装基板108上装配有半导体器件构成电子装置。半导体器件已变成一个布线板103的背面和背面上分别安装半导体芯片101a、101b的构造。而且，布线基板103介以连接用基板106接合于安装基板108上同时电连接起来。就是，都用焊料凸点107实现布线基板103的电极104与连接用基板106的电极116之间的电连接和连接用基板106的电极116与安装基板108的电极109之间的电连接。在这里，设定半导体芯片101b的厚度比连接用基板106和焊料凸点107合计的厚度要薄，使其不妨碍连接安装基板。另外，布线基板103、第1、第2半导体芯片101a、101b，用电极102进行电连接。并且，布线基板103与第1、第2半导体芯片101a、101b，布线基板103与连接用基板106的连接部，用密封树脂105密封起来。
第2种办法是布线板的背面设置凹部，该凹部内以嵌入方式装配半导体芯片，用该办法，现在也已经使背面的半导体芯片不接触安装基板就可以安装。
图12是用这种办法安装现有的电子装置的剖面图，例如，是特开平10-79405号公报中公开的现有电子装置的剖面图。如图12所示，布线板的背面上设置凹部，在该凹部里以嵌入方式装配半导体芯片101b。因为往凹部里装配半导体芯片101b，所以能够达到焊料凸点107与安装基板的电极(图中省略)之间的连接不妨碍半导体芯片101b。另外，布线基板103与第1、第2半导体芯片101a、101b，用电极102电连接起来。并且，布线基板103与第1、第2半导体芯片101a、101b的连接部，用密封树脂105密封起来。
这样，用第1、第2种办法就可以在安装基板上装配布线基板，使背面的半导体芯片不与安装基板接触。
但是，在第1种办法中，不用高价的连接用基板的话，就往往会升高电子装置的制造成本。另外，通过连接用基板把布线基板和安装基板接合起来，因而夹着连接用基板的部分加变厚，存在难以达到薄型化的问题。
在第2种办法中，如果不在布线基板上形成凹部，往往因需要特别的步骤，即便本办法也就存在升高电子装置制造成本这样的问题。
并且，可以考虑，既采用连接用基板又不在布线基板上形成凹部，把双面安装半导体芯片的布线基板搭载于安装基板上，使半导体芯片101b的厚度减少到尽可能小。然而，这时由于半导体芯片101b的厚度减少，存在刚性降低、可靠性下降等问题。
进而，一般形成微细布线的布线基板，线膨胀系数比由此材料构成的安装基板要大，就布线基板和安装基板来说线膨胀系数不同。如果随着热处理把这种线膨胀系数不同的布线基板与安装基板焊接起来，回到室温时，由于布线基板的热收缩比安装基板大，所以如图13所示，布线基板103，在安装基板108一侧翘曲成凸状。随其布线基板103的背面安装的半导体芯片101b，在安装基板一侧也变成凸状翘曲。因此存在接触到安装基板108使半导体芯片101b破损的问题。
并且，半导体芯片101b与布线基板108的间隙如很小，安装时即使在半导体芯片101b不与安装基板108接触的情况下，由于产品使用时的外压力，要是安装基板108上发生弯曲或应力，同样，会使半导体芯片101b的表面接触安装基板108，存在使半导体芯片101b破损的问题。
发明内容
本发明就是为了解决上述这种现有问题而创造，其目的在于提供一种不会使电特性恶化，布线板的双面上配置半导体芯片的低成本半导体器件、电子装置的制造方法、电子装置和携带式信息终端。
本发明的半导体器件具备：表面和背面上具有电极的布线基板；上述布线基板的一个面上设置具有规定高度的突起电极；上述布线基板的上述一个面上设置与上述布线基板的电极电连接，厚度比上述突起电极的高度小的半导体芯片；以及上述布线基板的另一个面上设置使得上述布线基板的上述一个面侧凹状翘曲而且与上述布线基板的电极电连接的厚度比上述半导体芯片厚度大的电子部件。
这样的半导体器件，变成在布线基板设置突起电极(凸点)的一侧翘曲(在设置了突起电极的一侧可能有凹部)，将安装了半导体芯片的布线基板搭载于安装基板上时，半导体芯片不会接触安装基板，现在已经可以安装没有损伤半导体芯片。进而，不是又用连接用基板又在布线基板上形成凹部，因此可以便宜地制造半导体器件。
这样，设法使布线基板在设置突起电极的一侧翘曲，由于翘曲的大小和方向大体上由电子部件和布线基板决定，使电子部件的线膨胀系数比布线基板的线膨胀系数小就可以。并且，把电子部件的线膨胀系数值定为比半导体芯片的线膨胀系数值以下是令人满意的。
布线基板的翘曲当半导体芯片的纵横尺寸相同时，变成纵横同样的碗状翘曲，当尺寸不同时，在纵向和横向变成翘曲程度不同的碗状翘曲。该翘曲若过大，由于不可能由安装基板上设置的突起电极吸收，并且由于电子部件或半导体芯片的电特性恶化，因此设法使布线基板的翘曲，布线基板的中央部分与周边部分的高度差为100μm以下是令人满意的。并且，一定需要发生翘曲，因此布线基板的中央部分与周边部分的高度差为5μm～100μm以下是更加令人满意的，考虑到实际上的制造，就可以是10～40μm。
并且，电子部件也可以是一个半导体芯片，也可以是多个叠层多个的半导体芯片，而且，为了确实提高刚性，抑制电特性恶化，规定电子部件的厚度为0.3mm以上是理想的。另一方面如果过分加厚电子部分的厚度，作为半导体器件变厚就与薄型化背道而驰，因而规定为0.65mm是理想的。另外，为了进一步确实提高刚性，防止电特性恶化，也可以在平面尺寸大小内，把电子部件增大到比半导体芯片还要大。
并且，布线基板可以使用，例如印制电路板、通过给印制电路板表面涂覆环氧树脂形成微细布线层的基板、及由聚酰亚胺树脂和导体构成的树脂基板。
并且，有关本发明的另一种半导体器件具备：表面和背面上具有电极的布线基板；上述布线基板的一个面上设置具有规定高度的突起电极；上述布线基板的上述一个面上设置与上述布线基板的电极电连接，厚度比上述突起电极的高度要小的半导体芯片；以及上述布线基板的另一个面上设置与上述布线基板的电极电连接，厚度比上述半导体芯片厚度大而且线膨胀系数比上述布线基板的线膨胀系数要小的电子部件。
这样的半导体器件中，电子部件的线膨胀系数将比布线基板的线膨胀系数要小，因此安装基板已经在设置突起电极一侧翘曲，安装基板上搭载安装了半导体芯片的布线基板时，半导体芯片就不会接触到安装基板，现在已经可以无损伤地安装半导体芯片。进而，不必时而使用连接用基板时而为布线基板形成凹部，因此能够制造便宜的半导体器件。
并且，如上述说明过的那样，对布线基板，也可以采用树脂基板，规定电子部件的厚度为0.3mm以上是令人满意的。
有关本发明的电子装置的制造方法是在安装的一侧上设置突起电极和半导体芯片并通过上述突起电极将在与上述被安装一侧相反侧上设置电子部件的半导体器件安装到安装基板上制造电子装置的电子装置制造方法，就是上述半导体芯片的厚度比上述突起电极的高度要小，上述电子部件的厚度要比半导体芯片的厚度要大，并将上述安装的一侧凹状翘曲的半导体器件和上述安装基板定位，在上述半导体器件翘成凹状的状态下把上述半导体器件紧压于上述安装基板上，通过上述突起电极在上述安装基板上安装上述半导体器件。
这样的电子装置的制造方法中，设于布线基板上的突起电极高度与半导体芯片的厚度(高度)之差即使很小，在布线基板的安装基板一侧翘成凹状的状态下被安装于安装基板上，因此安装半导体芯片不会接触到安装基板，能够防止半导体芯片接触安装基板而受伤。
这样，只要设定电子部件的线膨胀系数比布线基板的线膨胀系数还要小，使其布线基板在设置突起电极一侧翘曲就行。这时，布线基板的线膨胀系数比电子部件的线膨胀系数要大，冷却时的收缩量布线基板方面将比电子部件增大。因此，布线基板与电子部件比较收缩更大，布线基板现在已经随着电子部件侧变成凸状的碗状翘曲。并且，作为电子部件的线膨胀系数值，在半导体芯片的线膨胀系数值以下的值是令人满意的。
本半导体器件用包括：将上述电子部件安装于上述布线基板上，一边加热一边把电子部件接合于布线基板上以后进行冷却，使其上述布线基板的被安装一侧翘成凹状的步骤；在上述布线基板的被安装的一侧上安装半导体芯片的步骤；以及在上述布线基板的被安装的一侧上形成突起电极的形成步骤的制造步骤进行制造也行。
并且，有关本发明的电子装置具备：安装基板；在上述安装基板上边介以具有规定高度的突起电极并被装配的表面和背面上具有电极的布线基板；设置于上述布线基板的安装基板侧面上，使其配置在上述安装基板与上述布线基板之间的空间而且使其与上述安装基板的电极电连接，厚度比上述突起电极的高度要小的半导体芯片；在与上述布线基板的安装基板侧相反一侧的面上设置厚度比上述布线基板的电极电连接的厚度比上述突起电极的高度要小的半导体芯片；以及在与上述布线基板的安装基板相反侧面上设置使其与上述布线基板的电极电连接，厚度比上述半导体芯片厚度要大而且线膨胀系数比上述布线基板的线膨胀系数要小的电子部件。
并且，有关本发明的携带式信息终端具备：壳体；配置于上述壳体内的安装基板；配置于上述安装基板上边的逻辑LSI芯片；在上述安装基板上边介以具有规定高度的突起电极装配的表面和背面上具有电极的布线基板；设置于上述布线基板的安装基板侧面上，使其配置在上述安装基板与上述布线基板之间的空间内而且与上述安装基板的电极电连接，厚度比上述突起电极的高度要小的存储器或逻辑LSI芯片；以及在与上述布线基板的安装基板相反侧面上设置使其与上述布线基板的电极电连接，厚度比上述半导体芯片厚度要大而且线膨胀系数比上述布线基板的线膨胀系数要小的电子部件。
这种电子装置、携带式信息终端中，存储器或逻辑LSI芯片等的半导体芯片并不接触安装基板，可按规定距离间隔配置，安装就不会使该半导体芯片受伤，因此可以提供一种小型化、重量轻优良的电子装置、携带式信息终端。
并且，如上述说过的那样，至于布线基板，采用树脂基板是令人满意的，作为电子部件的厚度，在0.3mm以上是令人满意的。
附图说明
图1表示本发明实施例1的半导体器件示意构成剖面图；
图2表示本发明实施例4的半导体器件示意构成剖面图；
图3表示本发明实施例5的半导体器件示意构成剖面图；
图4表示本发明实施例5的半导体器件示意构成剖面图；
图5表示本发明实施例5的半导体器件示意构成平面图；
图6A、6B、6C表示本发明实施例6的半导体器件制造方法的步骤图；
图6A表示电子部件装在布线基板表面的状态；
图6B表示半导体芯片装在布线基板背面的状态；
图6C突起电极在布线基板背面形成的状态；
图7A、7B、7C表示本发明实施例7的半导体器件制造方法的步骤图；
图7A是表示连接用导电部件在安装基板电极上形成后的状态；
图7B是表示半导体器件在安装基板上安装的状态；
图7C是表示安装基板加热后在室温冷却的状态；
图8表示本发明实施例8的携带式信息终端示意构成的立体图；
图9表示本发明实施例8的携带式信息终端示意构成的剖面图；
图10表示本发明实施例9的携带式信息终端示意构成的剖面图；
图11表示现有的半导体器件示意构成的剖面图；
图12表示现有的半导体器件示意构成的剖面图；
图13表示现有的半导体器件示意构成的剖面图；
具体实施方式
为了更详细地叙述本发明，按照附图对其进行说明。
实施例1
图1是表示本发明实施例1的半导体器件示意构成的剖面图，与其说实际不如说更强调显示翘曲。图1中，第1半导体芯片1a(电子部件)配置在布线基板了的表面，而第2半导体芯片1b布线基板了的背面上，并将设置于各个面上的连接电极2和布线基板3的电极4电连接起来。这些电极的连接部用密封树脂5覆盖保护起来。并且，布线基板3的背面上，形成用于电连接安装基板(图未示出)上电极的连接用突起电极的焊料凸点7。
在本实施例中，已经构成第2半导体芯片1b的厚度比焊料凸点7的高度要小，使其可以搭载于布线基板3的背面，即安装基板与布线基板之间。而且，第1半导体芯片1a要比第2半导体芯片1b的厚度大，将其构成能够确保作为半导体器件10的刚性。进而，将布线基板3构成为，使其搭载第2半导体芯片1b的背面一侧翘成凹状，第2半导体芯片1b不与安装基板接触。
例如，在厚度0.4mm左右的布线基板3上，连接厚度0.4mm左右的第1半导体芯片1a和厚度0.15mm左右的第2半导体芯片1b，并且，将焊料凸点7形成为0.3mm左右以下的高度(厚度)，作为其复合体的半导体器件10，不能不发生微小的弯曲，发生10μm的翘曲。由于该翘曲，而不会造成电特性的恶化。
改变第1半导体芯片1a和第2半导体芯片1b的厚度，可以控制上述翘曲。第2半导体芯片1b的厚度在第1半导体芯片1a厚度的约66％以下是令人满意的，并且从确保刚性的观点出发，50μm左右以上是令人满意的。
布线基板3的翘曲，在半导体芯片的纵横尺寸相同时，将成为纵横相同的碗状翘曲，尺寸不同时，将成为纵向和横向上翘曲程度不同的碗状翘曲。若该翘曲过大，则变得不能由安装基板上设置的焊料凸点7吸收，并且，第1半导体芯片1a或第2半导体芯片1b中的电特性恶化，因此布线基板3的翘曲，理想的是设法使其布线基板3的中央部与周边部高度之差为100μm以下的令人满意的。并且，需要发生一定翘曲，因而布线基板3的中央部与周边部高度之差为5μm～100μm左右是更理想的，考虑实际制造的话，可以认为10μm～40μm就行。
为了确实提高刚性，抑制电特性的恶化，第1半导体芯片1a的厚度规定为0.3mm以上是令人满意的。另一方面，如果过分加厚电子部分的厚度，作为半导体器件10变厚就与薄型化背道而弛，因此认为约0.65mm以下是令人满意的。
并且，布线基板上作为微小的弯曲，一旦出现微小压曲，搭载的半导体芯片的平面内应力的不均匀就发生，使电特性恶化，然而在本实施例中，不是局部的翘曲，而是使布线基板整体上翘曲，所以整体的翘曲发生的半导体芯片材料中，实际上发生的畸变或残余应力，若与上述周期性的微小压曲相比，限于非常小的值，不会使电特性恶化。
实施例2
图1中，把第1半导体芯片1a设为线膨胀系数3.5×10-6(1/℃)、厚度0.3mm以上的硅芯片，把布线基板3设定为线膨胀系数16×10-6(1/℃)、厚度0.6mm左右的印制电路板。保护电极连接部的树脂采用线膨胀系数为50×10-6(1/℃)左右大小的树脂、由于厚度小至0.03mm，对翘曲的大小或方向没有受到大的影响。所以，可以由第1半导体芯片1a和布线基板3决定翘曲的大小和方向，冷却时的收缩量大的布线基板3比第1半导体芯片1a要收缩得多，可使第2半导体芯片1b一侧形成凹状的翘曲。
在本实施例中，图1中的布线基板3中央部分与周边部分的高度差h为10μm左右。为了确保焊料凸点7和布线基板3的电极之间的连接，该高度差h为100μm以下是理想的。
进而，在本实施例中，如果对第1半导体芯片1a、第2半导体芯片1b的厚度和布线基板3的厚度作各种变化计算出翘曲量，要是第1半导体芯片1a的厚度变成不足0.3mm，刚性大大降低，因而翘曲就迅速增加。因此，把第1半导体芯片1a的厚度设定在0.3mm以上，使作为复合体的半导体器件10的刚性不会降低的令人满意的。
这样，把第1半导体芯片1a的厚度设定为0.3mm以上，之所以让第2半导体芯片1b比其更薄，是具有促进翘曲的发生，同时有抑制翘曲在一定范围内的这种作用。
实施例3
在图1中，把第1半导体芯片1a设为线膨胀系数3.5×10-6(1/℃)、厚度0.15mm左右的硅芯片，第2半导体芯片1b设为线膨胀系数5.7×10-6(1/℃)、厚度0.15mm左右的砷化镓(GaAs)芯片，把布线基板3设定为线膨胀系数16×10-6(1/℃)、厚度0.6mm左右的印制电路板。
在本实施例中，可以由第1半导体芯片1a和布线基板3决定翘曲的大小和方向，冷却时的收缩量大的第2半导体芯片1b比第1半导体芯片1a要收缩得多，可在第2半导体芯片1b一侧，使布线基板3翘曲成凹状。
实施例4
图2是表示本发明实施例4的半导体器件示意构成的剖面图，与其说实际不如说显示翘曲。图2中，第1半导体芯片1a(电子部件)配置在布线基板3的表面，而第2半导体芯片1b配置在布线基板3的背面上，设于各自面上的连接电极2和布线基板3的电极4电连接起来。这些电极的连接部用密封树脂5覆盖保护起来。并且，在布线基板3的背面上形成用于与安装基板(图未示出)的电极电连接的连接用突起电极的焊料凸点7。
在本实施例中，第1半导体芯片1a和第2半导体芯片1b其平面的大小不同。而且，连接大的一方作为第1半导体芯片1a，因而跟上述实施例1同样，可使布线基板3翘曲，并且，可以提高刚性，更进一步抑制微小压曲。
实施例5
图3是表示本发明实施例5的半导体器件示意构成的剖面图。图4是表示本发明实施例5的其它半导体器件示意构成的剖面图。图5是图4所示半导体器件的示意平面图。
在图3中，电子部件1a是由2个半导体芯片构成，构成这2个芯片的总厚度比起搭载于布线基板3相反面上的第2半导体芯片1b厚度要厚。进而，在布线基板3的背面上，形成用于与安装基板(图未示出)的电极电连接的连接用突起电极的焊料凸点7。
在本实施例中，构成第2半导体芯片1b的厚度比起焊料凸点7的高度来要小，现在已经可以搭载于布线基板背面，即安装基板与布线基板之间。并且要构成使其电子部件1a的厚度比起第2半导体芯片1b的厚度来要大，以便能够确保作为半导体器件的刚性。进而，将布线基板3构成，使其搭载第2半导体芯片1b的背面一侧翘曲成凹状，使得第2半导体芯片1b不与安装基板接触。
跟上述实施例1同样，由2个半导体芯片构成的电子部件1a厚度，在0.3mm以上是令人满意的。并且，第2半导体芯片1b的厚度，在电子部件1a厚度的约66％以下是令人满意的。
并且，2个芯片的搭载方法没有特别限定，例如，可用粘合剂粘贴2个半导体芯片，利用焊丝连接上侧半导体芯片的电极和布线基板3的电极。
在本实施例中，作为电子部件1a，示出搭载2个半导体芯片的例子，然而例如如图4所示，进而也可以搭载半导体芯片，由多个半导体芯片构成电子部件。多个半导体芯片的电极与布线基板的连接，例如如图5所示，可用焊丝进行连接，使连接布线彼此不接触。
实施例6
图6A、6B、6C是表示本发明实施例6的半导体器件制造方法的步骤图。在本实施例中，首先，如图6A所示，在布线基板3的电极4上定位电子部件1a的连接电极2，例如用倒装片焊接方法熔融连接连接电极2以后，为了提高连接可靠性用密封树脂5填充电子部件1a与布线基板3间的间隙。对于基板使用树脂构成的基板时，线膨胀系数为15～40×10-6(1/℃)左右，与硅、砷化镓等半导体构成的电子部件1a的3～6×10-6(1/℃)左右相比要大。因此，在加热状态下把电子部件1a连接到布线基板3上边之后，冷却到室温时，由于布线基板3收缩要比电子部件1a大，此时电子部件1a一侧翘曲成凸状。
其次，如图6B所示，在布线基板3另一个面的电极4上定位第2半导体芯片1b的连接电极2，同样处理，加热冷却并连接以后，为了提高连接可靠性，用密封树脂5填充第2半导体芯片1b与布线基板3间的间隙。在这里，第2半导体芯片1b比电子部件1a薄，弯曲布线基板3的力也小，所以布线基板3照样变成在电子部件1a一侧翘曲成凸状。
采用厚度0.3mm的电子部件1a和厚度0.15mm的第2半导体芯片1b的情况下，翘曲为10μm左右。
其次如图6C所示，在布线基板3的周边形成焊料凸点7。其形成方法，例如，在布线基板3的电极4上边配置焊料凸点7，加热使焊料熔融。也可以在布线基板3的电极4上印制膏体焊料，通过加热形成突起电极。例如，为了形成0.5mm焊料球间隔，可采用约0.3mm的焊料球。这时焊料凸点7高度约为0.23mm。因此，安装基板(图未示出)上安装焊料凸点7时，假若第2半导体芯片1b的厚度为0.15mm、用于布线基板3上连接第2半导体芯片1b的连接电极2高度为30μm、布线基板3上的电极4厚度为20μm、及布线基板3的翘曲为10μm，即便搭载于安装基板上时作为有10μm的翘曲复位，也能确保第2半导体芯片1b与安装基板的间隔约30μm。
经过确保该间隔，即使由于外部压力即半导体器件压紧到安装基板上，第2半导体芯片1b也不会接触安装基板。
这样，在使布线基板3翘曲的状态下，就可以制造半导体器件10。
另外，在本实施例中，作为在布线基板3上安装电子部件1a的方法，示出了倒装片焊接法的例子，然而更详细点说，在布线基板3上配置各向异性导电粘合薄膜(环氧树脂膜中含有导电粒子的薄膜)，其上压着加热的半导体芯片。上述各向异性导电粘合薄膜，例如由热硬化型环氧树脂粘合剂变成，因此边加热边在布线基板3上压着电子部件1a的期间使树脂硬化。
并且，也可以利用焊料的倒装片焊接法。焊料采用铅锡或银锡等合金，例如可以用蒸发、印制焊料膏、球焊法等形成。也可以使用金、铜等替换焊料。这时，就可以将导电性粘合剂或导电粒子介于连接电极2与布线基板3的电极4之间进行连接。也可以在连接电极2与布线基板3的电极4之间介以焊料进行连接。并且，也可以采用丝热压焊接法，替换倒装片焊接法。
并且，布线基板3例如印制电路板，使用聚酰亚胺等树脂材料。特别是，电子部件1a、第2半导体芯片1b的电极2间隔小(100μm以下)的情况下，印制电路板上不可能形成小间隔电极，因此可以采用在印制电路板的树脂层上，用电镀法等形成微细布线层的加高法基板。
实施例7
图7A、7B、7C是表示本发明实施例7的电子装置制造方法的步骤图。在本实施例中，首先，如图7A所示，在安装基板8的电极9上边配置连接用电极材料16。连接用电极材料16例如是溶剂中溶入微细的焊料粒子的乳油状物，并印刷配置。连接用电极材料16的高度取决于电极间隔，设定电极间隔为0.5mm时，高度为0.1mm左右。
图7B表示，使上述安装基板8上的电极9与半导体器件10的焊料凸点7定位以后，在安装基板8上边搭载半导体器件10的状态(未进行加热)。在这里，设定布线基板3的翘曲为100μm以内，已经可使半导体器件10的焊料凸点7充分接触连接用电极材料16。
图7C表示在约240℃下加热上述安装基板，让焊料熔化，降到室温的状态。对安装基板，例如采用所谓玻璃纤维的玻璃环氧树脂的话，上述安装基板由于线膨胀系数比由树脂材料或树脂材料比率高的复合材料构成的布线基板3要小，所以热收缩比布线基板小，按照图7B的状态缓和布线基板3的翘曲。
在本实施例中，从图7B的状态到图7C的状态，缓和的翘曲量约为10μm。因此，第2半导体芯片1b与安装基板8的间隔可保证有几十μm。
另外，在本实施例中，表示将连接用电极材料16的高度设为100μm的例子，但是电极9的间隔变得越小，不能变成使连接用电极材料16的高度过低，因此，为了确保第2半导体芯片1b与安装基板8的间隔，适当确定上述布线基板3的翘曲量就行。
把布线基板3的翘曲规定为100μm以下，然而10～40μm左右是令人满意的。
实施例8
图8是表示本发明实施例8的携带式信息终端示意构成的立体图，图9是表示本发明实施例8的携带式信息终端示意构成的剖面图，并示出安装基板的信号处理区。
图8作为携带式信息终端的例子表示移动电话的示意构成，移动电话21由壳体22、键头23、显示器24、天线25、搭载多个器件的安装基板8、及电池(图未示出)等构成。
图9表示配置于壳体内的安装基板8的信号处理区域。安装基板8上安装有进行携带式信息终端的基本信号处理的CPU功能的逻辑LSI11、存储器组件12、电阻、电容等的芯片元件20、及半导体器件10。半导体器件10由逻辑LSI(电子部件)1a、逻辑LSI(半导体芯片)1b、及布线基板3构成，并用焊料凸点7安装到安装基板8上。
上述逻辑LSI1a、逻辑LSI1b，如制成一并具有，例如要求大容量存储功能的图象信号处理功能和存储功能的逻辑LSI，则可以减小面积、薄型、降低成本就令人满意了。
在本实施例中，虽然示出分别安装逻辑LSI11、存储器组件12的例子，但是也可以利用布线基板进行双面安装。
实施例9
图10是表示本发明实施例9的携带式信息终端示意构成的剖面图，并示出安装基板的信号处理区域。
图中，配置于壳体22内的安装基板上安装有半导体器件10、电阻、电容等的芯片元件20。半导体器件10是由逻辑LSI(电子部件)1a、逻辑LSI(半导体芯片)1b、及布线基板3构成，并用焊料凸点7安装到安装基板8上。
上述逻辑LSI1a、逻辑LSI1b，一并具有进行携带式信息终端的基本信号处理的CPU功能和图象信号处理等附加功能及存储功能。
在本实施例中，示出了由2个逻辑LSI构成半导体器件10的例子，然而也可以由多个半导体芯片构成，其中一部分也可以不含有逻辑功能。
本实施例和上述实施例8的半导体器件10可以是上述实施例1～6中任何一种构成，或按照上述实施例7的制造方法进行制造，因而能够构成安装密度高，而且薄、成本低。
并且，在布线基板3的两侧安装逻辑LSI，因而与仅在单侧安装的情况相比可以缓和布线基板3的翘曲，而且改变逻辑LSI1a和逻辑LSI1b的厚度或线膨胀系数，保持适度翘曲，因此也不会发生逻辑LSI1b与安装基板8的接触。特别是，在携带式信息终端当中，使用时对安装基板加上弯曲、扭曲等的外部压力并弄弯，因此规定逻辑LSI1b与安装基板8表面的间隔为30μm左右。
如以上的那样，本发明的半导体器件、电子装置的制造方法、电子装置和携带式信息终端适用于需要高密度安装半导体芯片的半导体器件、携带式信息终端等电子装置及其制造。

Claims (14)

1.一种半导体器件，包括：在表面和背面上具有电极的布线基板；上述布线基板的一个面上设置有规定高度的突起电极；上述布线基板的上述一个面上设置厚度比上述突起电极的高度小的半导体芯片，使其与上述布线基板的电极电连接；以及在上述布线基板的另一个面上设置厚度比上述半导体芯片厚度大的电子部件，使上述布线基板的上述一个面侧翘曲成凹状而且使上述电子部件与上述布线基板的电极电连接。
2.根据权利要求1所述的半导体器件，其特征是电子部件的线膨胀系数比布线基板的线膨胀系数小。
3.根据权利要求1所述的半导体器件，其特征是电子部件的线膨胀系数值是在半导体芯片的线膨胀系数值以下。
4.根据权利要求1所述的半导体器件，其特征是所述翘曲是碗状的翘曲，布线基板的中央部分与周边部分的高度差在100μm以下。
5.根据权利要求1所述的半导体器件，其特征是电子部件是层叠多个半导体芯片的叠层。
6.根据权利要求1所述的半导体器件，其特征是电子部件的厚度在0.3mm以上。
7.根据权利要求1所述的半导体器件，其特征是在平面的大小内，电子部件比半导体芯片大。
8.根据权利要求1所述的半导体器件，其特征是布线基板是树脂基板。
9.一种电子装置的制造方法，用于将在被安装的一侧上设置突起电极和半导体芯片、在与上述被安装的一侧相反侧上设置电子部件的半导体器件，通过上述突起电极安装到安装基板上来制造电子装置，其特征是，
上述半导体芯片的厚度比上述突起电极的高度小，上述电子部件的厚度比半导体芯片的厚度大，并使上述被安装的一侧翘曲成凹状的半导体器件和上述安装基板定位，在上述半导体器件翘曲的状态下把上述半导体器件紧压于上述安装基板上，通过上述突起电极，上述半导体器件安装到上述安装基板上。
10.根据权利要求9所述电子装置的制造方法，其特征是半导体器件是用包括如下制造步骤而制造的：
将上述电子部件安装于上述布线基板上的步骤，一边加热一边把电子部件接合于布线基板上，其后进行冷却，使上述布线基板的被安装一侧翘曲成凹状；
在上述布线基板的被安装的一侧上安装半导体芯片的步骤；以及
在上述布线基板的被安装一侧上形成突起电极的步骤。
11.一种电子装置包括：安装基板；在上述安装基板上介以具有规定高度的突起电极而装配上的表面和背面上具有电极的布线基板；设置于上述布线基板的安装基板侧的面上、与上述布线基板的电极电连接、厚度比上述突起电极的高度小的半导体芯片；以及在与上述布线基板的安装基板侧相反侧的面上设置、与上述布线基板的电极电连接、厚度比上述半导体芯片厚度大而且线膨胀系数比上述布线基板的线膨胀系数小的电子部件。
12.根据权利要求11所述的电子装置，其特征是布线基板是树脂基板。
13.根据权利要求11所述的电子装置，其特征是电子部件的厚度是0.3mm以上。
14.一种携带式信息终端，包括：壳体；配置于上述壳体内的安装基板；配置于上述安装基板上的逻辑LSI芯片；在上述安装基板上介以具有规定高度的突起电极而安装的表面和背面上具有电极的布线基板；设置于上述布线基板的安装基板侧的面上、与上述布线基板的电极电连接、厚度比上述突起电极的高度小的存储器或逻辑LSI芯片；以及在与上述布线基板的安装基板侧相反侧的面上设置、与上述布线基板的电极电连接、厚度比上述半导体芯片厚度大而且线膨胀系数比上述布线基板的线膨胀系数小的电子部件。
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EP1189282A4 (en) 2006-02-15
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US6905911B2 (en) 2005-06-14
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US20020158324A1 (en) 2002-10-31
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