DE10193104T1 - Verfahren und Vorrichtung zum Codieren mit ungleichem Schutz in magnetischen Aufzeichnungskanälen mit verketteten Fehlerkorrekturcodes - Google Patents

Verfahren und Vorrichtung zum Codieren mit ungleichem Schutz in magnetischen Aufzeichnungskanälen mit verketteten Fehlerkorrekturcodes

Info

Publication number
DE10193104T1
DE10193104T1 DE10193104T DE10193104T DE10193104T1 DE 10193104 T1 DE10193104 T1 DE 10193104T1 DE 10193104 T DE10193104 T DE 10193104T DE 10193104 T DE10193104 T DE 10193104T DE 10193104 T1 DE10193104 T1 DE 10193104T1
Authority
DE
Germany
Prior art keywords
coding
error correction
magnetic recording
correction codes
recording channels
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE10193104T
Other languages
English (en)
Inventor
Bernardo Rub
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seagate Technology LLC
Original Assignee
Seagate Technology LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seagate Technology LLC filed Critical Seagate Technology LLC
Publication of DE10193104T1 publication Critical patent/DE10193104T1/de
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/12—Formatting, e.g. arrangement of data block or words on the record carriers
    • G11B20/1217—Formatting, e.g. arrangement of data block or words on the record carriers on discs
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
    • G11B20/1426—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
    • G11B20/1833—Error detection or correction; Testing, e.g. of drop-outs by adding special lists or symbols to the coded information
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/1515—Reed-Solomon codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2903—Methods and arrangements specifically for encoding, e.g. parallel encoding of a plurality of constituent codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/35—Unequal or adaptive error protection, e.g. by providing a different level of protection according to significance of source information or by adapting the coding according to the change of transmission channel characteristics
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/12—Formatting, e.g. arrangement of data block or words on the record carriers
    • G11B20/1217—Formatting, e.g. arrangement of data block or words on the record carriers on discs
    • G11B2020/1218—Formatting, e.g. arrangement of data block or words on the record carriers on discs wherein the formatting concerns a specific area of the disc
    • G11B2020/1222—ECC block, i.e. a block of error correction encoded symbols which includes all parity data needed for decoding
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
    • G11B20/1833—Error detection or correction; Testing, e.g. of drop-outs by adding special lists or symbols to the coded information
    • G11B2020/1836—Error detection or correction; Testing, e.g. of drop-outs by adding special lists or symbols to the coded information using a Reed Solomon [RS] code
DE10193104T 2000-06-27 2001-06-26 Verfahren und Vorrichtung zum Codieren mit ungleichem Schutz in magnetischen Aufzeichnungskanälen mit verketteten Fehlerkorrekturcodes Ceased DE10193104T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US21469900P 2000-06-27 2000-06-27
PCT/US2001/020311 WO2002001561A2 (en) 2000-06-27 2001-06-26 Method and apparatus for encoding with unequal protection in magnetic recording channels having concatenated error correction codes

Publications (1)

Publication Number Publication Date
DE10193104T1 true DE10193104T1 (de) 2003-03-13

Family

ID=22800094

Family Applications (1)

Application Number Title Priority Date Filing Date
DE10193104T Ceased DE10193104T1 (de) 2000-06-27 2001-06-26 Verfahren und Vorrichtung zum Codieren mit ungleichem Schutz in magnetischen Aufzeichnungskanälen mit verketteten Fehlerkorrekturcodes

Country Status (7)

Country Link
US (1) US6804805B2 (de)
JP (1) JP2004502264A (de)
KR (1) KR20020025239A (de)
CN (1) CN1383617A (de)
DE (1) DE10193104T1 (de)
GB (1) GB2371960A (de)
WO (1) WO2002001561A2 (de)

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Also Published As

Publication number Publication date
US20010056561A1 (en) 2001-12-27
GB2371960A (en) 2002-08-07
KR20020025239A (ko) 2002-04-03
WO2002001561A2 (en) 2002-01-03
JP2004502264A (ja) 2004-01-22
US6804805B2 (en) 2004-10-12
WO2002001561A3 (en) 2002-05-23
CN1383617A (zh) 2002-12-04
GB0204744D0 (en) 2002-04-17

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