DE102004033761A1 - Device and method for data exchange on several bus systems - Google Patents

Abstract

The The invention relates to a device for data exchange on at least two data bus systems (2.1, 2.2, 2.3), with at least one control unit (8.1, 8.2, 8.3) for processing interface-related functions, and an associated one Method. At least according to the invention two control units (8.1, 8.2, 8.3) present as reconfigurable Hardware units executed and the interface-related functions for data exchange on the at least two data bus systems (2.1, 2.2, 2.3) in parallel work with the interface-related functions message routing functions and / or signal routing functions and / or signal extraction functions and / or protocol conversion functions and / or network management functions and / or Include diagnostic functions and / or function management functions. Alternatively, for Each existing bus system may be provided in each case one control unit.

Description

The The invention relates to a device for data exchange on at least two bus systems according to the preamble of claim 1 and a related one Method.

today Control devices, especially for vehicles, include microcontrollers, which in addition to the primary control functions and the gateway functionality the controller, i.e. the interface-related functions used to exchange Data needed will execute. That's why usually the computing power of the microcontroller loaded by occurring interrupts, since the microcontroller the Interrupt Actions and all subsequent functionalities usually sequential work off.

In the DE 197 50 662 C2 A processor unit for a data-processing-based electronic control system in a motor vehicle is described. The processor unit includes in its functional structure a scalable arithmetic unit, a vehicle communication interface unit with at least two communication interfaces and a communication co-processor as a separate structural component.

Of the Communication co-processor is between the scalable processing unit and the vehicle communication interface unit is switched and is used for execution of data communications between the scalable computing unit and the vehicle communication interface unit as well as directly between communication interfaces of the vehicle communication interface unit among themselves.

In the DE 102 18 448 A1 an electronic control unit, in particular for a motor vehicle is described, comprising a housing, a power supply and terminal contacts. In the control unit, a gateway for data exchange between different data networks is integrated. The gateway is used with a common use of the power supply and the connection contacts in the housing of the control unit, wherein the gateway and the control unit each comprise separate microprocessors and memory modules.

In the DE 101 39 610 A1 a universal computer architecture for a transport with a microprocessor for the execution of control programs is described. The computer architecture comprises memory means for the data calculated thereby and an interface which allows a connection of the computer to a data bus in the transport, wherein the computer has control programs for controlling devices intended in the transport and the control commands are transmitted via device interfaces to the device to be controlled, wherein the computer has a reconfigurable hardware that allows a nightly reconfiguration of peripheral components or an interface in the installed state of the computer.

moreover are transmission means provided an algorithm for reconfiguring the hardware transferred to the storage means in the transport, so that a process for reconfiguring the peripheral components or the interface relevant hardware feasible is.

task The invention is a device for data exchange on various Bus systems available to provide an associated Relieves microcontroller and an associated method for data exchange specify.

The Invention solves this task by providing a device for data exchange at least two bus systems with the features of claims 1 or 3 and by a method for data exchange on at least two bus systems with the features of claims 10 or 11.

advantageous embodiments and further developments of the invention are specified in the dependent claims.

According to the invention are at the device for data exchange at least two control units implemented as reconfigurable hardware units, which interface-related Functions for data exchange on at least two data bus systems work in parallel, with the interface-related functions Message routing functions and / or signal routing functions and / or Signal extraction functions and / or protocol conversion functions and / or network management functions and / or diagnostic functions and / or feature management functions.

In an alternative embodiment of the device for exchanging data on at least two data bus systems, a plurality of control units are configured as reconfigurable hardware units and execute interface-related functions for data exchange on at least two data bus systems in parallel, the number of the control units corresponding to the number of data bus systems exchanging data with each other and the interface-related functions Embassy routing functions and / or signal routing functions and / or signal extraction functions and / or protocol conversion functions and / or network management functions and / or diagnostic functions and / or function management functions.

The Embodiments of the invention Device for data exchange allow in an advantageous manner a parallel processing of the interface-related functions, hereinafter also referred to as gateway functions or gateway functionality are, i. the invention takes over the complete Gateway functionality and works in parallel. This relieves the load on the microcontroller and the parallel processing of the gateway functionality ensures for a much better performance.

By execution as a reconfigurable hardware unit, the device can also during the Running time, i. while completely new be configured to, for example, new hardware and / or Software components to be adapted.

There the complete Scope of the interface-related functions in the device according to the invention is realized is a "state alone operation "the Device possible.

moreover can by the parallel processing of the gateway functionality in an advantageous Any number of bus systems to the device according to the invention be connected.

at an insert in a control unit becomes the associated one Microcontroller by the device of the invention completely from frees the interface interrupt load.

In Embodiment is the device according to the invention as an FPGA (Field Programmable gate array), where the control units are on a common FPGA or separate can be arranged on at least two FPGAs. Such FPGAs have Memory cells, such as flip-flops, continue their function even after can change the production. These Memory cells are freely configurable with each other, with electrical conductive connections are reconnected, so that various logic circuits can be built thereby.

In In another embodiment, the device according to the invention comprises at least one Routing memory is assigned to at least one bus system and in the information about the interface-related functions of the associated bus system are stored by the at least one control unit for Processing of interface-related functions. Storing the gateway functionality in a memory ensures that that the configuration of the device can also be changed at runtime.

In Another embodiment is at least one configuration memory provided that includes configuration data for bus control circuits, each associated with one of the bus systems.

to Adaptation to different bus systems comprises the device according to the invention For example, at least one bus management unit, each a configuration unit and an Rx / Tx handler.

At the device for data exchange, for example, the bus systems CAN and / or LIN and / or FLEXRAY and / or MOST and / or FIREWIRE and / or RS232 and / or USB and / or S-ATA.

At the inventive method for data exchange on at least two data bus systems is a first message on a first bus system and a second message received simultaneously on a second bus system. Subsequently, will the first message to a first control unit and the second message passed to a second control unit. The respective control unit loads from an associated first or second routing memory to the first message or belonging to the second message Interface functionality and works off the information. After that, the first control unit passes the first message to the second bus system, according to the stored information from the first routing memory), and the second control unit passes the second message to the first bus system, according to the second routing memory stored information.

A advantageous embodiment The invention is illustrated in the drawings and will become apparent below described.

there demonstrate:

1 a block diagram of a device for data exchange on multiple bus systems,

2 a block diagram of a bus management unit of the device 1 .

3 a block diagram of a control unit of the device 1 , and

4 a block diagram of a Routingspei chers of the device 1 ,

1 shows a device 1 for reconfigurable data exchange on different bus systems 2.1 . 2.2 . 2.3 which can be implemented in an ASIC, System On Chip (SOC), or any reconfigurable hardware, preferably in a Field Programmable Gate Array (FPGA), because this module provides internally integrated memory resources, which are directly due to the design of the device can be used.

The device 1 forms a reconfigurable gateway between different bus systems 2.1 . 2.2 and 2.3 that is, the device performs interface-related functions in parallel, such as message routing functions and / or signal routing functions and / or signal extraction functions and / or protocol conversion functions and / or network management functions and / or diagnostic functions and / or function management functions. At the in 1 illustrated embodiment is for each data bus system 2.1 . 2.2 . 2.3 a corresponding control unit 8.1 . 8.2 and 8.3 present, ie the number of control units 8.1 . 8.2 . 8.3 corresponds to the number of data bus systems 2.1 . 2.2 . 2.3 who exchange data with each other. These bus systems 2.1 . 2.2 . 2.3 may be in a motor vehicle or in any electronically networked systems. The device 1 can be used in any electronic system where the communication between different or several similar bus systems 2.1 . 2.2 . 2.3 must be guaranteed. That means it can be from a bus system 2.1 . 2.2 . 2.3 multiple buses or only one connected. Each bus system has a special physical layer. Physical layers can be: CAN, LIN, FLEXRAY, MOST, FIREWIRE, RS232, K-Line, USB, S-ATA. The device 1 can thus connect between any bus system 2.1 . 2.2 . 2.3 realize.

Due to the special construction, the device can 1 to change their functionality at runtime. This is possible because the complete functionality is stored in routing 9.1 . 9.2 . 9.3 and in configuration stores 7.1 . 7.2 . 7.3 is stored, ie the gateway functionality is completely configurable by the memory contents of these memory cells and changeable at runtime. Each of the routing stores 9.1 . 9.2 . 9.3 includes, for example, the complete information of the gateway functionality of a bus system 2.1 . 2.2 . 2.3 , Every bus system 2.1 . 2.2 . 2.3 that is connected to the device is a routing memory 9.1 . 9.2 . 9.3 assigned. This split ensures parallel processing and simplifies the creation of configuration files for the gateway functionality. The received identification of one of the bus system 2.1 . 2.2 . 2.3 is sent directly to the address lines 9A1 . 9B1 . 9C1 of the respective routing memory 9.1 . 9.2 . 9.3 placed. At the appropriate location 9A . 9B . 9C , in the routing memory 9.1 . 9.2 . 9.3 is the coded information what to do with the received message. The control unit 8.1 . 8.2 . 8.3 decodes the information and executes the corresponding function or action.

If a message comes from one of the bus systems 2.1 . 2.2 . 2.3 via a bus transceiver assigned to the respective bus system 3.1 . 3.2 . 3.3 to the device 1 , then this is from a bus controller assigned to the respective bus system 5.1 . 5.2 . 5.3 read in and cached. The corresponding bus controller 5.1 . 5.2 . 5.3 signals one to the corresponding bus system 2.1 . 2.2 . 2.3 belonging bus management unit 6.1 . 6.2 . 6.3 that a new message is available. The respective bus management unit 6.1 . 6.2 . 6.3 includes, how out 2 it can be seen, a configuration unit 6A and a Rx / Tx handler 6B , The Rx / Tx handler retrieves the message and transmits it to a respective bus system 2.1 . 2.2 . 2.3 associated control unit 8.1 . 8.2 . 8.3 , which based on the in the associated routing memory 9.1 . 9.2 . 9.3 stored information executes the corresponding functionality and executes.

The corresponding bus transceiver 3.1 . 3.2 . 3.2 is serial or parallel with the associated bus controller 5.1 . 5.2 . 5.3 connected and converts the on the bus 2 . 1 . 2.2 . 2.3 message in a digital signal and sends this message serially or in parallel to the respective bus controller 5.1 . 5.2 . 5.3 ,

The respective bus controller 5.1 . 5.2 . 5.3 negotiates the bus protocol for receiving and sending messages. It receives the messages or data from the respective bus system 2.1 . 2.2 . 2.3 , stores these messages in an internal memory and signals the associated bus management unit 6.1 . 6.2 . 6.3 that a new message has been received and ready for pickup. Is the corresponding bus controller 5.1 . 5.2 . 5.3 via the associated bus management unit 6.1 . 6.2 . 6.3 from one of the control units 8.1 . 8.2 . 8.3 transmit a message to be sent, then the bus controller stores this message in an internal memory between, until the respective bus system 2.1 . 2.2 . 2.3 is free to transmit this message. In addition, the bus controller includes 5.1 . 5.2 . 5.3 various configuration registers to reset the respective bus system after a reset 2.1 . 2.2 . 2.3 to reinitialize. The required configuration data is received by the respective bus controller 5.1 . 5.2 . 5.3 after resetting via the configuration unit 6A from the associated Busma management unit 6.1 . 6.2 . 6.3 which retrieves the data from the associated configuration memory 7.1 . 7.2 . 7.3 reads. This not only functionality of the device 1 about the routing memory 9.1 . 9.2 . 9.3 , but also the configuration of the individual bus systems 2.1 . 2.2 . 2.3 via the configuration memory 7.1 . 7.2 . 7.3 freely configurable.

The respective bus management unit 6.1 . 6.2 . 6.3 includes like out 2 it can be seen, the configuration unit 6A and the Rx / Tx handler 6B for the respective bus controller 5.1 . 5.2 . 5.3 , The configuration unit 6A the respective bus management unit 6.1 . 6.2 . 6.3 writes the configuration data for the respective bus system after a reset process 2.1 . 2.2 . 2.3 , which in the associated configuration memory 7.1 . 7.2 . 7.3 are stored in the associated bus controller 5.1 . 5.2 . 5.3 and start the corresponding bus system 2.1 . 2.2 . 2.3 , The Rx / Tx handler 6B the respective bus management unit 6.1 . 6.2 . 6.3 makes sure of the bus controllers 5.1 . 5.2 . 5.3 received messages to the appropriate control units 8.1 . 8.2 . 8.3 be forwarded and from one of the control units 8.1 . 8.2 . 8.3 Data to be sent to the respective bus controller 5.1 . 5.2 . 5.3 be transmitted. Owns the from the bus controller 5.1 . 5.2 . 5.3 received message no identification (ID), for example, if the corresponding bus system does not use a message-oriented transmission method, but, for example, a Time Division Multiplexing (TDM) method, then adds the Rx / Tx handler 6B the received message additionally with a for the corresponding control unit 8.1 . 8.2 . 8.3 recognizable identification. When sending a TDM message, the Rx / Tx handler detects 6B the respective bus management unit 6.1 . 6.2 . 6.3 based on one of the appropriate control unit 8.1 . 8.2 . 8.3 transmitted identification in which time slot the message to be sent must be inserted and gives this information to the relevant bus controller 5.1 . 5.2 . 5.3 further. Thus, depending on the bus system, the Rx / Tx handler 6B also be provided with an internal memory for storing the messages to be sent and / or a time slot in the TDM method.

For parallel processing, each of the bus management units includes 6.1 . 6.2 . 6.3 its own Rx / Tx handler 6B for example, in the module 6 is integrated and managed the messages received and to be sent and in each case to the bus controller 5.1 . 5.2 . 5.3 or to the control units 8.1 . 8.2 . 8.3 forwards. Due to the parallel processing of the individual bus systems 2.1 . 2.2 . 2.3 creates a considerable increase in performance. The respective control unit 8.1 . 8.2 . 8.3 then processes the received messages. Due to the parallel processing, any number of bus systems can be connected to the device 1 be connected.

The control units 8.1 . 8.2 . 8.3 are responsible for the complete workflow functionality and include, as outlined in the 3 shown blocks, each a message routing function 8A , a signal routing function 8B , a signal extraction function 8C , a protocol conversion function 8D , a network management feature 8E , a diagnostic function 8F and a function management function 8G ,

The message routing function 8A directs one of one of the bus systems 2.1 . 2.2 . 2.3 received message without changing the information content to another of the bus systems 2.1 . 2.2 . 2.3 or on an interface 10 the device on.

The signal routing function 8B extracts individual information (bits) from a received message and inserts it into a newly generated message. This new message is then sent to the desired one of the bus systems 2.1 . 2.2 . 2.3 or to the interface 10 transfer.

The signal extraction function 8C extracted from a received message individual information (bits) transmits them to the interface for further processing 10 ,

The protocol conversion function 8D ensures communication between bus systems 2.1 . 2.2 . 2.3 with different protocols. It ensures the compatibility of the different bus systems 2.1 . 2.2 . 2.3 , The protocol conversion function 8d In addition to adapting the protocols of the different bus systems, it can take on additional tasks from the Rx / Tx handler 6B can not be accepted, for example, the caching of messages for bus systems 2.1 . 2.2 . 2.3 with different transfer rates.

The network management function 8E undertakes special tasks, especially in a motor vehicle, as described, for example, in the OSEK / VDX Network Management Specification known to the person skilled in the art.

The diagnostic function 8F manages bus-specific diagnostic messages and carries out various actions depending on the stored functionality.

The function management function 8G coordinates, for example, the interplay of the individual functionalities of the corresponding control unit 8.1 . 8.2 8.3 , The function management function 8G activated, for example, in the message routing, signal routing and / or diagnostic function 8A . 8B . 8F between bus systems with different transmission methods automatically the protocol wall distribution function 8D , Furthermore, the function management function coordinates 8G the communication between the respective control unit 8.1 . 8.2 . 8.3 and the interface 10 , The function management function coordinates the possible reconfiguration of the memory at runtime 7 and or 9 , whereby during operation the functionality of the device 1 regarding message routing 8A , Signal routing 8B , Signal extraction 8C and diagnosis 8F as well as the configuration of the bus systems 2.1 . 2.2 . 2.3 can be changed.

The respective control unit 8.1 . 8.2 . 8.3 get the from the corresponding Rx / Tx handler 6B received message and identifies this based on the contained identification. With the identification, the respective control unit 8.1 . 8.2 . 8.3 parallel to the functionality associated with the message from the associated routing memory 9.1 . 9.2 . 9.3 read. Because of the corresponding routing memory 9.1 . 9.2 . 9.3 The control unit executes the functionality that was read out 8.1 . 8.2 . 8.3 the appropriate functions such as message routing 8A , Signal routing 8B , Signal extraction 8C , Network Management 8E and / or diagnosis 8F with a possible protocol conversion 8D out.

the interface 10 the device 1 Connects to the external peripherals 11 or to other functional units 12 which are in the same reconfigurable hardware, ASIC or SOC. About the external periphery 11 or via other functional units 12 The gateway functionality can be changed during initialization or at runtime. Furthermore, the interface is used for data exchange of different bus systems 2.1 . 2.2 . 2.3 , with further functional units 12 , In this data exchange, complete messages or only individual signal information can be exchanged. the interface 10 is usually adjusted to the connected internal or external functional units individually. The exchange of information of the interface with other modules, for example in the form of shared memory -zB a dual port RAM (when connecting an external microcontroller) or via a bus bridge.

In the following, using an example for message routing, the parallel processing of gateway functionalities of the device will be described 1 described. On the bus systems 2.1 and 2.2 will be simultaneously messages with the bus transceivers 3.1 . 3.2 receive. These messages are from the two bus transceivers 3.1 . 3.2 to the respective bus controller 5.1 . 5.2 the device 1 forwarded. The bus controller 5.1 . 5.2 Store these messages in each case in an internal memory and signal to the respective bus system 2.1 . 2.2 belonging bus management unit 6.1 . 6.2 that a new message has been received and ready to be picked up. The respective Rx / Tx handlers 6A in the bus management units 6.1 . 6.2 pick up these messages and hand them over. these to the respective bus system 2.1 . 2.2 associated control unit 8.1 . 8.2 , The respective control unit 8.1 . 8.2 checks on the basis of the received message embassy identification to be executed gateway functionality, which in the respective bus system 2.1 . 2.2 associated memory cell 9A . 9B . 9C of the routing memory 9.1 . 9.2 stands. Because of in the routing memory cell 9A . 9B . 9C deposited coded information to the "message routing function", passes the control unit 8.1 . 8.2 the respective message to the respective target bus system 2.1 . 2.2 . 2.3 belonging Rx / Tx handler 6B , The Rx / Tx handler 6B of the target bus system 2.1 . 2.2 . 2.3 sends the corresponding message to the associated bus controller 5.1 . 5.2 . 5.3 of the target bus system 2.1 . 2.2 . 2.3 , The associated bus controller 5.1 . 5.2 . 5.3 stores the corresponding message in an internal memory until the respective bus system 2.1 . 2.2 . 2.3 is free to get this message across the respective bus transceiver 3.1 . 3.2 . 3.3 to send.

The inventive device for data exchange on at least two data bus systems at least one control unit designed as a reconfigurable hardware unit for parallel processing of interface-related functions, such as message routing functions and / or signal routing functions and / or signal extraction functions and / or protocol conversion functions and / or Network management functions and / or diagnostic functions and / or Function management functions, which enhance the performance of a associated Microcontroller, in particular in control units in a motor vehicle elevated becomes. To ensure the parallel processing corresponds to a alternative embodiment the number of control units of the number of data bus systems over the inventive device exchange data with each other.

Claims (11)

Device for data exchange with at least two data bus systems ( 2.1 . 2.2 . 2.3 ), which is a gateway ( 8.1 . 8.2 . 8.3 ) for processing interface-related functions, the gateway implementing message routing functions from one to the other data bus system ( 2.1 . 2.2 . 2.3 ), and vice versa, characterized in that the gateway comprises at least two control units ( 8.1 . 8.2 . 8.3 ) having the interface-related functions for data exchange on the at least two data bus systems ( 2.1 . 2.2 . 2.3 ) work in parallel. Device for data exchange according to claim 1, characterized in that the number the control units ( 8.1 . 8.2 . 8.3 ) the number of data bus systems ( 2.1 . 2.2 . 2.3 ) corresponds. Device for data exchange with at least two data bus systems ( 2.1 . 2.2 . 2.3 ), which is a gateway ( 8.1 . 8.2 . 8.3 ) for processing interface-related functions, the gateway implementing message routing functions from one to the other data bus system ( 2.1 . 2.2 . 2.3 ), and vice versa, characterized in that the gateway comprises at least one control unit ( 8.1 . 8.2 . 8.3 ) as reconfigurable hardware units that perform the interface-related functions for data exchange on the at least two data bus systems ( 2.1 . 2.2 . 2.3 ). Device according to claim 1 or 3, characterized that the interface-related functions message routing functions and / or signal routing functions and / or signal extraction functions and / or protocol conversion functions and / or network management functions and / or diagnostic functions and / or function management functions include. Device according to claim 1 or 3, characterized in that the device ( 1 ) is implemented as FPGA (Field Programmable Gate Array), whereby the control units ( 8.1 . 8.2 . 8.3 ) are arranged on a common FPGA or are arranged separately on at least two FPGAs. Device according to one of claims 1 to 5, characterized by at least one routing memory ( 9.1 . 9.2 . 9.3 ), the at least one bus system ( 2.1 . 2.2 . 2.3 ) and in which information about the interface-related functions of the assigned bus system ( 2.1 . 2.2 . 2.3 ) stored by the at least one control unit ( 8.1 . 8.2 . 8.3 ) for processing the interface-related functions Device according to one of claims 1 to 6, characterized by at least one configuration memory ( 7.1 . 7.2 . 7.3 ), the configuration data for bus control circuits ( 5.1 . 5.2 . 5.3 ), each one of the bus systems ( 2.1 . 2.2 . 2.3 ) assigned. Device according to one of Claims 1 to 7, characterized by at least one bus management unit ( 6.1 . 6.2 . 6.3 ), each comprising a configuration unit and an Rx / Tx handler. Device according to one of claims 1 to 8, characterized in that the bus systems ( 2.1 . 2.2 . 2.3 ) comprise a CAN and / or LIN and / or FLEXRAY and / or MOST and / or FIREWIRE and / or K-LINE and / or RS232 and / or USB and / or S-ATA. Method for data exchange on at least two data bus systems ( 2.1 . 2.2 ), in particular for a device ( 1 ) according to any one of claims 1 to 7, characterized by the steps of: simultaneously receiving a first message from a first bus system ( 2.1 ) and a second message from a second bus system ( 2.2 ), Transfer of the first message to a first control unit ( 8.1 ) and the second message to a second control unit ( 8.2 ), Load the interface functionality belonging to the first message from a first routing memory ( 9.1 ) into the first control unit ( 8.1 ) and the interface functionality belonging to the second message from the second routing memory ( 9.2 ) into the second control unit ( 8.2 ), Transfer of the first message to the second bus system ( 2.2 ), according to the stored information from the first routing memory ( 9.1 ), and the second message to the first bus system ( 2.1 ), according to the second routing memory ( 9.2 ) stored information. Method for data exchange on N data bus systems, in particular for a device according to one of Claims 1 to 7, characterized by the steps of: simultaneously receiving an N from the bus systems ( 2.1 . 2.2 . 2.3 ), each bus system ( 2.1 . 2.2 . 2.3 ) a message is received, transfer of the N messages to N control units ( 8.1 . 8.2 . 8.3 ), each control unit ( 8.1 . 8.2 . 8.3 ) receives in each case a message loading the interface functionality belonging to the respective one of the N messages from one of N routing memories ( 9.1 . 9.2 . 9.3 ), each one of the N control units ( 8.1 . 8.2 . 8.3 ) and one of the N bus systems ( 2.1 . 2.2 . 2.3 ) are assigned to the affected control unit ( 8.1 . 8.2 . 8.3 ), Transfer of the N messages each to a different than the original bus system ( 2.1 . 2.2 . 2.3 ), according to the stored information from the associated routing memory ( 9.1 . 9.2 . 9.3 ).