DE3175054D1 - Modular data processing system - Google Patents

Modular data processing system

Info

Publication number
DE3175054D1
DE3175054D1 DE8181100768T DE3175054T DE3175054D1 DE 3175054 D1 DE3175054 D1 DE 3175054D1 DE 8181100768 T DE8181100768 T DE 8181100768T DE 3175054 T DE3175054 T DE 3175054T DE 3175054 D1 DE3175054 D1 DE 3175054D1
Authority
DE
Germany
Prior art keywords
bus
cpu
processing system
data processing
acknowledge signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8181100768T
Other languages
English (en)
Inventor
Richard Anthony Stokken
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wincor Nixdorf International GmbH
Original Assignee
Nixdorf Computer AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nixdorf Computer AG filed Critical Nixdorf Computer AG
Application granted granted Critical
Publication of DE3175054D1 publication Critical patent/DE3175054D1/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/3017—Runtime instruction translation, e.g. macros
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615—Address space extension
    • G06F12/0623—Address space extension for memory modules
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615—Address space extension
    • G06F12/063—Address space extension for I/O modules, e.g. memory mapped I/O
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • G06F13/26—Handling requests for interconnection or transfer for access to input/output bus using interrupt with priority control
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/368—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control
    • G06F13/37—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control using a physical-position-dependent priority, e.g. daisy chain, round robin or token passing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4208—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus
    • G06F13/4217—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus with synchronous protocol
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533—Hypervisors; Virtual machine monitors
    • G06F9/45537—Provision of facilities of other operating environments, e.g. WINE
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
    • G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs
DE8181100768T 1980-04-10 1981-02-04 Modular data processing system Expired DE3175054D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/138,957 US4365294A (en) 1980-04-10 1980-04-10 Modular terminal system using a common bus

Publications (1)

Publication Number Publication Date
DE3175054D1 true DE3175054D1 (en) 1986-09-11

Family

ID=22484435

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8181100768T Expired DE3175054D1 (en) 1980-04-10 1981-02-04 Modular data processing system

Country Status (5)

Country Link
US (1) US4365294A (de)
EP (2) EP0157075B1 (de)
JP (1) JPS6048779B2 (de)
CA (1) CA1157162A (de)
DE (1) DE3175054D1 (de)

Families Citing this family (92)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4639889A (en) * 1980-02-19 1987-01-27 Omron Tateisi Electronics Company System for controlling communication between a main control assembly and programmable terminal units
US4482953A (en) * 1980-05-30 1984-11-13 Fairchild Camera & Instrument Corporation Computer with console addressable PLA storing control microcode and microinstructions for self-test of internal registers and ALU
JPS5833770A (ja) * 1981-08-24 1983-02-28 Sony Corp デジタルデ−タのプログラム転送方法
JPS5856010A (ja) * 1981-09-29 1983-04-02 Fujitsu Ltd 情報処理装置
IT1145730B (it) * 1981-11-13 1986-11-05 Olivetti & Co Spa Sistema di elaborazione di dati con dispositivo di controllo delle interruzioni di programma
US4488256A (en) * 1981-11-23 1984-12-11 Motorola, Inc. Memory management unit having means for detecting and preventing mapping conflicts
DE3146769A1 (de) * 1981-11-25 1983-06-09 Jurij Egorovič Moskva Čičerin Rechensystem
US4547849A (en) * 1981-12-09 1985-10-15 Glenn Louie Interface between a microprocessor and a coprocessor
US4473880A (en) * 1982-01-26 1984-09-25 Intel Corporation Arbitration means for controlling access to a bus shared by a number of modules
US4614841A (en) * 1982-06-29 1986-09-30 At&T Bell Laboratories Geographically distributed multiprocessor time-shared communication processing system
EP0104545A3 (de) * 1982-09-27 1985-12-04 Kabushiki Kaisha Toshiba Eingangs- und Ausgangsportsteuereinheit
JPS5961457A (ja) * 1982-09-30 1984-04-07 Sakutaro Nonaka ブラシなし三相同期発電機
JPS5999521A (ja) * 1982-11-29 1984-06-08 Toshiba Corp インタフエ−ス回路
DE3300699C2 (de) * 1983-01-11 1985-12-19 Nixdorf Computer Ag, 4790 Paderborn Schaltungsanordnung zum Adressieren der jeweils ein Adreßvolumen aufweisenden Speicher mehrerer datenverarbeitender Einrichtungen in einem Mehrprozessorsystem mit Systembus
US4731738A (en) * 1983-02-14 1988-03-15 Honeywell Information Systems Inc. Memory timing and control apparatus
US4613936A (en) * 1983-02-25 1986-09-23 International Business Machines Corporation Centralized generation of data transfer acknowledge pulses for microprocessors
JPS59186062A (ja) * 1983-04-07 1984-10-22 Nec Corp 分散形プロセツサシステム
US4611279A (en) * 1983-04-14 1986-09-09 International Business Machines Corporation DMA asynchronous mode clock stretch
US4604689A (en) * 1983-04-15 1986-08-05 Convergent Technologies, Inc. Bus repeater
US4611297A (en) * 1983-08-18 1986-09-09 Pitney Bowes Inc. Bus grant circuit
US4591982A (en) * 1983-08-29 1986-05-27 International Business Machines Corporation Storage selection override apparatus for a multimicroprocessor implemented data processing system
JPS6097459A (ja) * 1983-10-18 1985-05-31 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション デ−タ処理システム同期方法
JPS60142647A (ja) * 1983-12-29 1985-07-27 Hitachi Ltd マルチドロツプ接続のデ−タ収集装置
US4862353A (en) * 1984-03-05 1989-08-29 Tektronix, Inc. Modular input device system
US4642759A (en) * 1984-04-02 1987-02-10 Targa Electronics Systems Inc. Bubble memory disk emulation system
US4710893A (en) * 1984-06-22 1987-12-01 Autek Systems Corporation High speed instrument bus
US4757443A (en) * 1984-06-25 1988-07-12 Data General Corp. Data processing system with unified I/O control and adapted for display of graphics
FR2568035B1 (fr) * 1984-07-17 1989-06-02 Sagem Procede d'interconnexion de microprocesseurs
FR2570524B1 (fr) * 1984-09-19 1987-01-02 Matra Communication Terminal de tele-informatique a extensions externes
JPS61156338A (ja) * 1984-12-27 1986-07-16 Toshiba Corp マルチプロセツサシステム
US5067071A (en) * 1985-02-27 1991-11-19 Encore Computer Corporation Multiprocessor computer system employing a plurality of tightly coupled processors with interrupt vector bus
JPH067380B2 (ja) * 1985-08-30 1994-01-26 株式会社日立製作所 マルチプロセッサシステム
US5088033A (en) * 1986-04-28 1992-02-11 Xerox Corporation Data processing system emulation in a window with a coprocessor and I/O emulation
AU597980B2 (en) * 1986-05-30 1990-06-14 Honeywell Bull Inc. Apparatus and method for interprocessor communication
CN1008018B (zh) * 1986-09-27 1990-05-16 徐肇昌 一种具有合作能力的同构型多计算机系统及其合作方法
US4933836A (en) * 1986-10-29 1990-06-12 United Technologies Corporation n-Dimensional modular multiprocessor lattice architecture
AU601784B2 (en) * 1986-12-18 1990-09-20 Honeywell Bull Inc. Data processing system having a bus command generated by one subsystem on behalf of another subsystem
US4866664A (en) * 1987-03-09 1989-09-12 Unisys Corporation Intercomputer communication control apparatus & method
US5142683A (en) * 1987-03-09 1992-08-25 Unisys Corporation Intercomputer communication control apparatus and method
WO1988010469A1 (en) * 1987-06-18 1988-12-29 Unisys Corporation Intercomputer communication control apparatus and method
US4859995A (en) * 1987-06-30 1989-08-22 Xerox Corporation Mouse pointer with switchable emulation mode
CA1312958C (en) * 1987-08-19 1993-01-19 Montgomery C. Mcgraw Data processing system for utilizing a memory-mapped coprocessor within a limited address space
US5062044A (en) * 1987-09-29 1991-10-29 Western Digital Corporation Temporary bus master for use in a digital system having asynchronously communicating sub-systems
FR2622711A1 (fr) * 1987-11-04 1989-05-05 Trt Telecom Radio Electr Dispositif destine a remplacer un circuit integre comportant sur la meme puce un processeur de signal et un ensemble de memoire contenant des informations figees
US5640585A (en) * 1988-02-09 1997-06-17 Ast Research, Inc. State machine bus controller
JPH01237843A (ja) * 1988-03-18 1989-09-22 Fujitsu Ltd マイクロプロセッサ
CA1339710C (en) * 1988-04-11 1998-03-10 Steven J. Gans Network interface board having memory mapped mailbox registers includingalarm registers for storing prioritized alarm messages from programmablelogic controllers
US5140680A (en) * 1988-04-13 1992-08-18 Rockwell International Corporation Method and apparatus for self-timed digital data transfer and bus arbitration
CA1321842C (en) * 1988-05-11 1993-08-31 Digital Equipment Corporation Double unequal bus timeout
US5261057A (en) * 1988-06-30 1993-11-09 Wang Laboratories, Inc. I/O bus to system interface
JP2941817B2 (ja) * 1988-09-14 1999-08-30 株式会社日立製作所 ベクトル処理装置
AU4527789A (en) * 1988-11-02 1990-05-28 Howard W. Selby Iii Remote linkable computer bus
US5109353A (en) * 1988-12-02 1992-04-28 Quickturn Systems, Incorporated Apparatus for emulation of electronic hardware system
US5329470A (en) * 1988-12-02 1994-07-12 Quickturn Systems, Inc. Reconfigurable hardware emulation system
US5369593A (en) * 1989-05-31 1994-11-29 Synopsys Inc. System for and method of connecting a hardware modeling element to a hardware modeling system
US5101479A (en) * 1989-07-21 1992-03-31 Clearpoint Research Corporation Bus device for generating and responding to slave response codes
US4972313A (en) * 1989-08-07 1990-11-20 Bull Hn Information Systems Inc. Bus access control for a multi-host system using successively decremented arbitration delay periods to allocate bus access among the hosts
JPH03122742A (ja) * 1989-10-05 1991-05-24 Oki Electric Ind Co Ltd 割込み通知方式
US5201055A (en) * 1989-11-03 1993-04-06 Compaq Computer Corporation Multiprocessing system includes interprocessor encoding and decoding logic used for communication between two cards through reduced addressing lines
DE4018419A1 (de) * 1990-06-06 1991-12-12 Mannesmann Ag Datenverarbeitendes geraet, insbesondere drucker
FR2670919A1 (fr) * 1990-12-27 1992-06-26 Stanislav Bulai Systeme multiprocesseur.
US6446164B1 (en) * 1991-06-27 2002-09-03 Integrated Device Technology, Inc. Test mode accessing of an internal cache memory
US5296936A (en) * 1991-07-22 1994-03-22 International Business Machines Corporation Communication apparatus and method for transferring image data from a source to one or more receivers
US5293384A (en) * 1991-10-04 1994-03-08 Bull Hn Information Systems Inc. Microprocessor bus interface protocol analyzer
US5202999A (en) * 1992-01-10 1993-04-13 Digital Equipment Corporation Access request prioritization and summary device
FR2686175B1 (fr) * 1992-01-14 1996-12-20 Andre Thepaut Systeme de traitement de donnees multiprocesseur.
US5452419A (en) * 1992-03-06 1995-09-19 Pitney Bowes Inc. Serial communication control system between nodes having predetermined intervals for synchronous communications and mediating asynchronous communications for unused time in the predetermined intervals
US5664104A (en) * 1992-12-18 1997-09-02 Fujitsu Limited Transfer processor including a plurality of failure display units wherein a transfer process is prohibited if failure is indicated in a failure display unit
US5768598A (en) * 1993-09-13 1998-06-16 Intel Corporation Method and apparatus for sharing hardward resources in a computer system
US5668949A (en) * 1993-11-12 1997-09-16 Intel Corporation System utilizing multiple address decode resources and decoder receiving address determines address corresponding to resource based on select and ready signals by that particular resource
US5590289A (en) * 1993-11-12 1996-12-31 Intel Corporation Method and apparatus for initializing a computer system having central and distributed address decode memory bus resources
US5495589A (en) * 1993-12-23 1996-02-27 Unisys Corporation Architecture for smart control of bi-directional transfer of data
US5450578A (en) * 1993-12-23 1995-09-12 Unisys Corporation Method and apparatus for automatically routing around faults within an interconnect system
US5826043A (en) * 1995-06-07 1998-10-20 Ast Research, Inc. Docking station with serially accessed memory that is powered by a portable computer for identifying the docking station
US5799169A (en) * 1995-10-02 1998-08-25 Chromatic Research, Inc. Emulated registers
US5727217A (en) * 1995-12-20 1998-03-10 Intel Corporation Circuit and method for emulating the functionality of an advanced programmable interrupt controller
KR100430235B1 (ko) * 1996-07-30 2004-07-22 주식회사 하이닉스반도체 시스템보드와서브보드간의데이터전송제어회로
DE19720400B4 (de) * 1996-09-07 2009-09-17 Bayerische Motoren Werke Aktiengesellschaft Datenbus für Fahrzeuge mit mehreren der Insassen-Sicherheit dienenden Einrichtungen
US6298410B1 (en) * 1997-12-31 2001-10-02 Intel Corporation Apparatus and method for initiating hardware priority management by software controlled register access
US8984199B2 (en) * 2003-07-31 2015-03-17 Intel Corporation Inter-processor interrupts
US7246213B2 (en) * 2004-07-28 2007-07-17 Hewlett-Packard Development Company, L.P. Data address security device and method
US20080086575A1 (en) * 2006-10-06 2008-04-10 Annie Foong Network interface techniques
US9032128B2 (en) * 2008-04-28 2015-05-12 Hewlett-Packard Development Company, L.P. Method and system for generating and delivering inter-processor interrupts in a multi-core processor and in certain shared memory multi-processor systems
US7996548B2 (en) 2008-12-30 2011-08-09 Intel Corporation Message communication techniques
US8645596B2 (en) * 2008-12-30 2014-02-04 Intel Corporation Interrupt techniques
WO2014070779A1 (en) * 2012-10-30 2014-05-08 Anayas360.Com, Llc. Address based serial communication interface for control and monitoring of system-on-chip implementations
WO2014209315A1 (en) * 2013-06-27 2014-12-31 Hewlett-Packard Development Company, L.P. Memory bus error signal
US10402324B2 (en) 2013-10-31 2019-09-03 Hewlett Packard Enterprise Development Lp Memory access for busy memory by receiving data from cache during said busy period and verifying said data utilizing cache hit bit or cache miss bit
US9672186B2 (en) * 2014-06-20 2017-06-06 Nxp Usa, Inc. Electronic monitoring device having wake-up for daisy chain
CN109992060B (zh) * 2017-12-29 2020-12-25 中国长城科技集团股份有限公司 层叠式多路服务器系统及服务器
CN108590869B (zh) * 2018-05-14 2023-06-13 恒天九五重工有限公司 电喷发动机控制装置及方法
CN114036096A (zh) * 2021-11-04 2022-02-11 珠海一微半导体股份有限公司 一种基于总线接口的读控制器

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3700873A (en) * 1970-04-06 1972-10-24 Ibm Structured computer notation and system architecture utilizing same
GB1474385A (en) * 1973-12-14 1977-05-25 Int Computers Ltd Multiprocessor data processing systems
US4130865A (en) * 1974-06-05 1978-12-19 Bolt Beranek And Newman Inc. Multiprocessor computer apparatus employing distributed communications paths and a passive task register
FR2276636A1 (fr) * 1974-06-28 1976-01-23 Labo Cent Telecommunicat Dispositif pour adresser la memoire d'un systeme de commande a programme enregistre
DE2638306A1 (de) * 1975-08-29 1977-03-03 Hitachi Ltd Anordnung zur informationsverarbeitung
JPS52112246A (en) * 1976-03-18 1977-09-20 Panafacom Ltd Data processor
US4059851A (en) * 1976-07-12 1977-11-22 Ncr Corporation Priority network for devices coupled by a common bus
US4167781A (en) * 1976-10-12 1979-09-11 Fairchild Camera And Instrument Corporation Microprocessor system having a single central processing unit shared by a plurality of subsystems each having a memory
FR2371734A1 (fr) * 1976-11-23 1978-06-16 Matra Systeme numerique de traitement de donnees, notamment pour vaisseau spatial
US4127896A (en) * 1977-08-10 1978-11-28 Bunker Ramo Corporation Bidirectional interface utilizing read-only memory, decoder and multiplexer
US4161024A (en) * 1977-12-22 1979-07-10 Honeywell Information Systems Inc. Private cache-to-CPU interface in a bus oriented data processing system

Also Published As

Publication number Publication date
EP0037875A1 (de) 1981-10-21
US4365294A (en) 1982-12-21
CA1157162A (en) 1983-11-15
EP0157075A1 (de) 1985-10-09
EP0037875B1 (de) 1986-08-06
EP0157075B1 (de) 1988-05-18
JPS6048779B2 (ja) 1985-10-29
JPS56159725A (en) 1981-12-09

Similar Documents

Publication Publication Date Title
DE3175054D1 (en) Modular data processing system
HK1012742A1 (en) Microprocessor architecture capable of supporting multiple heterogeneous processors
JPS57105879A (en) Control system for storage device
GR3023419T3 (en) Buffer memory subsystem for peripheral controllers and method
EP0473273A1 (de) Übertragungssystem zwischen einer Rechnervorrichtung und Peripheriegeräten
EP0473280B1 (de) Übertragungssteuerungssystem für einen Rechner und Peripheriegeräte
JPS5478039A (en) Communication controller
EP0299075A4 (de) Verarbeitungseinheit mit mindestens einem zusatzprozessor.
JPS56110125A (en) Data processing device
GB2001462A (en) Data communication system
EP0473279B1 (de) Übertragungssteuerungsvorrichtung für Rechnersysteme
JPS6478361A (en) Data processing system
JPS6414655A (en) Data transfer device
JPS5622157A (en) Process system multiplexing system
JPS5489455A (en) Control system
JPS6410377A (en) Inter-module communication system
JPS57141754A (en) Operator console
JPS57178551A (en) Electronic computer
JPS57150017A (en) Direct memory access system
JPS5764835A (en) Direct memory access system of microprocessor
JPS57168318A (en) Data transmitting device
JPS55150032A (en) Data transfer system
JPS55153021A (en) Data transfer system of multiprocessor system
JPS5750039A (en) Computer system
JPS56127259A (en) Information processor

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8327 Change in the person/name/address of the patent owner

Owner name: SIEMENS NIXDORF INFORMATIONSSYSTEME AG, 4790 PADER

8339 Ceased/non-payment of the annual fee