DE3481872D1 - Geraet zur erkennung von ausserbetriebzustaenden bei einem nichtbedienten unterbrechungsgesteuerten prozessor. - Google Patents

Geraet zur erkennung von ausserbetriebzustaenden bei einem nichtbedienten unterbrechungsgesteuerten prozessor.

Info

Publication number
DE3481872D1
DE3481872D1 DE8484430050T DE3481872T DE3481872D1 DE 3481872 D1 DE3481872 D1 DE 3481872D1 DE 8484430050 T DE8484430050 T DE 8484430050T DE 3481872 T DE3481872 T DE 3481872T DE 3481872 D1 DE3481872 D1 DE 3481872D1
Authority
DE
Germany
Prior art keywords
operated
detecting device
interrupted processor
interrupted
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8484430050T
Other languages
English (en)
Inventor
Jacques Combes
Jean-Claude Robbe
Paul Viallon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE3481872D1 publication Critical patent/DE3481872D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
    • G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs
DE8484430050T 1984-12-31 1984-12-31 Geraet zur erkennung von ausserbetriebzustaenden bei einem nichtbedienten unterbrechungsgesteuerten prozessor. Expired - Fee Related DE3481872D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP84430050A EP0190370B1 (de) 1984-12-31 1984-12-31 Gerät zur Erkennung von Ausserbetriebzuständen bei einem nichtbedienten unterbrechungsgesteuerten Prozessor

Publications (1)

Publication Number Publication Date
DE3481872D1 true DE3481872D1 (de) 1990-05-10

Family

ID=8192961

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8484430050T Expired - Fee Related DE3481872D1 (de) 1984-12-31 1984-12-31 Geraet zur erkennung von ausserbetriebzustaenden bei einem nichtbedienten unterbrechungsgesteuerten prozessor.

Country Status (5)

Country Link
US (1) US4748587A (de)
EP (1) EP0190370B1 (de)
JP (1) JPS61163447A (de)
CA (1) CA1236583A (de)
DE (1) DE3481872D1 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03208138A (ja) * 1990-01-09 1991-09-11 Fujitsu Ltd システム監視方式
EP0457308B1 (de) * 1990-05-18 1997-01-22 Fujitsu Limited Datenverarbeitungssystem mit einem Eingangs-/Ausgangswegetrennmechanismus und Verfahren zur Steuerung des Datenverarbeitungssystems
JPH0474229A (ja) * 1990-07-17 1992-03-09 Toshiba Corp 情報処理装置
FR2675922B1 (fr) * 1991-04-25 1995-04-21 Hewlett Packard Co Procede et dispositif de test d'un ensemble multi-cartes d'un systeme informatique.
US5949971A (en) * 1995-10-02 1999-09-07 International Business Machines Corporation Method and system for performance monitoring through identification of frequency and length of time of execution of serialization instructions in a processing system
US5691920A (en) * 1995-10-02 1997-11-25 International Business Machines Corporation Method and system for performance monitoring of dispatch unit efficiency in a processing system
US5752062A (en) * 1995-10-02 1998-05-12 International Business Machines Corporation Method and system for performance monitoring through monitoring an order of processor events during execution in a processing system
US5751945A (en) * 1995-10-02 1998-05-12 International Business Machines Corporation Method and system for performance monitoring stalls to identify pipeline bottlenecks and stalls in a processing system
US5729726A (en) * 1995-10-02 1998-03-17 International Business Machines Corporation Method and system for performance monitoring efficiency of branch unit operation in a processing system
US5797019A (en) * 1995-10-02 1998-08-18 International Business Machines Corporation Method and system for performance monitoring time lengths of disabled interrupts in a processing system
US5748855A (en) * 1995-10-02 1998-05-05 Iinternational Business Machines Corporation Method and system for performance monitoring of misaligned memory accesses in a processing system
JPH10198583A (ja) * 1997-01-10 1998-07-31 Nec Corp 空走プロセスの検出と処置方式及び方法
US6732280B1 (en) * 1999-07-26 2004-05-04 Hewlett-Packard Development Company, L.P. Computer system performing machine specific tasks before going to a low power state
GB2415271A (en) * 2004-06-16 2005-12-21 Sendo Int Ltd Computing device with watchdog timer
DE102005008975A1 (de) * 2005-02-28 2006-08-31 Robert Bosch Gmbh Verfahren und Vorrichtung zur Überwachung einer Prozessausführung
JP4609381B2 (ja) * 2006-06-14 2011-01-12 株式会社デンソー 異常監視用プログラム、記録媒体及び電子装置
WO2016204070A1 (ja) * 2015-06-16 2016-12-22 オリンパス株式会社 Ｃｐｕ監視装置

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3566368A (en) * 1969-04-22 1971-02-23 Us Army Delta clock and interrupt logic
US3749897A (en) * 1971-09-03 1973-07-31 Collins Radio Co System failure monitor title
US3909795A (en) * 1973-08-31 1975-09-30 Gte Automatic Electric Lab Inc Program timing circuitry for central data processor of digital communications system
US4072852A (en) * 1976-08-23 1978-02-07 Honeywell Inc. Digital computer monitoring and restart circuit
GB2075729B (en) * 1980-05-12 1984-08-08 Suwa Seikosha Kk Microprogramm control circuit
JPS5745757A (en) * 1980-09-03 1982-03-15 Hitachi Ltd Ring type communication system of equal level
US4475156A (en) * 1982-09-21 1984-10-02 Xerox Corporation Virtual machine control
GB2128447B (en) * 1982-10-06 1986-10-29 Standard Telephones Cables Ltd Telephone exchange system test equipment

Also Published As

Publication number Publication date
JPS61163447A (ja) 1986-07-24
EP0190370B1 (de) 1990-04-04
CA1236583A (en) 1988-05-10
US4748587A (en) 1988-05-31
EP0190370A1 (de) 1986-08-13

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee