DE3774370D1 - Integrierte schaltungsstruktur mit coaxialen stiften. - Google Patents

Integrierte schaltungsstruktur mit coaxialen stiften.

Info

Publication number
DE3774370D1
DE3774370D1 DE8787307594T DE3774370T DE3774370D1 DE 3774370 D1 DE3774370 D1 DE 3774370D1 DE 8787307594 T DE8787307594 T DE 8787307594T DE 3774370 T DE3774370 T DE 3774370T DE 3774370 D1 DE3774370 D1 DE 3774370D1
Authority
DE
Germany
Prior art keywords
integrated circuit
circuit structure
coaxial pins
coaxial
pins
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8787307594T
Other languages
English (en)
Inventor
Toshihiko Watari
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE3774370D1 publication Critical patent/DE3774370D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4885—Wire-like parts or pins
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5384—Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01019—Potassium [K]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding
DE8787307594T 1986-08-27 1987-08-27 Integrierte schaltungsstruktur mit coaxialen stiften. Expired - Fee Related DE3774370D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61200788A JPH0734455B2 (ja) 1986-08-27 1986-08-27 多層配線基板

Publications (1)

Publication Number Publication Date
DE3774370D1 true DE3774370D1 (de) 1991-12-12

Family

ID=16430200

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8787307594T Expired - Fee Related DE3774370D1 (de) 1986-08-27 1987-08-27 Integrierte schaltungsstruktur mit coaxialen stiften.

Country Status (6)

Country Link
US (1) US4819131A (de)
EP (1) EP0258056B1 (de)
JP (1) JPH0734455B2 (de)
AU (1) AU592518B2 (de)
CA (1) CA1269763A (de)
DE (1) DE3774370D1 (de)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0821450B2 (ja) * 1987-10-05 1996-03-04 日本電気株式会社 高速信号用コネクタ
JPH0519995Y2 (de) * 1988-01-05 1993-05-25
JPH02148862A (ja) * 1988-11-30 1990-06-07 Hitachi Ltd 回路素子パッケージ、キャリヤ基板および製造方法
JPH0677469B2 (ja) * 1988-12-28 1994-09-28 日本電気株式会社 多接点コネクタの案内構造
US4912772A (en) * 1989-03-06 1990-03-27 International Business Machines Corporation Connector and circuit package apparatus for pin array circuit module and circuit board
JPH0744240B2 (ja) * 1990-11-30 1995-05-15 工業技術院長 マザーボードとチップキャリアの接続方法
JPH04351710A (ja) * 1991-05-30 1992-12-07 Sony Corp 回転ヘッドドラム装置
US5334030A (en) * 1992-06-01 1994-08-02 National Semiconductor Corporation PCMCIA bus extender card for PCMCIA system development
JPH06314580A (ja) * 1992-08-05 1994-11-08 Amp Japan Ltd 二基板接続用同軸コネクタ
JPH0828244B2 (ja) * 1993-04-28 1996-03-21 日本電気株式会社 マルチチップパッケージの給電構造
AT1695U1 (de) * 1996-07-29 1997-09-25 Mikroelektronik Ges Mit Beschr Schaltanordnung
US5791911A (en) * 1996-10-25 1998-08-11 International Business Machines Corporation Coaxial interconnect devices and methods of making the same
US6137693A (en) * 1998-07-31 2000-10-24 Agilent Technologies Inc. High-frequency electronic package with arbitrarily-shaped interconnects and integral shielding
US20040043644A1 (en) * 1999-11-02 2004-03-04 Dibene J. Ted Coaxial and linear power delivery devices
US6803650B2 (en) * 2001-02-23 2004-10-12 Silicon Bandwidth Inc. Semiconductor die package having mesh power and ground planes
DE10164799B4 (de) * 2001-03-21 2006-03-30 Audioton Kabelwerk Gmbh Mobiltelefoneinrichtung mit mehradrigen elektrischen Verbindungseinrichtungen
US20040173894A1 (en) * 2001-09-27 2004-09-09 Amkor Technology, Inc. Integrated circuit package including interconnection posts for multiple electrical connections
US6954984B2 (en) * 2002-07-25 2005-10-18 International Business Machines Corporation Land grid array structure
WO2005029581A1 (ja) * 2003-09-24 2005-03-31 Ibiden Co.,Ltd. インターポーザ、多層プリント配線板
US7544070B2 (en) * 2004-07-02 2009-06-09 Seagate Technology Llc Electrical connector defining a power plane
US8064224B2 (en) * 2008-03-31 2011-11-22 Intel Corporation Microelectronic package containing silicon patches for high density interconnects, and method of manufacturing same
US8465297B2 (en) 2010-09-25 2013-06-18 Intel Corporation Self referencing pin

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3698082A (en) * 1966-04-25 1972-10-17 Texas Instruments Inc Complex circuit array method
US4231629A (en) * 1979-01-18 1980-11-04 Telex Computer Products, Inc. Apparatus for connection of coaxial cables to a printed circuit mother board
NL8303268A (nl) * 1983-09-23 1985-04-16 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting en halfgeleiderinrichting vervaardigd door toepassing van een dergelijke werkwijze.
US4612601A (en) * 1983-11-30 1986-09-16 Nec Corporation Heat dissipative integrated circuit chip package
JPS61288446A (ja) * 1985-06-17 1986-12-18 Fujitsu Ltd 高速ｉｃパツケ−ジ構造
US4692839A (en) * 1985-06-24 1987-09-08 Digital Equipment Corporation Multiple chip interconnection system and package
JPS6242437A (ja) * 1985-08-19 1987-02-24 Fujitsu Ltd マイクロ波ｉｃの接続構造
SE450065B (sv) * 1985-10-03 1987-06-01 Ericsson Telefon Ab L M Koaxialkontakt avsedd att anvendas vid en overgang mellan en koaxialledare och en planledare
US4814855A (en) * 1986-04-29 1989-03-21 International Business Machines Corporation Balltape structure for tape automated bonding, multilayer packaging, universal chip interconnection and energy beam processes for manufacturing balltape

Also Published As

Publication number Publication date
AU7763287A (en) 1988-03-03
EP0258056A2 (de) 1988-03-02
EP0258056A3 (en) 1988-09-07
US4819131A (en) 1989-04-04
EP0258056B1 (de) 1991-11-06
JPS6356949A (ja) 1988-03-11
AU592518B2 (en) 1990-01-11
CA1269763A (en) 1990-05-29
JPH0734455B2 (ja) 1995-04-12

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee