DE3784757T2 - Metallisierte Halbleiteranordnung mit einer Zwischenschicht. - Google Patents

Metallisierte Halbleiteranordnung mit einer Zwischenschicht.

Info

Publication number
DE3784757T2
DE3784757T2 DE87302913T DE3784757T DE3784757T2 DE 3784757 T2 DE3784757 T2 DE 3784757T2 DE 87302913 T DE87302913 T DE 87302913T DE 3784757 T DE3784757 T DE 3784757T DE 3784757 T2 DE3784757 T2 DE 3784757T2
Authority
DE
Germany
Prior art keywords
semiconductor device
intermediate layer
metallized semiconductor
metallized
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE87302913T
Other languages
English (en)
Other versions
DE3784757D1 (de
Inventor
Daniel Brasen
Ronald Howard Willens
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
American Telephone and Telegraph Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by American Telephone and Telegraph Co Inc filed Critical American Telephone and Telegraph Co Inc
Publication of DE3784757D1 publication Critical patent/DE3784757D1/de
Application granted granted Critical
Publication of DE3784757T2 publication Critical patent/DE3784757T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76843Barrier, adhesion or liner layers formed in openings in a dielectric
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45Ohmic electrodes
    • H01L29/452Ohmic electrodes on AIII-BV compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45Ohmic electrodes
    • H01L29/456Ohmic electrodes on silicon
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/12All metal or with adjacent metals
    • Y10T428/12493Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
    • Y10T428/12528Semiconductor component
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/12All metal or with adjacent metals
    • Y10T428/12493Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
    • Y10T428/12771Transition metal-base component
    • Y10T428/12806Refractory [Group IVB, VB, or VIB] metal-base component
DE87302913T 1986-04-11 1987-04-03 Metallisierte Halbleiteranordnung mit einer Zwischenschicht. Expired - Fee Related DE3784757T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/850,978 US4725877A (en) 1986-04-11 1986-04-11 Metallized semiconductor device including an interface layer

Publications (2)

Publication Number Publication Date
DE3784757D1 DE3784757D1 (de) 1993-04-22
DE3784757T2 true DE3784757T2 (de) 1993-09-30

Family

ID=25309619

Family Applications (1)

Application Number Title Priority Date Filing Date
DE87302913T Expired - Fee Related DE3784757T2 (de) 1986-04-11 1987-04-03 Metallisierte Halbleiteranordnung mit einer Zwischenschicht.

Country Status (7)

Country Link
US (1) US4725877A (de)
EP (1) EP0243024B1 (de)
JP (1) JP2608283B2 (de)
KR (1) KR950007351B1 (de)
CA (1) CA1258718A (de)
DE (1) DE3784757T2 (de)
ES (1) ES2038987T3 (de)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2552159B2 (ja) * 1987-02-02 1996-11-06 セイコーエプソン株式会社 半導体装置及びその製造方法
US4963510A (en) * 1987-11-02 1990-10-16 Texas Instruments Incorporated Method and apparatus for providing interconnection between metallization layers on semiconductors devices
US4873565A (en) * 1987-11-02 1989-10-10 Texas Instruments Incorporated Method and apparatus for providing interconnection between metallization layers on semiconductor devices
KR920008886B1 (ko) * 1989-05-10 1992-10-10 삼성전자 주식회사 디램셀 및 그 제조방법
US5252382A (en) * 1991-09-03 1993-10-12 Cornell Research Foundation, Inc. Interconnect structures having patterned interfaces to minimize stress migration and related electromigration damages
US6081034A (en) * 1992-06-12 2000-06-27 Micron Technology, Inc. Low-resistance contact to silicon having a titanium silicide interface and an amorphous titanium carbonitride barrier layer
JP3159561B2 (ja) * 1993-03-29 2001-04-23 ローム株式会社 結晶性薄膜用電極
US5439731A (en) * 1994-03-11 1995-08-08 Cornell Research Goundation, Inc. Interconnect structures containing blocked segments to minimize stress migration and electromigration damage
US5683601A (en) * 1994-10-24 1997-11-04 Panasonic Technologies, Inc. Laser ablation forward metal deposition with electrostatic assisted bonding
US5935462A (en) * 1994-10-24 1999-08-10 Matsushita Electric Industrial Co., Ltd. Repair of metal lines by electrostatically assisted laser ablative deposition
US6060127A (en) * 1998-03-31 2000-05-09 Matsushita Electric Industrial Co., Ltd. Mechanically restricted laser deposition
US6180912B1 (en) 1998-03-31 2001-01-30 Matsushita Electric Industrial Co., Ltd. Fan-out beams for repairing an open defect
US7554829B2 (en) 1999-07-30 2009-06-30 Micron Technology, Inc. Transmission lines for CMOS integrated circuits
JP2002026134A (ja) * 2000-07-12 2002-01-25 Seiko Epson Corp 半導体集積回路の製造方法及びこの方法により製造した半導体集積回路
US7082838B2 (en) * 2000-08-31 2006-08-01 Tdk Corporation Extraordinary piezoconductance in inhomogeneous semiconductors
US8026161B2 (en) * 2001-08-30 2011-09-27 Micron Technology, Inc. Highly reliable amorphous high-K gate oxide ZrO2
US6767795B2 (en) * 2002-01-17 2004-07-27 Micron Technology, Inc. Highly reliable amorphous high-k gate dielectric ZrOXNY
US6893984B2 (en) * 2002-02-20 2005-05-17 Micron Technology Inc. Evaporated LaA1O3 films for gate dielectrics
US7589029B2 (en) * 2002-05-02 2009-09-15 Micron Technology, Inc. Atomic layer deposition and conversion
US7045430B2 (en) * 2002-05-02 2006-05-16 Micron Technology Inc. Atomic layer-deposited LaAlO3 films for gate dielectrics
US7205218B2 (en) 2002-06-05 2007-04-17 Micron Technology, Inc. Method including forming gate dielectrics having multiple lanthanide oxide layers
US7221586B2 (en) * 2002-07-08 2007-05-22 Micron Technology, Inc. Memory utilizing oxide nanolaminates
US7101813B2 (en) * 2002-12-04 2006-09-05 Micron Technology Inc. Atomic layer deposited Zr-Sn-Ti-O films
US7192892B2 (en) 2003-03-04 2007-03-20 Micron Technology, Inc. Atomic layer deposited dielectric layers
DE602005009793D1 (de) * 2005-01-21 2008-10-30 St Microelectronics Srl Phasenwechselspeicher-Vorrichtung und Verfahren zu ihrer Herstellung
US7662729B2 (en) * 2005-04-28 2010-02-16 Micron Technology, Inc. Atomic layer deposition of a ruthenium layer to a lanthanide oxide dielectric layer
US7927948B2 (en) 2005-07-20 2011-04-19 Micron Technology, Inc. Devices with nanocrystals and methods of formation

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3657029A (en) * 1968-12-31 1972-04-18 Texas Instruments Inc Platinum thin-film metallization method
US3881884A (en) * 1973-10-12 1975-05-06 Ibm Method for the formation of corrosion resistant electronic interconnections
US4017890A (en) * 1975-10-24 1977-04-12 International Business Machines Corporation Intermetallic compound layer in thin films for improved electromigration resistance
US4135292A (en) * 1976-07-06 1979-01-23 Intersil, Inc. Integrated circuit contact and method for fabricating the same
JPS5679450A (en) * 1979-11-30 1981-06-30 Mitsubishi Electric Corp Electrode and wiring of semiconductor device
JPS56165354A (en) * 1980-05-23 1981-12-18 Nec Corp Semiconductor device
JPS5745228A (en) * 1980-08-29 1982-03-15 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
JPS5771175A (en) * 1980-10-22 1982-05-01 Nec Corp Semiconductor device
JPS584924A (ja) * 1981-07-01 1983-01-12 Hitachi Ltd 半導体装置の電極形成方法
JPS58132962A (ja) * 1982-02-01 1983-08-08 Toshiba Corp 半導体装置
JPH0691257B2 (ja) * 1984-04-20 1994-11-14 富士通株式会社 アモルファスシリコン薄膜トランジスタ

Also Published As

Publication number Publication date
DE3784757D1 (de) 1993-04-22
JPS62295453A (ja) 1987-12-22
US4725877A (en) 1988-02-16
ES2038987T3 (es) 1993-08-16
KR950007351B1 (ko) 1995-07-10
KR870010625A (ko) 1987-11-30
CA1258718A (en) 1989-08-22
EP0243024A2 (de) 1987-10-28
EP0243024A3 (en) 1988-04-20
EP0243024B1 (de) 1993-03-17
JP2608283B2 (ja) 1997-05-07

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Free format text: BLUMBACH, KRAMER & PARTNER, 65193 WIESBADEN

8339 Ceased/non-payment of the annual fee