DE3855354D1 - Halbleiteranordnung mit metallischen Leiterschichten und Verfahren zu ihrer Herstellung - Google Patents

Halbleiteranordnung mit metallischen Leiterschichten und Verfahren zu ihrer Herstellung

Info

Publication number
DE3855354D1
DE3855354D1 DE3855354T DE3855354T DE3855354D1 DE 3855354 D1 DE3855354 D1 DE 3855354D1 DE 3855354 T DE3855354 T DE 3855354T DE 3855354 T DE3855354 T DE 3855354T DE 3855354 D1 DE3855354 D1 DE 3855354D1
Authority
DE
Germany
Prior art keywords
production
conductor layers
metallic conductor
semiconductor arrangement
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3855354T
Other languages
English (en)
Other versions
DE3855354T2 (de
Inventor
Junichi Itoh
Kazuyuki Kurita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3855354D1 publication Critical patent/DE3855354D1/de
Publication of DE3855354T2 publication Critical patent/DE3855354T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • H01L21/318Inorganic layers composed of nitrides
    • H01L21/3185Inorganic layers composed of nitrides of siliconnitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329Insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02129Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/0214Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
DE3855354T 1987-08-18 1988-08-17 Halbleiteranordnung mit metallischen Leiterschichten und Verfahren zu ihrer Herstellung Expired - Fee Related DE3855354T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62203483A JPH084109B2 (ja) 1987-08-18 1987-08-18 半導体装置およびその製造方法

Publications (2)

Publication Number Publication Date
DE3855354D1 true DE3855354D1 (de) 1996-07-11
DE3855354T2 DE3855354T2 (de) 1996-10-10

Family

ID=16474900

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3855354T Expired - Fee Related DE3855354T2 (de) 1987-08-18 1988-08-17 Halbleiteranordnung mit metallischen Leiterschichten und Verfahren zu ihrer Herstellung

Country Status (5)

Country Link
US (1) US5160998A (de)
EP (2) EP0525824B1 (de)
JP (1) JPH084109B2 (de)
KR (1) KR920003311B1 (de)
DE (1) DE3855354T2 (de)

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TW214599B (de) * 1990-10-15 1993-10-11 Seiko Epson Corp
JP2667605B2 (ja) * 1991-02-21 1997-10-27 株式会社東芝 不揮発性半導体記憶装置およびその製造方法
JP2875093B2 (ja) * 1992-03-17 1999-03-24 三菱電機株式会社 半導体装置
US5448111A (en) * 1993-09-20 1995-09-05 Fujitsu Limited Semiconductor device and method for fabricating the same
JP2919257B2 (ja) * 1993-12-15 1999-07-12 日本電気株式会社 多層配線半導体装置
JP3122297B2 (ja) * 1993-12-28 2001-01-09 株式会社東芝 半導体装置
US6300253B1 (en) 1998-04-07 2001-10-09 Micron Technology, Inc. Semiconductor processing methods of forming photoresist over silicon nitride materials, and semiconductor wafer assemblies comprising photoresist over silicon nitride materials
US5926739A (en) 1995-12-04 1999-07-20 Micron Technology, Inc. Semiconductor processing method of promoting photoresist adhesion to an outer substrate layer predominately comprising silicon nitride
US6323139B1 (en) 1995-12-04 2001-11-27 Micron Technology, Inc. Semiconductor processing methods of forming photoresist over silicon nitride materials
KR100271222B1 (ko) * 1995-12-14 2000-12-01 오카베 히로무 반도체 소자 및 그 제조 방법
JP3586031B2 (ja) * 1996-03-27 2004-11-10 株式会社東芝 サセプタおよび熱処理装置および熱処理方法
US5913140A (en) * 1996-12-23 1999-06-15 Lam Research Corporation Method for reduction of plasma charging damage during chemical vapor deposition
JP3226816B2 (ja) * 1996-12-25 2001-11-05 キヤノン販売株式会社 層間絶縁膜の形成方法、半導体装置及びその製造方法
US6110775A (en) * 1997-02-04 2000-08-29 Matsushita Electronics Corporation Process for fabrication of a dram cell having a stacked capacitor
US6551857B2 (en) 1997-04-04 2003-04-22 Elm Technology Corporation Three dimensional structure integrated circuits
US5985771A (en) 1998-04-07 1999-11-16 Micron Technology, Inc. Semiconductor wafer assemblies comprising silicon nitride, methods of forming silicon nitride, and methods of reducing stress on semiconductive wafers
US6316372B1 (en) 1998-04-07 2001-11-13 Micron Technology, Inc. Methods of forming a layer of silicon nitride in a semiconductor fabrication process
US6635530B2 (en) * 1998-04-07 2003-10-21 Micron Technology, Inc. Methods of forming gated semiconductor assemblies
US6136688A (en) * 1999-10-20 2000-10-24 Vanguard International Semiconductor Corporation High stress oxide to eliminate BPSG/SiN cracking
US7645719B2 (en) * 2004-10-13 2010-01-12 Ncr Corporation Thermal paper with security features
US7300886B1 (en) * 2005-06-08 2007-11-27 Spansion Llc Interlayer dielectric for charge loss improvement
GB201410317D0 (en) 2014-06-10 2014-07-23 Spts Technologies Ltd Substrate
US10515822B2 (en) 2016-06-20 2019-12-24 Taiwan Semiconductor Manufacturing Co., Ltd. Method for preventing bottom layer wrinkling in a semiconductor device

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JPS5915489B2 (ja) * 1975-04-09 1984-04-10 日本電気株式会社 半導体集積回路装置
JPS5228870A (en) * 1975-08-29 1977-03-04 Hitachi Ltd Method for production of thin membrane
SE7700229L (sv) * 1976-01-22 1977-07-23 Western Electric Co Forfarande for beleggning av substrat genom utfellning fran ett plasma
US4135954A (en) * 1977-07-12 1979-01-23 International Business Machines Corporation Method for fabricating self-aligned semiconductor devices utilizing selectively etchable masking layers
JPS5519850A (en) * 1978-07-31 1980-02-12 Hitachi Ltd Semiconductor
JPS5745931A (en) * 1980-09-04 1982-03-16 Fujitsu Ltd Semiconductor device with multilayer passivation film and manufacture thereof
US4455568A (en) * 1981-08-27 1984-06-19 American Microsystems, Inc. Insulation process for integrated circuits
JPS58190043A (ja) * 1982-04-30 1983-11-05 Seiko Epson Corp 多層配線法
US4446194A (en) * 1982-06-21 1984-05-01 Motorola, Inc. Dual layer passivation
JPS59163834A (ja) * 1983-03-09 1984-09-14 Fujitsu Ltd 半導体装置の製造方法
JPS60178695A (ja) * 1984-02-17 1985-09-12 インタ−ナシヨナル ビジネス マシ−ンズ コ−ポレ−シヨン 電気的相互接続パツケ−ジ
JPS60192359A (ja) * 1984-03-14 1985-09-30 Nec Corp 半導体メモリ装置
JPS61279132A (ja) * 1985-06-05 1986-12-09 Sony Corp 半導体装置
JPS6257255A (ja) * 1985-09-06 1987-03-12 Agency Of Ind Science & Technol 化合物半導体装置の製造方法
JPS62145842A (ja) * 1985-12-20 1987-06-29 Nec Corp 半導体装置の製造方法
JPS62145839A (ja) * 1985-12-20 1987-06-29 Seiko Epson Corp Mos型集積回路装置の多層配線レイアウト
JPS62154642A (ja) * 1985-12-26 1987-07-09 Matsushita Electronics Corp 半導体装置
JPS62193265A (ja) * 1986-02-20 1987-08-25 Toshiba Corp 半導体装置の製造方法
DE3685495D1 (de) * 1986-07-11 1992-07-02 Ibm Verfahren zur herstellung einer unteraetzten maskenkontur.
US4825277A (en) * 1987-11-17 1989-04-25 Motorola Inc. Trench isolation process and structure

Also Published As

Publication number Publication date
US5160998A (en) 1992-11-03
DE3855354T2 (de) 1996-10-10
EP0307099A1 (de) 1989-03-15
EP0307099B1 (de) 1994-05-25
EP0525824B1 (de) 1996-06-05
KR890004403A (ko) 1989-04-21
EP0525824A2 (de) 1993-02-03
EP0525824A3 (en) 1993-03-10
JPH084109B2 (ja) 1996-01-17
JPS6447052A (en) 1989-02-21
KR920003311B1 (ko) 1992-04-27

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