DE3884891T2 - Aktive Matrixzelle und deren Herstellungsverfahren. - Google Patents

Aktive Matrixzelle und deren Herstellungsverfahren.

Info

Publication number
DE3884891T2
DE3884891T2 DE88112172T DE3884891T DE3884891T2 DE 3884891 T2 DE3884891 T2 DE 3884891T2 DE 88112172 T DE88112172 T DE 88112172T DE 3884891 T DE3884891 T DE 3884891T DE 3884891 T2 DE3884891 T2 DE 3884891T2
Authority
DE
Germany
Prior art keywords
manufacturing process
active matrix
matrix cell
cell
active
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE88112172T
Other languages
English (en)
Other versions
DE3884891D1 (de
Inventor
Kinya Kato
Nobuhiko Kakuda
Noboru Naito
Tsutomu Wada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP62192341A external-priority patent/JPH0797191B2/ja
Priority claimed from JP62322983A external-priority patent/JPH01165127A/ja
Priority claimed from JP62329956A external-priority patent/JPH01173646A/ja
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Application granted granted Critical
Publication of DE3884891D1 publication Critical patent/DE3884891D1/de
Publication of DE3884891T2 publication Critical patent/DE3884891T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136259—Repairing; Defects
    • G02F1/136263—Line defects
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G02F1/13629—Multilayer wirings
DE88112172T 1987-07-31 1988-07-27 Aktive Matrixzelle und deren Herstellungsverfahren. Expired - Fee Related DE3884891T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP62192341A JPH0797191B2 (ja) 1987-07-31 1987-07-31 アクティブマトリクスセルおよびその製作方法
JP62322983A JPH01165127A (ja) 1987-12-22 1987-12-22 表面平坦化法
JP62329956A JPH01173646A (ja) 1987-12-28 1987-12-28 薄膜トランジスタ製作法

Publications (2)

Publication Number Publication Date
DE3884891D1 DE3884891D1 (de) 1993-11-18
DE3884891T2 true DE3884891T2 (de) 1994-05-05

Family

ID=27326598

Family Applications (1)

Application Number Title Priority Date Filing Date
DE88112172T Expired - Fee Related DE3884891T2 (de) 1987-07-31 1988-07-27 Aktive Matrixzelle und deren Herstellungsverfahren.

Country Status (3)

Country Link
US (1) US4918504A (de)
EP (1) EP0304657B1 (de)
DE (1) DE3884891T2 (de)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0217406B1 (de) * 1985-10-04 1992-06-10 Hosiden Corporation Dünnfilmtransistor und Verfahren zu seiner Herstellung
US4960719A (en) * 1988-02-04 1990-10-02 Seikosha Co., Ltd. Method for producing amorphous silicon thin film transistor array substrate
GB2220792B (en) * 1988-07-13 1991-12-18 Seikosha Kk Silicon thin film transistor and method for producing the same
JP2600929B2 (ja) * 1989-01-27 1997-04-16 松下電器産業株式会社 液晶画像表示装置およびその製造方法
JP3009438B2 (ja) * 1989-08-14 2000-02-14 株式会社日立製作所 液晶表示装置
FR2651371B1 (fr) * 1989-08-29 1991-10-18 France Etat Procede de realisation d'un ecran d'affichage a matrice active et a structure inversee.
US5498573A (en) * 1989-11-29 1996-03-12 General Electric Company Method of making multi-layer address lines for amorphous silicon liquid crystal display devices
JP3024661B2 (ja) * 1990-11-09 2000-03-21 セイコーエプソン株式会社 アクティブマトリクス基板及びその製造方法
JP2999271B2 (ja) * 1990-12-10 2000-01-17 株式会社半導体エネルギー研究所 表示装置
DE4242408C2 (de) * 1991-12-11 1998-02-26 Mitsubishi Electric Corp Verfahren zum Verbinden eines Schaltkreissubstrates mit einem Halbleiterteil
KR100195269B1 (ko) * 1995-12-22 1999-06-15 윤종용 액정표시장치의 제조방법
US6080606A (en) * 1996-03-26 2000-06-27 The Trustees Of Princeton University Electrophotographic patterning of thin film circuits
KR100269520B1 (ko) * 1997-07-29 2000-10-16 구본준 박막트랜지스터, 액정표시장치와 그 제조방법
US6656779B1 (en) * 1998-10-06 2003-12-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor apparatus having semiconductor circuits made of semiconductor devices, and method of manufacture thereof
GB9929615D0 (en) * 1999-12-15 2000-02-09 Koninkl Philips Electronics Nv Method of manufacturing an active matrix device
US6509616B2 (en) * 2000-09-29 2003-01-21 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and its manufacturing method
KR100750872B1 (ko) * 2001-01-18 2007-08-22 엘지.필립스 엘시디 주식회사 액정표장치용 어레이기판과 그 제조방법
US7223641B2 (en) * 2004-03-26 2007-05-29 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, method for manufacturing the same, liquid crystal television and EL television
DE502005010610D1 (de) * 2005-02-21 2011-01-13 Gigaset Communications Gmbh Aktiv-Matrix-Struktur für eine Anzeigevorrichtung und Verfahren zu deren Herstellung
US20080207077A1 (en) * 2007-02-26 2008-08-28 3M Innovative Properties Company Fabrication of backplanes allowing relaxed alignment tolerance
US7629206B2 (en) * 2007-02-26 2009-12-08 3M Innovative Properties Company Patterning self-aligned transistors using back surface illumination
US20080205010A1 (en) * 2007-02-26 2008-08-28 3M Innovative Properties Company Active matrix backplanes allowing relaxed alignment tolerance
US8188577B2 (en) * 2007-08-01 2012-05-29 Sharp Kabushiki Kaisha Production method of semiconductor device, semiconductor device, and exposure apparatus
CN102822978B (zh) 2010-03-12 2015-07-22 株式会社半导体能源研究所 半导体装置及其制造方法
JP5717546B2 (ja) 2011-06-01 2015-05-13 三菱電機株式会社 薄膜トランジスタ基板およびその製造方法
JP2015012048A (ja) 2013-06-27 2015-01-19 三菱電機株式会社 アクティブマトリクス基板およびその製造方法
JP6315966B2 (ja) 2013-12-11 2018-04-25 三菱電機株式会社 アクティブマトリックス基板およびその製造方法
CN109597256A (zh) * 2018-12-29 2019-04-09 深圳市华星光电半导体显示技术有限公司 阵列基板及其制备方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4368085A (en) * 1979-10-15 1983-01-11 Rockwell International Corporation SOS island edge passivation structure
US4389481A (en) * 1980-06-02 1983-06-21 Xerox Corporation Method of making planar thin film transistors, transistor arrays
DE3380285D1 (en) * 1982-03-26 1989-08-31 Fujitsu Ltd Mos semiconductor device and method of producing the same
JPS6045219A (ja) * 1983-08-23 1985-03-11 Toshiba Corp アクテイブマトリクス型表示装置
FR2553579B1 (fr) * 1983-10-12 1985-12-27 Commissariat Energie Atomique Procede de fabrication d'un transistor en film mince a grille auto-alignee
FR2566583B1 (fr) * 1984-06-22 1986-09-19 Thomson Csf Procede de fabrication d'au moins un transistor a effet de champ en couche mince, et transistor obtenu par ce procede
JPH0616506B2 (ja) * 1984-12-26 1994-03-02 株式会社半導体エネルギー研究所 積層体の側周辺に選択的に被膜を形成する方法
JPH0654782B2 (ja) * 1985-02-08 1994-07-20 セイコー電子工業株式会社 薄膜トランジスタ装置の製造方法
JPS61201469A (ja) * 1985-03-05 1986-09-06 Oki Electric Ind Co Ltd 薄膜トランジスタ及びその製造方法
DE3640174A1 (de) * 1985-11-27 1987-06-04 Sharp Kk Duennfilm-transistor-anordnung
JPH0622245B2 (ja) * 1986-05-02 1994-03-23 富士ゼロックス株式会社 薄膜トランジスタの製造方法

Also Published As

Publication number Publication date
EP0304657A2 (de) 1989-03-01
EP0304657A3 (en) 1989-07-05
EP0304657B1 (de) 1993-10-13
DE3884891D1 (de) 1993-11-18
US4918504A (en) 1990-04-17

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee