DE4104981C1 - Differential amplifier circuit for HF mixer - uses two complementary transistor pairs with common connection of emitters, and collectors connected via capacitors - Google Patents

Abstract

The circuit has two transistor pairs, each having two complementary transistors (T1,T3, and T2,T4). The emitters (or the sources) of these transistors are connected together through a common node point (P1 and P2). There is an input voltage source (UIN) which controls the bases (or gates) of both the transistors of a pair through a node point (P3 and P4). The differential amplifier stage of a multiplying HF mixing circuit and the collectors (or drains) of the transistors of a pair are connected together through capacitors (C1,C2) so that the difference (deltaI) is formed from the difference between the collector (or drain) currents (I1-I3 and I2-I4) of the transistors of a pair. USE/ADVANTAGE - In radio or television circuits. Dynamic range of differential amplifying stage is extended.

Description

For differential amplification of input signals, differential amplifier stages with two bipolar transistors of one polarity are usually used in an emitter circuit. The output voltage U _A of such a differential amplifier results in:

where I₁ is the source current of the current source, R _C the collector resistance of the transistor, U _IN the input voltage and U _T the temperature voltage. The circuit is linear only in the areas where the tanh function can be linearized with a small error; since the temperature voltage U _T is approximately 26 mV under ambient conditions, the linearity range comprises only a few millivolts. The linearity range can be increased by inserting emitter resistors into the emitter line of the two differential amplifier transistors; a disadvantage of this circuit, however, is that the emitter resistors have a certain voltage requirement and increase the noise of the circuit.

From DE-AS 24 16 534 is a circuit arrangement known according to the preamble of claim 1; this transistor designed as a push-pull circuit  circuit is for reversing the current direction in one Provides consumers and becomes more logical to control Circuits operated digitally.

The invention has for its object a scarf arrangement according to the preamble of the patent to specify claim 1, with a significant extent tion of the dynamic range of a differential amplifier stage can be achieved.

This object is achieved by the features solved in the characterizing part of claim 1.

Advantageous further developments of the invention result from the subclaims.

The circuit arrangement according to the invention is as a dif limit amplifier stage of a multiplicative high-frequency Mixing stage designed at which the collectors or Drains of the transistors of a transistor pair of two complementary transistors over capacitors are connected. This will make the relationship between the output voltage and the input voltage modified; this modification is with an improvement linked to the linearity of the circuit arrangement, so that the dynamic range of the differential amplifier level is increased considerably.

As the concrete calculation shows, the difference is the collector currents or drain currents of the transistors of a transistor pair and from these differential currents again formed the difference:

• - With complementary bipolar transistors results out of it as a functional dependency output voltage is a sin-  Function; this is substantially linear than that tanh curve according to equation (1), moreover the Output voltage no longer through the source current limited the emitter source. To the Stei again Linearization can reduce emitter resistances be used.
• - With complementary field effect transistors results become a linear relationship between the output voltage and the input voltage, so that already an ideal linear amplifier is present.

The circuit according to the invention will also be described with reference to FIGS. 1 to 3.

In Fig. 1, the basic circuit diagram of the circuit arrangement for the case of bipolar transistors is provided. Figs. 2 and 3 show comparisons between a conventional differential amplifier stage and the circuit arrangement according to the invention; in Fig. 2, the output voltage is voltage across the input chip and applied input voltage in FIG. 3, the distortion factor over the A.

According to FIG. 1, the first pair of transistors comprises the NPN transistor T₁ and the PNP transistor T₃, the second pair of transistors the NPN transistor T₂ and the PNP-Tran sistor T₄, wherein the to transistors T₁ to T₄ kor respondierenden collector currents of I₁ until I₄ are designated. The emitters of the transistors T₁ and T₃ of the first transistor pair are connected at a node P₁ and the emitters of the transistors T₂ and T₄ of the second transistor pair at a node P₂. With R _E the - optionally usable - emitter resistor is designated, which is then arranged between the two nodes P₁ and P₂; U _B is the base bias of the transistors T₁ to T₄, the input voltage source U _IN controls the bases of the transistors T₁, T₃ and T₂, T₄ of a transistor pair, which are connected to each other at a node P₃ or P₄.

Assuming R _E = 0 and with the same transistors T₁ to T₄ - in particular the same saturation current - the following relationship for the currents I₁ to I₄ can be derived from the transistor equations:

where I₀ is the collector bias current of the transistors predetermined by the base bias U _B. The output voltage U _A can be tapped at a resistor R _C and results in: U _A = R _C · ΔI.

When the four currents I₁ to I₄ according to equation (2) are linked, an increase in linearity can be achieved by the much more linear course of the sinh function compared to the tanh function, which linearity can be increased further by an emitter resistor R _E.

For the case not shown in the figures that as transistors of the differential amplifier stage field effect If transistors are used, the following results corresponding to equation (2) above - already inherently linear without source resistance - relationship:

if the drain current I _{D of} each transistor can be described by I _D = B * W / L * (U _GS -U _th ) ². B is the steepness factor, W / L is the channel-width-length ratio and U _{th is} the threshold voltage.

According to the Fig. 1, resulting from the equation (2) or equation (3) difference relationship is realized in that the collectors of the two transistors T₁, T₃ or T₂, T₄ a pair of transistors each via a capacitor C₁ or C₂ are connected. For alternating currents, the difference between the collector currents (I₁- I₃) - (I₂-I₄) or, in the case of field effect transistors, the difference between the drain currents is formed; From the output voltage U _A can be tapped at the collector resistors R _C.

Fig. 2 shows a comparison between a DC transmission curve in a differential amplifier circuit according to the prior art - curve (a) - and a transmission curve of the circuit according to the invention - curve (b) -, with an identical emitter resistance R _E assumed for both circuits has been. The improvement of the linearization compared to a conventional amplifier circuit is significant; in the case of large modulations, the emitter resistor acts as an element preventing the limitation.

In Fig. 3 is a comparison of the Klirrfak is tors k as a function of the input voltage U _E is a circuit according to the prior art - plotted curve k _S - and a circuit according to the invention - - curve _E k; a clear improvement in the linearity, which is manifested in the distortion factor, can also be derived from this.

The circuit arrangement according to the invention is in mixed stages used for high-frequency circuits. At  for example, it is possible to use a differential amplifier to replace the classic Gilbert structure, so to speak to get a mixer of the highest linearity, what in view of increasing transmitter density in broadcasting and Television networks is paramount.

Claims (4)

1. Circuit arrangement with two, each two complementary transistors (T₁, T₃ or T₂, T₄) having transistor pairs, the emitters or sources of all transistors (T₁, T₂, T₃, T₄) via a common node (P₁ or P₂ ) are connected to each other, and an input voltage source (U _IN ) is provided, each of which bases or gates of the two transistors (T₁, T₃ or T₂, T₄) of a pair of transistors via a node (P₃ or P₄) controls, characterized in that the circuit arrangement is designed as a differential amplifier stage of a multiplicative high-frequency mixing stage, and that the collectors or drains of the transistors of a pair of transistors (T₁, T₃ or T₂, T₄) mitein such capacitors (C₁, C₂) are connected that the difference (ΔI) from the difference of the collector currents or drain currents (I₁-I₃ and I₂-I₄) of the transistors of a pair of transistors (T₁, T₃ or . T₂, T₄) is formed. 2. Circuit arrangement according to claim 1, characterized in that an emitter resistor or source resistor (R _E ) is provided which points between the two nodes (P₁ or P₂), to which the emitter or sources of the transistors is connected Transistor pairs (T₁, T₃ or T₂, T₄) are interconnected. 3. Circuit arrangement according to claim 1 or 2, characterized characterized in that the transistors (T₁, T₂, T₃, T₄) Are bipolar transistors. 4. Circuit arrangement according to claim 1 or 2, characterized characterized in that the transistors (T₁, T₂, T₃, T₄) Field effect transistors are.