DE60011797D1 - Ausführung von mehreren fäden in einem parallelprozessor - Google Patents

Ausführung von mehreren fäden in einem parallelprozessor

Info

Publication number
DE60011797D1
DE60011797D1 DE60011797T DE60011797T DE60011797D1 DE 60011797 D1 DE60011797 D1 DE 60011797D1 DE 60011797 T DE60011797 T DE 60011797T DE 60011797 T DE60011797 T DE 60011797T DE 60011797 D1 DE60011797 D1 DE 60011797D1
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DE
Germany
Prior art keywords
memory
references
processor
execution
parallel processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60011797T
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English (en)
Other versions
DE60011797T2 (de
Inventor
Debra Bernstein
F Hooper
J Adiletta
Gilbert Wolrich
William Wheeler
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
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Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of DE60011797D1 publication Critical patent/DE60011797D1/de
Publication of DE60011797T2 publication Critical patent/DE60011797T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098Register arrangements
    • G06F9/3012Organisation of register space, e.g. banked or distributed register file
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30076Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098Register arrangements
    • G06F9/3012Organisation of register space, e.g. banked or distributed register file
    • G06F9/30123Organisation of register space, e.g. banked or distributed register file according to context, e.g. thread buffers
    • G06F9/30127Register windows
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
DE60011797T 1999-08-31 2000-08-17 Ausführung von mehreren fäden in einem parallelprozessor Expired - Lifetime DE60011797T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US387046 1999-08-31
US09/387,046 US6668317B1 (en) 1999-08-31 1999-08-31 Microengine for parallel processor architecture
PCT/US2000/022650 WO2001016718A1 (en) 1999-08-31 2000-08-17 Execution of multiple threads in a parallel processor

Publications (2)

Publication Number Publication Date
DE60011797D1 true DE60011797D1 (de) 2004-07-29
DE60011797T2 DE60011797T2 (de) 2005-07-14

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
DE60011797T Expired - Lifetime DE60011797T2 (de) 1999-08-31 2000-08-17 Ausführung von mehreren fäden in einem parallelprozessor

Country Status (9)

Country Link
US (2) US6668317B1 (de)
EP (1) EP1221086B1 (de)
CN (2) CN100378655C (de)
AT (1) ATE269988T1 (de)
AU (1) AU7061600A (de)
CA (1) CA2383384A1 (de)
DE (1) DE60011797T2 (de)
HK (1) HK1049719B (de)
WO (1) WO2001016718A1 (de)

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DE60011797T2 (de) 2005-07-14
US7191321B2 (en) 2007-03-13
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EP1221086A1 (de) 2002-07-10
CN101221493A (zh) 2008-07-16
EP1221086B1 (de) 2004-06-23
CN100378655C (zh) 2008-04-02
HK1049719B (zh) 2008-11-21
AU7061600A (en) 2001-03-26
US6668317B1 (en) 2003-12-23
CA2383384A1 (en) 2001-03-08
ATE269988T1 (de) 2004-07-15

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