DE60035179D1 - Struktur zur elektrischen Verbindung eines ersten mit einem darüberliegenden zweiten Halbleitermaterial, diese elektrische Verbindung verwendendes Komposit und ihre Herstellung - Google Patents
Struktur zur elektrischen Verbindung eines ersten mit einem darüberliegenden zweiten Halbleitermaterial, diese elektrische Verbindung verwendendes Komposit und ihre HerstellungInfo
- Publication number
- DE60035179D1 DE60035179D1 DE60035179T DE60035179T DE60035179D1 DE 60035179 D1 DE60035179 D1 DE 60035179D1 DE 60035179 T DE60035179 T DE 60035179T DE 60035179 T DE60035179 T DE 60035179T DE 60035179 D1 DE60035179 D1 DE 60035179D1
- Authority
- DE
- Germany
- Prior art keywords
- preparation
- electrical connection
- semiconductor material
- electrically connecting
- lying above
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00222—Integrating an electronic processing unit with a micromechanical structure
- B81C1/00238—Joining a substrate with an electronic processing unit and a substrate with a micromechanical structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C2201/00—Manufacture or treatment of microstructural devices or systems
- B81C2201/01—Manufacture or treatment of microstructural devices or systems in or on a substrate
- B81C2201/0174—Manufacture or treatment of microstructural devices or systems in or on a substrate for making multi-layered devices, film deposition or growing
- B81C2201/019—Bonding or gluing multiple substrate layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05571—Disposition the external layer being disposed in a recess of the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05573—Single external layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06541—Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP00830314A EP1151962B1 (de) | 2000-04-28 | 2000-04-28 | Struktur zur elektrischen Verbindung eines ersten mit einem darüberliegenden zweiten Halbleitermaterial, diese elektrische Verbindung verwendendes Komposit und ihre Herstellung |
Publications (2)
Publication Number | Publication Date |
---|---|
DE60035179D1 true DE60035179D1 (de) | 2007-07-26 |
DE60035179T2 DE60035179T2 (de) | 2008-02-21 |
Family
ID=8175304
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60035179T Expired - Lifetime DE60035179T2 (de) | 2000-04-28 | 2000-04-28 | Struktur zur elektrischen Verbindung eines ersten mit einem darüberliegenden zweiten Halbleitermaterial, diese elektrische Verbindung verwendendes Komposit und ihre Herstellung |
Country Status (4)
Country | Link |
---|---|
US (2) | US6504253B2 (de) |
EP (1) | EP1151962B1 (de) |
JP (1) | JP4970662B2 (de) |
DE (1) | DE60035179T2 (de) |
Families Citing this family (68)
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US7271489B2 (en) | 2003-10-15 | 2007-09-18 | Megica Corporation | Post passivation interconnection schemes on top of the IC chips |
US6867501B2 (en) * | 2001-11-01 | 2005-03-15 | Rohm Co., Ltd. | Semiconductor device and method for manufacturing same |
EP1312580B1 (de) * | 2001-11-16 | 2007-01-24 | STMicroelectronics S.r.l. | Verfahren zur Versiegelung von Mikrostrukturen enthaltenden Bauelementen |
US6593651B1 (en) * | 2002-01-30 | 2003-07-15 | Endevco Corporation | Terminals for multi-layer devices |
US6975016B2 (en) | 2002-02-06 | 2005-12-13 | Intel Corporation | Wafer bonding using a flexible bladder press and thinned wafers for three-dimensional (3D) wafer-to-wafer vertical stack integration, and application thereof |
US6887769B2 (en) * | 2002-02-06 | 2005-05-03 | Intel Corporation | Dielectric recess for wafer-to-wafer and die-to-die metal bonding and method of fabricating the same |
US6661085B2 (en) * | 2002-02-06 | 2003-12-09 | Intel Corporation | Barrier structure against corrosion and contamination in three-dimensional (3-D) wafer-to-wafer vertical stack |
DE10205026C1 (de) * | 2002-02-07 | 2003-05-28 | Bosch Gmbh Robert | Halbleitersubstrat mit einem elektrisch isolierten Bereich, insbesondere zur Vertikalintegration |
US6762076B2 (en) | 2002-02-20 | 2004-07-13 | Intel Corporation | Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devices |
EP2560199B1 (de) | 2002-04-05 | 2016-08-03 | STMicroelectronics S.r.l. | Verfahren zum Herstellen einer durchisolierten Verbindung in einem Körper aus einem Halbleitermaterial |
US6992399B2 (en) * | 2002-05-24 | 2006-01-31 | Northrop Grumman Corporation | Die connected with integrated circuit component for electrical signal passing therebetween |
DE60223136D1 (de) | 2002-06-20 | 2007-12-06 | St Microelectronics Srl | Mikroelektromechanisches Bauelement, insbesondere Mikroaktor für Festplatteneinheiten, und Verfahren zu dessen Herstellung |
JP3529050B2 (ja) * | 2002-07-12 | 2004-05-24 | 沖電気工業株式会社 | 半導体装置の製造方法 |
US7317232B2 (en) * | 2002-10-22 | 2008-01-08 | Cabot Microelectronics Corporation | MEM switching device |
US6835589B2 (en) * | 2002-11-14 | 2004-12-28 | International Business Machines Corporation | Three-dimensional integrated CMOS-MEMS device and process for making the same |
US20040124509A1 (en) * | 2002-12-28 | 2004-07-01 | Kim Sarah E. | Method and structure for vertically-stacked device contact |
US7064055B2 (en) | 2002-12-31 | 2006-06-20 | Massachusetts Institute Of Technology | Method of forming a multi-layer semiconductor structure having a seamless bonding interface |
US7307003B2 (en) | 2002-12-31 | 2007-12-11 | Massachusetts Institute Of Technology | Method of forming a multi-layer semiconductor structure incorporating a processing handle member |
US20040124538A1 (en) * | 2002-12-31 | 2004-07-01 | Rafael Reif | Multi-layer integrated semiconductor structure |
ITTO20030269A1 (it) * | 2003-04-08 | 2004-10-09 | St Microelectronics Srl | Procedimento per la fabbricazione di un dispositivo |
FR2856844B1 (fr) * | 2003-06-24 | 2006-02-17 | Commissariat Energie Atomique | Circuit integre sur puce de hautes performances |
US7397968B2 (en) * | 2003-10-29 | 2008-07-08 | Hewlett-Packard Development Company, L.P. | System and method for tone composition |
US20050170609A1 (en) * | 2003-12-15 | 2005-08-04 | Alie Susan A. | Conductive bond for through-wafer interconnect |
US7034393B2 (en) * | 2003-12-15 | 2006-04-25 | Analog Devices, Inc. | Semiconductor assembly with conductive rim and method of producing the same |
JP4353845B2 (ja) * | 2004-03-31 | 2009-10-28 | 富士通株式会社 | 半導体装置の製造方法 |
US7608534B2 (en) * | 2004-06-02 | 2009-10-27 | Analog Devices, Inc. | Interconnection of through-wafer vias using bridge structures |
US7183622B2 (en) * | 2004-06-30 | 2007-02-27 | Intel Corporation | Module integrating MEMS and passive components |
US7087538B2 (en) * | 2004-08-16 | 2006-08-08 | Intel Corporation | Method to fill the gap between coupled wafers |
US7332808B2 (en) * | 2005-03-30 | 2008-02-19 | Sanyo Electric Co., Ltd. | Semiconductor module and method of manufacturing the same |
EP1707931B1 (de) * | 2005-03-31 | 2013-03-27 | STMicroelectronics Srl | Analoge Dateneingabevorrichtung versehen mit einem mikroelektromechanischem Drucksensor |
TW200644165A (en) * | 2005-05-04 | 2006-12-16 | Icemos Technology Corp | Silicon wafer having through-wafer vias |
CN101589543B (zh) | 2005-05-18 | 2012-10-31 | 科隆科技公司 | 微机电换能器 |
US8247945B2 (en) | 2005-05-18 | 2012-08-21 | Kolo Technologies, Inc. | Micro-electro-mechanical transducers |
CA2608164A1 (en) | 2005-06-17 | 2006-12-21 | Kolo Technologies, Inc. | Micro-electro-mechanical transducer having an insulation extension |
EP1762925B1 (de) | 2005-09-09 | 2016-12-21 | STMicroelectronics Srl | Analoge Eingabevorrichtung mit integriertem Druckaufnehmer und elektronisches Gerät ausgestattet mit einer solchen Eingabevorrichtung. |
EP2202791B1 (de) | 2005-11-16 | 2016-01-27 | STMicroelectronics Srl | Herstellungsprozess für "deep through vias" in einem Halbleiterbauelement |
US7663232B2 (en) * | 2006-03-07 | 2010-02-16 | Micron Technology, Inc. | Elongated fasteners for securing together electronic components and substrates, semiconductor device assemblies including such fasteners, and accompanying systems |
JP5011820B2 (ja) * | 2006-05-24 | 2012-08-29 | オムロン株式会社 | 積層デバイス、およびその製造方法 |
EP1873822A1 (de) * | 2006-06-27 | 2008-01-02 | STMicroelectronics S.r.l. | Vorder-Rückkontakte von elektrischen Vorrichtungen mit induzierten Defekten zur Erhöhung der Leitfähigkeit. |
KR100761468B1 (ko) * | 2006-07-13 | 2007-09-27 | 삼성전자주식회사 | 반도체 장치 및 그 형성 방법 |
JP2008073818A (ja) * | 2006-09-22 | 2008-04-03 | Murata Mfg Co Ltd | 電子部品および複合電子部品 |
US20080087979A1 (en) * | 2006-10-13 | 2008-04-17 | Analog Devices, Inc. | Integrated Circuit with Back Side Conductive Paths |
WO2008086530A2 (en) * | 2007-01-11 | 2008-07-17 | Analog Devices, Inc. | Mems sensor with cap electrode |
WO2008136316A1 (ja) * | 2007-04-26 | 2008-11-13 | Alps Electric Co., Ltd. | 積層基板構造体及びその製造方法 |
DE102009030958B4 (de) * | 2008-07-23 | 2014-01-23 | Infineon Technologies Ag | Halbleiteranordnung mit einem Verbindungselement und Verfahren zur Herstellung einer solchen |
DE102008041721B4 (de) * | 2008-08-29 | 2018-11-15 | Robert Bosch Gmbh | Verfahren zur Herstellung eines mikromechanischen Bauteils |
US7943411B2 (en) * | 2008-09-10 | 2011-05-17 | Analog Devices, Inc. | Apparatus and method of wafer bonding using compatible alloy |
US8956904B2 (en) | 2008-09-10 | 2015-02-17 | Analog Devices, Inc. | Apparatus and method of wafer bonding using compatible alloy |
JP4766143B2 (ja) * | 2008-09-15 | 2011-09-07 | 株式会社デンソー | 半導体装置およびその製造方法 |
CN102160185B (zh) * | 2008-09-22 | 2013-04-03 | 阿尔卑斯电气株式会社 | Mems传感器 |
FR2938970A1 (fr) * | 2008-11-26 | 2010-05-28 | St Microelectronics Rousset | Procede pour empiler et interconnecter des circuits integres |
DE102009015306B4 (de) * | 2009-03-27 | 2012-02-23 | Austriamicrosystems Ag | Verfahren zur Herstellung von MEMS-Bauelementen |
JP5304536B2 (ja) | 2009-08-24 | 2013-10-02 | ソニー株式会社 | 半導体装置 |
US7927919B1 (en) * | 2009-12-03 | 2011-04-19 | Powertech Technology Inc. | Semiconductor packaging method to save interposer |
US8322022B1 (en) | 2010-06-28 | 2012-12-04 | Western Digital (Fremont), Llc | Method for providing an energy assisted magnetic recording head in a wafer packaging configuration |
FR2964793B1 (fr) * | 2010-09-09 | 2014-04-11 | Ipdia | Dispositif d'interposition |
US8220140B1 (en) | 2010-09-13 | 2012-07-17 | Western Digital (Fremont), Llc | System for performing bonding a first substrate to a second substrate |
US8673756B2 (en) | 2011-04-14 | 2014-03-18 | Robert Bosch Gmbh | Out-of-plane spacer defined electrode |
US9409763B2 (en) * | 2012-04-04 | 2016-08-09 | Infineon Technologies Ag | MEMS device and method of making a MEMS device |
US9556016B2 (en) | 2012-08-20 | 2017-01-31 | Robert Bosch Gmbh | Capacitive MEMS sensor and method |
US10160632B2 (en) | 2012-08-21 | 2018-12-25 | Robert Bosch Gmbh | System and method for forming a buried lower electrode in conjunction with an encapsulated MEMS device |
US10183857B2 (en) | 2012-08-21 | 2019-01-22 | Robert Bosch Gmbh | MEMS pressure sensor with multiple membrane electrodes |
US9469522B2 (en) | 2013-03-15 | 2016-10-18 | Robert Bosch Gmbh | Epi-poly etch stop for out of plane spacer defined electrode |
US10549982B2 (en) | 2016-02-15 | 2020-02-04 | Stmicroelectronics S.R.L. | Pressure sensor encapsulated in elastomeric material, and system including the pressure sensor |
FR3058830B1 (fr) * | 2016-11-14 | 2018-11-30 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Procede de realisation collective d’une pluralite de puces optoelectroniques |
IT201900000917A1 (it) | 2019-01-22 | 2020-07-22 | St Microelectronics Srl | Metodo di fabbricazione di un componente integrato con occupazione spaziale migliorata, e componente integrato |
WO2023195132A1 (ja) * | 2022-04-07 | 2023-10-12 | 富士通株式会社 | 電子装置、電子システム及び電子装置の製造方法 |
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KR900008647B1 (ko) * | 1986-03-20 | 1990-11-26 | 후지쓰 가부시끼가이샤 | 3차원 집적회로와 그의 제조방법 |
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US5756395A (en) * | 1995-08-18 | 1998-05-26 | Lsi Logic Corporation | Process for forming metal interconnect structures for use with integrated circuit devices to form integrated circuit structures |
JP3920399B2 (ja) * | 1997-04-25 | 2007-05-30 | 株式会社東芝 | マルチチップ半導体装置用チップの位置合わせ方法、およびマルチチップ半導体装置の製造方法・製造装置 |
US6118181A (en) * | 1998-07-29 | 2000-09-12 | Agilent Technologies, Inc. | System and method for bonding wafers |
JP2001053178A (ja) * | 1999-06-02 | 2001-02-23 | Japan Radio Co Ltd | 電子回路装置が封止され回路基板に実装される電子部品及びその製造方法 |
US6228675B1 (en) * | 1999-07-23 | 2001-05-08 | Agilent Technologies, Inc. | Microcap wafer-level package with vias |
US6265246B1 (en) * | 1999-07-23 | 2001-07-24 | Agilent Technologies, Inc. | Microcap wafer-level package |
-
2000
- 2000-04-28 DE DE60035179T patent/DE60035179T2/de not_active Expired - Lifetime
- 2000-04-28 EP EP00830314A patent/EP1151962B1/de not_active Expired - Lifetime
-
2001
- 2001-04-27 JP JP2001132199A patent/JP4970662B2/ja not_active Expired - Lifetime
- 2001-04-27 US US09/844,180 patent/US6504253B2/en not_active Expired - Lifetime
-
2002
- 2002-05-21 US US10/153,473 patent/US6498053B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US20010038148A1 (en) | 2001-11-08 |
JP2002076269A (ja) | 2002-03-15 |
US6504253B2 (en) | 2003-01-07 |
EP1151962B1 (de) | 2007-06-13 |
DE60035179T2 (de) | 2008-02-21 |
EP1151962A1 (de) | 2001-11-07 |
JP4970662B2 (ja) | 2012-07-11 |
US20020135062A1 (en) | 2002-09-26 |
US6498053B2 (en) | 2002-12-24 |
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