DE602004015568D1 - Datenspekulation auf der basis der adressierung von mustern zur identifizierung von registern mit zweifachem zweck - Google Patents

Datenspekulation auf der basis der adressierung von mustern zur identifizierung von registern mit zweifachem zweck

Info

Publication number
DE602004015568D1
DE602004015568D1 DE602004015568T DE602004015568T DE602004015568D1 DE 602004015568 D1 DE602004015568 D1 DE 602004015568D1 DE 602004015568 T DE602004015568 T DE 602004015568T DE 602004015568 T DE602004015568 T DE 602004015568T DE 602004015568 D1 DE602004015568 D1 DE 602004015568D1
Authority
DE
Germany
Prior art keywords
tips
identification
double purpose
discussion based
addressing patterns
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE602004015568T
Other languages
English (en)
Inventor
James K Pickett
Benjamin Thomas Sander
Kevin Michael Lepak
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
GlobalFoundries Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of DE602004015568D1 publication Critical patent/DE602004015568D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842—Speculative instruction execution
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3824—Operand accessing
    • G06F9/383—Operand prefetching
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3824—Operand accessing
    • G06F9/383—Operand prefetching
    • G06F9/3832—Value prediction for operands; operand history buffers
DE602004015568T 2003-01-21 2004-01-09 Datenspekulation auf der basis der adressierung von mustern zur identifizierung von registern mit zweifachem zweck Expired - Lifetime DE602004015568D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/348,144 US7024537B2 (en) 2003-01-21 2003-01-21 Data speculation based on addressing patterns identifying dual-purpose register
PCT/US2004/000477 WO2004068341A1 (en) 2003-01-21 2004-01-09 Data speculation based on addressing patterns identifying dual-purpose register

Publications (1)

Publication Number Publication Date
DE602004015568D1 true DE602004015568D1 (de) 2008-09-18

Family

ID=32712491

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004015568T Expired - Lifetime DE602004015568D1 (de) 2003-01-21 2004-01-09 Datenspekulation auf der basis der adressierung von mustern zur identifizierung von registern mit zweifachem zweck

Country Status (8)

Country Link
US (1) US7024537B2 (de)
EP (1) EP1586029B1 (de)
JP (1) JP4538462B2 (de)
KR (1) KR101019224B1 (de)
CN (1) CN1742257B (de)
DE (1) DE602004015568D1 (de)
TW (1) TWI333629B (de)
WO (1) WO2004068341A1 (de)

Families Citing this family (43)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7366352B2 (en) * 2003-03-20 2008-04-29 International Business Machines Corporation Method and apparatus for performing fast closest match in pattern recognition
US7227994B2 (en) * 2003-03-20 2007-06-05 International Business Machines Corporation Method and apparatus for imbedded pattern recognition using dual alternating pointers
US7003629B1 (en) * 2003-07-08 2006-02-21 Advanced Micro Devices, Inc. System and method of identifying liveness groups within traces stored in a trace cache
US7133969B2 (en) * 2003-10-01 2006-11-07 Advanced Micro Devices, Inc. System and method for handling exceptional instructions in a trace cache based processor
US7555633B1 (en) 2003-11-03 2009-06-30 Advanced Micro Devices, Inc. Instruction cache prefetch based on trace cache eviction
US20050114627A1 (en) * 2003-11-26 2005-05-26 Jacek Budny Co-processing
US8069336B2 (en) * 2003-12-03 2011-11-29 Globalfoundries Inc. Transitioning from instruction cache to trace cache on label boundaries
US7213126B1 (en) 2004-01-12 2007-05-01 Advanced Micro Devices, Inc. Method and processor including logic for storing traces within a trace cache
US7197630B1 (en) 2004-04-12 2007-03-27 Advanced Micro Devices, Inc. Method and system for changing the executable status of an operation following a branch misprediction without refetching the operation
US7365007B2 (en) * 2004-06-30 2008-04-29 Intel Corporation Interconnects with direct metalization and conductive polymer
US7415597B2 (en) * 2004-09-08 2008-08-19 Advanced Micro Devices, Inc. Processor with dependence mechanism to predict whether a load is dependent on older store
US7870541B1 (en) * 2004-11-01 2011-01-11 Wind River Systems, Inc. Context tracing for software with a frame pointer and a stack pointer and with a stack pointer but without a frame pointer
US7831811B2 (en) * 2005-10-31 2010-11-09 Intel Corporation System and method for managing a register-based stack of operand tags
US7624253B2 (en) * 2006-10-25 2009-11-24 Arm Limited Determining register availability for register renaming
US7730289B2 (en) * 2007-09-27 2010-06-01 Faraday Technology Corp. Method for preloading data in a CPU pipeline
US8458671B1 (en) * 2008-02-12 2013-06-04 Tilera Corporation Method and system for stack back-tracing in computer programs
US20100070730A1 (en) * 2008-09-17 2010-03-18 Sebastian Pop Minimizing memory access conflicts of process communication channels
US8935574B2 (en) 2011-12-16 2015-01-13 Advanced Micro Devices, Inc. Correlating traces in a computing system
US8832500B2 (en) 2012-08-10 2014-09-09 Advanced Micro Devices, Inc. Multiple clock domain tracing
US8959398B2 (en) 2012-08-16 2015-02-17 Advanced Micro Devices, Inc. Multiple clock domain debug capability
US9411590B2 (en) * 2013-03-15 2016-08-09 Qualcomm Incorporated Method to improve speed of executing return branch instructions in a processor
US9164697B2 (en) * 2013-06-24 2015-10-20 Samsung Electronics Co., Ltd. Method and architecture for highly scalable data storage
US9524164B2 (en) * 2013-08-30 2016-12-20 Advanced Micro Devices, Inc. Specialized memory disambiguation mechanisms for different memory read access types
GB2518912B (en) * 2014-01-17 2015-08-26 Imagination Tech Ltd Stack pointer value prediction
CN107710153B (zh) * 2015-07-09 2022-03-01 森蒂彼得塞米有限公司 具有有效的存储器访问的处理器
US10162526B2 (en) * 2015-10-20 2018-12-25 Micron Technology, Inc. Logical address history management in memory device
US10157268B2 (en) * 2016-09-27 2018-12-18 Microsoft Technology Licensing, Llc Return flow guard using control stack identified by processor register
US10534609B2 (en) 2017-08-18 2020-01-14 International Business Machines Corporation Code-specific affiliated register prediction
US10908911B2 (en) 2017-08-18 2021-02-02 International Business Machines Corporation Predicting and storing a predicted target address in a plurality of selected locations
US10884745B2 (en) 2017-08-18 2021-01-05 International Business Machines Corporation Providing a predicted target address to multiple locations based on detecting an affiliated relationship
US10719328B2 (en) 2017-08-18 2020-07-21 International Business Machines Corporation Determining and predicting derived values used in register-indirect branching
US10884747B2 (en) 2017-08-18 2021-01-05 International Business Machines Corporation Prediction of an affiliated register
US11150904B2 (en) 2017-08-18 2021-10-19 International Business Machines Corporation Concurrent prediction of branch addresses and update of register contents
US10884746B2 (en) 2017-08-18 2021-01-05 International Business Machines Corporation Determining and predicting affiliated registers based on dynamic runtime control flow analysis
US11150908B2 (en) 2017-08-18 2021-10-19 International Business Machines Corporation Dynamic fusion of derived value creation and prediction of derived values in a subroutine branch sequence
US11061575B2 (en) 2017-09-19 2021-07-13 International Business Machines Corporation Read-only table of contents register
US10884929B2 (en) 2017-09-19 2021-01-05 International Business Machines Corporation Set table of contents (TOC) register instruction
US10705973B2 (en) 2017-09-19 2020-07-07 International Business Machines Corporation Initializing a data structure for use in predicting table of contents pointer values
US10725918B2 (en) 2017-09-19 2020-07-28 International Business Machines Corporation Table of contents cache entry having a pointer for a range of addresses
US10896030B2 (en) 2017-09-19 2021-01-19 International Business Machines Corporation Code generation relating to providing table of contents pointer values
US10620955B2 (en) 2017-09-19 2020-04-14 International Business Machines Corporation Predicting a table of contents pointer value responsive to branching to a subroutine
US10713050B2 (en) 2017-09-19 2020-07-14 International Business Machines Corporation Replacing Table of Contents (TOC)-setting instructions in code with TOC predicting instructions
US10185595B1 (en) * 2018-06-04 2019-01-22 Confia Systems, Inc. Program verification using hash chains

Family Cites Families (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5127103A (en) * 1987-10-14 1992-06-30 North American Philips Corporation Real-time tracing of dynamic local data in high level languages in the presence of process context switches
US5778219A (en) * 1990-12-14 1998-07-07 Hewlett-Packard Company Method and system for propagating exception status in data registers and for detecting exceptions from speculative operations with non-speculative operations
US5428807A (en) * 1993-06-17 1995-06-27 Digital Equipment Corporation Method and apparatus for propagating exception conditions of a computer system
US5584009A (en) * 1993-10-18 1996-12-10 Cyrix Corporation System and method of retiring store data from a write buffer
US6237082B1 (en) * 1995-01-25 2001-05-22 Advanced Micro Devices, Inc. Reorder buffer configured to allocate storage for instruction results corresponding to predefined maximum number of concurrently receivable instructions independent of a number of instructions received
US5892936A (en) * 1995-10-30 1999-04-06 Advanced Micro Devices, Inc. Speculative register file for storing speculative register states and removing dependencies between instructions utilizing the register
US6108769A (en) * 1996-05-17 2000-08-22 Advanced Micro Devices, Inc. Dependency table for reducing dependency checking hardware
US5832205A (en) * 1996-08-20 1998-11-03 Transmeta Corporation Memory controller for a microprocessor for detecting a failure of speculation on the physical nature of a component being addressed
US5781752A (en) * 1996-12-26 1998-07-14 Wisconsin Alumni Research Foundation Table based data speculation circuit for parallel processing computer
US6021485A (en) * 1997-04-10 2000-02-01 International Business Machines Corporation Forwarding store instruction result to load instruction with reduced stall or flushing by effective/real data address bytes matching
US5845103A (en) * 1997-06-13 1998-12-01 Wisconsin Alumni Research Foundation Computer with dynamic instruction reuse
US6065103A (en) * 1997-12-16 2000-05-16 Advanced Micro Devices, Inc. Speculative store buffer
US6044430A (en) * 1997-12-17 2000-03-28 Advanced Micro Devices Inc. Real time interrupt handling for superscalar processors
US6112296A (en) * 1997-12-18 2000-08-29 Advanced Micro Devices, Inc. Floating point stack manipulation using a register map and speculative top of stack values
US6175910B1 (en) * 1997-12-19 2001-01-16 International Business Machines Corportion Speculative instructions exection in VLIW processors
JPH11212788A (ja) * 1998-01-28 1999-08-06 Toshiba Corp プロセッサのデータ供給装置
US6202204B1 (en) * 1998-03-11 2001-03-13 Intel Corporation Comprehensive redundant load elimination for architectures supporting control and data speculation
US6108770A (en) * 1998-06-24 2000-08-22 Digital Equipment Corporation Method and apparatus for predicting memory dependence using store sets
US6463580B1 (en) * 1998-11-18 2002-10-08 Intel Corporation Parallel processing utilizing highly correlated data values
US6349382B1 (en) * 1999-03-05 2002-02-19 International Business Machines Corporation System for store forwarding assigning load and store instructions to groups and reorder queues to keep track of program order
US6658554B1 (en) * 1999-03-09 2003-12-02 Wisconsin Alumni Res Found Electronic processor providing direct data transfer between linked data consuming instructions
US6266744B1 (en) * 1999-05-18 2001-07-24 Advanced Micro Devices, Inc. Store to load forwarding using a dependency link file
US6662280B1 (en) 1999-11-10 2003-12-09 Advanced Micro Devices, Inc. Store buffer which forwards data based on index and optional way match
US6438673B1 (en) * 1999-12-30 2002-08-20 Intel Corporation Correlated address prediction
JP2001209535A (ja) * 2000-01-27 2001-08-03 Toshiba Corp プロセッサの命令スケジューリング装置
DE10121792C2 (de) * 2000-05-26 2003-09-25 Ibm Universelle Ladeadresse/Wertevorhersageschema
US7028166B2 (en) 2002-04-30 2006-04-11 Advanced Micro Devices, Inc. System and method for linking speculative results of load operations to register values

Also Published As

Publication number Publication date
KR20050089030A (ko) 2005-09-07
TWI333629B (en) 2010-11-21
JP2007504575A (ja) 2007-03-01
WO2004068341A1 (en) 2004-08-12
TW200422948A (en) 2004-11-01
JP4538462B2 (ja) 2010-09-08
CN1742257A (zh) 2006-03-01
CN1742257B (zh) 2010-04-28
KR101019224B1 (ko) 2011-03-04
US7024537B2 (en) 2006-04-04
EP1586029B1 (de) 2008-08-06
EP1586029A1 (de) 2005-10-19
US20040143721A1 (en) 2004-07-22

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: GLOBALFOUNDRIES, INC., GRAND CAYMANN, KY

8328 Change in the person/name/address of the agent

Representative=s name: GRUENECKER, KINKELDEY, STOCKMAIR & SCHWANHAEUSSER,