DE602004023209D1 - Verfahren und system zur optimierung von zuverlässigkeit und leistungsfähigkeit von programmierdaten in nichtflüchtigen speicherbausteinen - Google Patents

Verfahren und system zur optimierung von zuverlässigkeit und leistungsfähigkeit von programmierdaten in nichtflüchtigen speicherbausteinen

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Publication number
DE602004023209D1
DE602004023209D1 DE602004023209T DE602004023209T DE602004023209D1 DE 602004023209 D1 DE602004023209 D1 DE 602004023209D1 DE 602004023209 T DE602004023209 T DE 602004023209T DE 602004023209 T DE602004023209 T DE 602004023209T DE 602004023209 D1 DE602004023209 D1 DE 602004023209D1
Authority
DE
Germany
Prior art keywords
cell
optimizing
reliability
efficiency
volatile memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602004023209T
Other languages
English (en)
Inventor
Amir Ronen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Western Digital Israel Ltd
Original Assignee
SanDisk IL Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SanDisk IL Ltd filed Critical SanDisk IL Ltd
Publication of DE602004023209D1 publication Critical patent/DE602004023209D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/349—Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
DE602004023209T 2003-07-30 2004-07-25 Verfahren und system zur optimierung von zuverlässigkeit und leistungsfähigkeit von programmierdaten in nichtflüchtigen speicherbausteinen Active DE602004023209D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US49220603P 2003-07-30 2003-07-30
PCT/IL2004/000679 WO2005010638A2 (en) 2003-07-30 2004-07-25 Method and system for optimizing reliability and performance of programming data in non-volatile memory devices

Publications (1)

Publication Number Publication Date
DE602004023209D1 true DE602004023209D1 (de) 2009-10-29

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004023209T Active DE602004023209D1 (de) 2003-07-30 2004-07-25 Verfahren und system zur optimierung von zuverlässigkeit und leistungsfähigkeit von programmierdaten in nichtflüchtigen speicherbausteinen

Country Status (6)

Country Link
US (2) US7437498B2 (de)
EP (2) EP2113844A1 (de)
KR (1) KR100963855B1 (de)
AT (1) ATE443330T1 (de)
DE (1) DE602004023209D1 (de)
WO (1) WO2005010638A2 (de)

Families Citing this family (102)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE602004023209D1 (de) * 2003-07-30 2009-10-29 Sandisk Il Ltd Verfahren und system zur optimierung von zuverlässigkeit und leistungsfähigkeit von programmierdaten in nichtflüchtigen speicherbausteinen
US7817469B2 (en) * 2004-07-26 2010-10-19 Sandisk Il Ltd. Drift compensation in a flash memory
US7957189B2 (en) 2004-07-26 2011-06-07 Sandisk Il Ltd. Drift compensation in a flash memory
AT8128U3 (de) * 2005-05-09 2006-09-15 Almir Bajramovic Zigarettenrauchabsaugsystem
US7269066B2 (en) 2005-05-11 2007-09-11 Micron Technology, Inc. Programming memory devices
US7283395B2 (en) * 2005-06-24 2007-10-16 Infineon Technologies Flash Gmbh & Co. Kg Memory device and method for operating the memory device
US7292473B2 (en) * 2005-09-07 2007-11-06 Freescale Semiconductor, Inc. Method and apparatus for programming/erasing a non-volatile memory
KR100719697B1 (ko) 2005-10-10 2007-05-17 주식회사 하이닉스반도체 플래시 메모리 소자의 프로그램 방법
US7397703B2 (en) * 2006-03-21 2008-07-08 Freescale Semiconductor, Inc. Non-volatile memory with controlled program/erase
WO2007132452A2 (en) 2006-05-12 2007-11-22 Anobit Technologies Reducing programming error in memory devices
WO2007132453A2 (en) 2006-05-12 2007-11-22 Anobit Technologies Ltd. Distortion estimation and cancellation in memory devices
WO2007132457A2 (en) * 2006-05-12 2007-11-22 Anobit Technologies Ltd. Combined distortion estimation and error correction coding for memory devices
WO2007132456A2 (en) * 2006-05-12 2007-11-22 Anobit Technologies Ltd. Memory device with adaptive capacity
US8060806B2 (en) 2006-08-27 2011-11-15 Anobit Technologies Ltd. Estimation of non-linear distortion in memory devices
JP5112666B2 (ja) * 2006-09-11 2013-01-09 株式会社日立製作所 移動装置
US7821826B2 (en) 2006-10-30 2010-10-26 Anobit Technologies, Ltd. Memory cell readout using successive approximation
WO2008053472A2 (en) * 2006-10-30 2008-05-08 Anobit Technologies Ltd. Reading memory cells using multiple thresholds
US7924648B2 (en) 2006-11-28 2011-04-12 Anobit Technologies Ltd. Memory power and performance management
WO2008068747A2 (en) * 2006-12-03 2008-06-12 Anobit Technologies Ltd. Automatic defect management in memory devices
US7900102B2 (en) * 2006-12-17 2011-03-01 Anobit Technologies Ltd. High-speed programming of memory devices
US7593263B2 (en) * 2006-12-17 2009-09-22 Anobit Technologies Ltd. Memory device with reduced reading latency
US8151166B2 (en) * 2007-01-24 2012-04-03 Anobit Technologies Ltd. Reduction of back pattern dependency effects in memory devices
US7751240B2 (en) 2007-01-24 2010-07-06 Anobit Technologies Ltd. Memory device with negative thresholds
WO2008111058A2 (en) * 2007-03-12 2008-09-18 Anobit Technologies Ltd. Adaptive estimation of memory cell read thresholds
US7904793B2 (en) * 2007-03-29 2011-03-08 Sandisk Corporation Method for decoding data in non-volatile storage using reliability metrics based on multiple reads
US8001320B2 (en) * 2007-04-22 2011-08-16 Anobit Technologies Ltd. Command interface for memory devices
US7679961B2 (en) 2007-04-25 2010-03-16 Micron Technology, Inc. Programming and/or erasing a memory device in response to its program and/or erase history
US8429493B2 (en) 2007-05-12 2013-04-23 Apple Inc. Memory device with internal signap processing unit
US8234545B2 (en) * 2007-05-12 2012-07-31 Apple Inc. Data storage with incremental redundancy
US7925936B1 (en) 2007-07-13 2011-04-12 Anobit Technologies Ltd. Memory device with non-uniform programming levels
US8259497B2 (en) 2007-08-06 2012-09-04 Apple Inc. Programming schemes for multi-level analog memory cells
KR101413736B1 (ko) 2007-09-13 2014-07-02 삼성전자주식회사 향상된 신뢰성을 갖는 메모리 시스템 및 그것의웨어-레벨링 기법
US8174905B2 (en) * 2007-09-19 2012-05-08 Anobit Technologies Ltd. Programming orders for reducing distortion in arrays of multi-level analog memory cells
US7773413B2 (en) 2007-10-08 2010-08-10 Anobit Technologies Ltd. Reliable data storage in analog memory cells in the presence of temperature variations
US7970983B2 (en) * 2007-10-14 2011-06-28 Sandisk Il Ltd. Identity-based flash management
WO2009050703A2 (en) * 2007-10-19 2009-04-23 Anobit Technologies Data storage in analog memory cell arrays having erase failures
US8000141B1 (en) 2007-10-19 2011-08-16 Anobit Technologies Ltd. Compensation for voltage drifts in analog memory cells
US8068360B2 (en) * 2007-10-19 2011-11-29 Anobit Technologies Ltd. Reading analog memory cells using built-in multi-threshold commands
WO2009063450A2 (en) * 2007-11-13 2009-05-22 Anobit Technologies Optimized selection of memory units in multi-unit memory devices
US8225181B2 (en) 2007-11-30 2012-07-17 Apple Inc. Efficient re-read operations from memory devices
US8209588B2 (en) * 2007-12-12 2012-06-26 Anobit Technologies Ltd. Efficient interference cancellation in analog memory cell arrays
JP5032290B2 (ja) * 2007-12-14 2012-09-26 株式会社東芝 不揮発性半導体記憶装置
US8456905B2 (en) 2007-12-16 2013-06-04 Apple Inc. Efficient data storage in multi-plane memory devices
US8085586B2 (en) * 2007-12-27 2011-12-27 Anobit Technologies Ltd. Wear level estimation in analog memory cells
US8156398B2 (en) * 2008-02-05 2012-04-10 Anobit Technologies Ltd. Parameter estimation based on error correction code parity check equations
US7924587B2 (en) * 2008-02-21 2011-04-12 Anobit Technologies Ltd. Programming of analog memory cells using a single programming pulse per state transition
US7864573B2 (en) 2008-02-24 2011-01-04 Anobit Technologies Ltd. Programming analog memory cells for reduced variance after retention
US8230300B2 (en) * 2008-03-07 2012-07-24 Apple Inc. Efficient readout from analog memory cells using data compression
US8059457B2 (en) 2008-03-18 2011-11-15 Anobit Technologies Ltd. Memory device with multiple-accuracy read commands
US8400858B2 (en) 2008-03-18 2013-03-19 Apple Inc. Memory device with reduced sense time readout
US7995388B1 (en) 2008-08-05 2011-08-09 Anobit Technologies Ltd. Data storage using modified voltages
US7924613B1 (en) 2008-08-05 2011-04-12 Anobit Technologies Ltd. Data storage in analog memory cells with protection against programming interruption
JP2010040144A (ja) 2008-08-07 2010-02-18 Toshiba Corp 不揮発性半導体記憶システム
US8169825B1 (en) 2008-09-02 2012-05-01 Anobit Technologies Ltd. Reliable data storage in analog memory cells subjected to long retention periods
US8949684B1 (en) 2008-09-02 2015-02-03 Apple Inc. Segmented data storage
US8000135B1 (en) 2008-09-14 2011-08-16 Anobit Technologies Ltd. Estimation of memory cell read thresholds by sampling inside programming level distribution intervals
US8482978B1 (en) 2008-09-14 2013-07-09 Apple Inc. Estimation of memory cell read thresholds by sampling inside programming level distribution intervals
US8239734B1 (en) 2008-10-15 2012-08-07 Apple Inc. Efficient data storage in storage device arrays
US8261159B1 (en) 2008-10-30 2012-09-04 Apple, Inc. Data scrambling schemes for memory devices
KR101541442B1 (ko) * 2008-11-04 2015-08-03 삼성전자주식회사 메모리 및 프로세서를 포함하는 컴퓨팅 시스템
US8208304B2 (en) * 2008-11-16 2012-06-26 Anobit Technologies Ltd. Storage at M bits/cell density in N bits/cell analog memory cell devices, M>N
US8397131B1 (en) 2008-12-31 2013-03-12 Apple Inc. Efficient readout schemes for analog memory cell devices
US8248831B2 (en) * 2008-12-31 2012-08-21 Apple Inc. Rejuvenation of analog memory cells
US8924661B1 (en) 2009-01-18 2014-12-30 Apple Inc. Memory system including a controller and processors associated with memory devices
US8276042B2 (en) 2009-02-03 2012-09-25 Micron Technology, Inc. Determining sector status in a memory device
US8228701B2 (en) 2009-03-01 2012-07-24 Apple Inc. Selective activation of programming schemes in analog memory cell arrays
US8259506B1 (en) 2009-03-25 2012-09-04 Apple Inc. Database of memory read thresholds
US8832354B2 (en) * 2009-03-25 2014-09-09 Apple Inc. Use of host system resources by memory controller
US8238157B1 (en) 2009-04-12 2012-08-07 Apple Inc. Selective re-programming of analog memory cells
US8479080B1 (en) 2009-07-12 2013-07-02 Apple Inc. Adaptive over-provisioning in memory systems
US8495465B1 (en) 2009-10-15 2013-07-23 Apple Inc. Error correction coding over multiple memory pages
US8677054B1 (en) 2009-12-16 2014-03-18 Apple Inc. Memory management schemes for non-volatile memory devices
US8694814B1 (en) 2010-01-10 2014-04-08 Apple Inc. Reuse of host hibernation storage space by memory controller
US8677203B1 (en) 2010-01-11 2014-03-18 Apple Inc. Redundant data storage schemes for multi-die memory systems
US8694853B1 (en) 2010-05-04 2014-04-08 Apple Inc. Read commands for reading interfering memory cells
US8572423B1 (en) 2010-06-22 2013-10-29 Apple Inc. Reducing peak current in memory systems
US8595591B1 (en) 2010-07-11 2013-11-26 Apple Inc. Interference-aware assignment of programming levels in analog memory cells
US9104580B1 (en) 2010-07-27 2015-08-11 Apple Inc. Cache memory for hybrid disk drives
US8645794B1 (en) 2010-07-31 2014-02-04 Apple Inc. Data storage in analog memory cells using a non-integer number of bits per cell
US8856475B1 (en) 2010-08-01 2014-10-07 Apple Inc. Efficient selection of memory blocks for compaction
US8694854B1 (en) 2010-08-17 2014-04-08 Apple Inc. Read threshold setting based on soft readout statistics
US9021181B1 (en) 2010-09-27 2015-04-28 Apple Inc. Memory management for unifying memory cell conditions by using maximum time intervals
JP5364750B2 (ja) 2011-03-25 2013-12-11 株式会社東芝 メモリシステム、及び不揮発性メモリデバイスの制御方法
US9176862B2 (en) * 2011-12-29 2015-11-03 Sandisk Technologies Inc. SLC-MLC wear balancing
US10319460B2 (en) * 2013-08-14 2019-06-11 Infineon Technologies Ag Systems and methods utilizing a flexible read reference for a dynamic read window
US9594516B2 (en) 2014-02-14 2017-03-14 Sony Semiconductor Solutions Corporation Memory device with variable trim parameters
KR102248276B1 (ko) 2014-05-26 2021-05-07 삼성전자주식회사 스토리지 장치의 동작 방법
US9696918B2 (en) 2014-07-13 2017-07-04 Apple Inc. Protection and recovery from sudden power failure in non-volatile memory devices
DE102014115885B4 (de) * 2014-10-31 2018-03-08 Infineon Technologies Ag Funktionstüchtigkeitszustand von nicht-flüchtigem Speicher
KR102253592B1 (ko) 2014-12-23 2021-05-18 삼성전자주식회사 초기 문턱 전압 분포 변화를 보상할 수 있는 데이터 저장 장치, 이의 작동 방법, 및 이를 포함하는 데이터 처리 시스템
US11574691B2 (en) 2016-02-24 2023-02-07 Samsung Electronics Co., Ltd. Memory device and memory system
KR102458918B1 (ko) * 2016-02-24 2022-10-25 삼성전자주식회사 메모리 장치 및 메모리 시스템
US10140040B1 (en) 2017-05-25 2018-11-27 Micron Technology, Inc. Memory device with dynamic program-verify voltage calibration
US10402272B2 (en) * 2017-05-25 2019-09-03 Micron Technology, Inc. Memory device with dynamic programming calibration
US10452480B2 (en) 2017-05-25 2019-10-22 Micron Technology, Inc. Memory device with dynamic processing level calibration
US10566063B2 (en) 2018-05-16 2020-02-18 Micron Technology, Inc. Memory system with dynamic calibration using a trim management mechanism
US10600496B1 (en) 2018-10-18 2020-03-24 Micron Technology, Inc. Modifying memory bank operating parameters
KR102640951B1 (ko) * 2018-11-22 2024-02-26 에스케이하이닉스 주식회사 메모리 컨트롤러 및 그 동작 방법
US11138107B2 (en) 2020-02-20 2021-10-05 Micron Technology, Inc. Modifying subsets of memory bank operating parameters
US11605427B2 (en) 2021-01-04 2023-03-14 Taiwan Semiconductor Manufacturing Company Ltd. Memory device with write pulse trimming
US11556416B2 (en) 2021-05-05 2023-01-17 Apple Inc. Controlling memory readout reliability and throughput by adjusting distance between read thresholds
US11847342B2 (en) 2021-07-28 2023-12-19 Apple Inc. Efficient transfer of hard data and confidence levels in reading a nonvolatile memory

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5268870A (en) * 1988-06-08 1993-12-07 Eliyahou Harari Flash EEPROM system and intelligent programming and erasing methods therefor
US5270979A (en) * 1991-03-15 1993-12-14 Sundisk Corporation Method for optimum erasing of EEPROM
US6134148A (en) * 1997-09-30 2000-10-17 Hitachi, Ltd. Semiconductor integrated circuit and data processing system
EP0913832B1 (de) * 1997-11-03 2003-07-23 STMicroelectronics S.r.l. Verfahren zur Programmierung eines nichtflüchtigen Mehrpegelspeichers und nichtflüchtiger Mehrpegelspeicher
US6400638B1 (en) * 2000-02-25 2002-06-04 Advanced Micro Devices, Inc. Wordline driver for flash memory read mode
US6662263B1 (en) * 2000-03-03 2003-12-09 Multi Level Memory Technology Sectorless flash memory architecture
US6538922B1 (en) * 2000-09-27 2003-03-25 Sandisk Corporation Writable tracking cells
US6469931B1 (en) * 2001-01-04 2002-10-22 M-Systems Flash Disk Pioneers Ltd. Method for increasing information content in a computer memory
US6456528B1 (en) 2001-09-17 2002-09-24 Sandisk Corporation Selective operation of a multi-state non-volatile memory system in a binary mode
US6515909B1 (en) * 2001-10-05 2003-02-04 Micron Technology Inc. Flash memory device with a variable erase pulse
JP2003242787A (ja) * 2002-02-14 2003-08-29 Mitsubishi Electric Corp 不揮発性半導体記憶装置
US6751766B2 (en) * 2002-05-20 2004-06-15 Sandisk Corporation Increasing the effectiveness of error correction codes and operating multi-level memory systems by using information about the quality of the stored data
JP4050555B2 (ja) * 2002-05-29 2008-02-20 株式会社東芝 不揮発性半導体記憶装置およびそのデータ書き込み方法
US6877654B2 (en) * 2002-11-06 2005-04-12 Reliance Products Limited Partnership Disposable container for liquids with molded liner
US7372731B2 (en) * 2003-06-17 2008-05-13 Sandisk Il Ltd. Flash memories with adaptive reference voltages
DE602004023209D1 (de) * 2003-07-30 2009-10-29 Sandisk Il Ltd Verfahren und system zur optimierung von zuverlässigkeit und leistungsfähigkeit von programmierdaten in nichtflüchtigen speicherbausteinen
US6903972B2 (en) * 2003-07-30 2005-06-07 M-Systems Flash Disk Pioneers Ltd. Different methods applied for archiving data according to their desired lifetime

Also Published As

Publication number Publication date
KR20060054374A (ko) 2006-05-22
EP1654736A4 (de) 2007-04-18
US7437498B2 (en) 2008-10-14
KR100963855B1 (ko) 2010-06-16
EP2113844A1 (de) 2009-11-04
EP1654736B1 (de) 2009-09-16
US20090073769A1 (en) 2009-03-19
ATE443330T1 (de) 2009-10-15
EP1654736A2 (de) 2006-05-10
WO2005010638A2 (en) 2005-02-03
WO2005010638A3 (en) 2005-04-28
US20050024978A1 (en) 2005-02-03

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