DE602005017899D1 - Widerstandsvariabler speicherbaustein und herstellungsverfahren - Google Patents

Widerstandsvariabler speicherbaustein und herstellungsverfahren

Info

Publication number
DE602005017899D1
DE602005017899D1 DE602005017899T DE602005017899T DE602005017899D1 DE 602005017899 D1 DE602005017899 D1 DE 602005017899D1 DE 602005017899 T DE602005017899 T DE 602005017899T DE 602005017899 T DE602005017899 T DE 602005017899T DE 602005017899 D1 DE602005017899 D1 DE 602005017899D1
Authority
DE
Germany
Prior art keywords
variable memory
manufacturing
memory component
memory device
resistant variable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602005017899T
Other languages
English (en)
Inventor
Kristy A Campbell
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of DE602005017899D1 publication Critical patent/DE602005017899D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20Multistable switching devices, e.g. memristors
    • H10N70/24Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
    • H10N70/245Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies the species being metal cations, e.g. programmable metallization cells
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0009RRAM elements whose operation depends upon chemical change
    • G11C13/0011RRAM elements whose operation depends upon chemical change comprising conductive bridging RAM [CBRAM] or programming metallization cells [PMCs]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011Manufacture or treatment of multistable switching devices
    • H10N70/061Patterning of the switching material
    • H10N70/063Patterning of the switching material by etching of pre-deposited switching material layers, e.g. lithography
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801Constructional details of multistable switching devices
    • H10N70/821Device geometry
    • H10N70/826Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801Constructional details of multistable switching devices
    • H10N70/881Switching materials
    • H10N70/882Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
    • H10N70/8825Selenides, e.g. GeSe
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/90Bulk effect device making
DE602005017899T 2004-07-19 2005-07-14 Widerstandsvariabler speicherbaustein und herstellungsverfahren Active DE602005017899D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/893,299 US7190048B2 (en) 2004-07-19 2004-07-19 Resistance variable memory device and method of fabrication
PCT/US2005/024899 WO2006019845A1 (en) 2004-07-19 2005-07-14 Resistance variable memory device and method of fabrication

Publications (1)

Publication Number Publication Date
DE602005017899D1 true DE602005017899D1 (de) 2010-01-07

Family

ID=35285580

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602005017899T Active DE602005017899D1 (de) 2004-07-19 2005-07-14 Widerstandsvariabler speicherbaustein und herstellungsverfahren

Country Status (9)

Country Link
US (4) US7190048B2 (de)
EP (1) EP1769507B1 (de)
JP (2) JP5107037B2 (de)
KR (1) KR100917095B1 (de)
CN (1) CN100530432C (de)
AT (1) ATE450042T1 (de)
DE (1) DE602005017899D1 (de)
TW (1) TWI293509B (de)
WO (1) WO2006019845A1 (de)

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US20080073751A1 (en) * 2006-09-21 2008-03-27 Rainer Bruchhaus Memory cell and method of manufacturing thereof
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KR100990215B1 (ko) * 2008-07-17 2010-10-29 한국전자통신연구원 상변화 메모리 소자 및 그 제조 방법
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US8809829B2 (en) * 2009-06-15 2014-08-19 Macronix International Co., Ltd. Phase change memory having stabilized microstructure and manufacturing method
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US8227785B2 (en) * 2010-11-11 2012-07-24 Micron Technology, Inc. Chalcogenide containing semiconductors with chalcogenide gradient
CN102832338B (zh) * 2012-09-06 2015-10-07 中国科学院上海微系统与信息技术研究所 一种限制结构相变存储器及其制作方法
US20140293676A1 (en) * 2013-03-03 2014-10-02 Adesto Technologies Corporation Programmable impedance memory elements and corresponding methods
KR101431656B1 (ko) * 2013-04-05 2014-08-21 한국과학기술연구원 저머늄 및 셀레늄을 이용한 칼코지나이드 스위칭 소자 및 그 제조방법
JP6772124B2 (ja) * 2015-03-31 2020-10-21 ソニーセミコンダクタソリューションズ株式会社 スイッチ素子および記憶装置
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ATE450042T1 (de) 2009-12-15
US7282783B2 (en) 2007-10-16
JP5364762B2 (ja) 2013-12-11
JP2011258971A (ja) 2011-12-22
US20080164456A1 (en) 2008-07-10
US7348209B2 (en) 2008-03-25
WO2006019845A1 (en) 2006-02-23
KR100917095B1 (ko) 2009-09-15
JP2008507151A (ja) 2008-03-06
EP1769507B1 (de) 2009-11-25
CN100530432C (zh) 2009-08-19
CN101019191A (zh) 2007-08-15
EP1769507A1 (de) 2007-04-04
US20070138598A1 (en) 2007-06-21
US7190048B2 (en) 2007-03-13
KR20070034116A (ko) 2007-03-27
US20060289851A1 (en) 2006-12-28
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US20060012008A1 (en) 2006-01-19

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