DE68924206D1 - Verfahren und Einrichtung zum Filtern von Ungültigkeitserklärungsanforderungen. - Google Patents

Verfahren und Einrichtung zum Filtern von Ungültigkeitserklärungsanforderungen.

Info

Publication number
DE68924206D1
DE68924206D1 DE68924206T DE68924206T DE68924206D1 DE 68924206 D1 DE68924206 D1 DE 68924206D1 DE 68924206 T DE68924206 T DE 68924206T DE 68924206 T DE68924206 T DE 68924206T DE 68924206 D1 DE68924206 D1 DE 68924206D1
Authority
DE
Germany
Prior art keywords
invalidation requests
filtering
filtering invalidation
requests
invalidation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68924206T
Other languages
English (en)
Other versions
DE68924206T2 (de
Inventor
Rebecca L Stamm
Michael G Uhler
Hugh W Durdan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Digital Equipment Corp
Original Assignee
Digital Equipment Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Equipment Corp filed Critical Digital Equipment Corp
Publication of DE68924206D1 publication Critical patent/DE68924206D1/de
Application granted granted Critical
Publication of DE68924206T2 publication Critical patent/DE68924206T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0808Multiuser, multiprocessor or multiprocessing cache systems with cache invalidating means
DE68924206T 1988-06-27 1989-05-30 Verfahren und Einrichtung zum Filtern von Ungültigkeitserklärungsanforderungen. Expired - Fee Related DE68924206T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/212,416 US5058006A (en) 1988-06-27 1988-06-27 Method and apparatus for filtering invalidate requests

Publications (2)

Publication Number Publication Date
DE68924206D1 true DE68924206D1 (de) 1995-10-19
DE68924206T2 DE68924206T2 (de) 1996-05-15

Family

ID=22790922

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68924206T Expired - Fee Related DE68924206T2 (de) 1988-06-27 1989-05-30 Verfahren und Einrichtung zum Filtern von Ungültigkeitserklärungsanforderungen.

Country Status (5)

Country Link
US (1) US5058006A (de)
EP (1) EP0349122B1 (de)
JP (1) JP2662603B2 (de)
CA (1) CA1324221C (de)
DE (1) DE68924206T2 (de)

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US6070233A (en) * 1996-01-26 2000-05-30 Unisys Corporation Processor bus traffic optimization system for multi-level cache utilizing reflection status bit to indicate data inclusion in higher level cache
US5687348A (en) * 1996-01-29 1997-11-11 Unisys Corporation Variable-depth, self-regulating cache queue flushing system
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US5822763A (en) * 1996-04-19 1998-10-13 Ibm Corporation Cache coherence protocol for reducing the effects of false sharing in non-bus-based shared-memory multiprocessors
US5920892A (en) * 1996-08-26 1999-07-06 Unisys Corporation Method and system for inhibiting transfer of duplicate write addresses in multi-domain processor systems with cross-bus architecture to reduce cross-invalidation requests
US6065097A (en) * 1996-08-29 2000-05-16 Sun Microsystems, Inc. Apparatus and method for sharing a unified memory bus between external cache memory and primary memory
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Also Published As

Publication number Publication date
JPH0272452A (ja) 1990-03-12
EP0349122A3 (de) 1991-04-24
JP2662603B2 (ja) 1997-10-15
EP0349122A2 (de) 1990-01-03
US5058006A (en) 1991-10-15
CA1324221C (en) 1993-11-09
EP0349122B1 (de) 1995-09-13
DE68924206T2 (de) 1996-05-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee