DE69115983D1 - Schaltungen und Verfahren zur selektiven Umschaltung negativer Spannungen in integrierten CMOS-Schaltungen - Google Patents

Schaltungen und Verfahren zur selektiven Umschaltung negativer Spannungen in integrierten CMOS-Schaltungen

Info

Publication number
DE69115983D1
DE69115983D1 DE69115983T DE69115983T DE69115983D1 DE 69115983 D1 DE69115983 D1 DE 69115983D1 DE 69115983 T DE69115983 T DE 69115983T DE 69115983 T DE69115983 T DE 69115983T DE 69115983 D1 DE69115983 D1 DE 69115983D1
Authority
DE
Germany
Prior art keywords
circuits
methods
negative voltages
selective switching
integrated cmos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69115983T
Other languages
English (en)
Other versions
DE69115983T2 (de
Inventor
Giuliano Imondi
Giulio Marotta
Giulio Porrovecchio
Giuseppe Savarese
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of DE69115983D1 publication Critical patent/DE69115983D1/de
Application granted granted Critical
Publication of DE69115983T2 publication Critical patent/DE69115983T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/693—Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/12—Programming voltage switching circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
DE69115983T 1990-05-08 1991-05-07 Schaltungen und Verfahren zur selektiven Umschaltung negativer Spannungen in integrierten CMOS-Schaltungen Expired - Fee Related DE69115983T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT47927A IT1239781B (it) 1990-05-08 1990-05-08 Circuito e metodo per commutare selettivamente tensioni negative in circuiti integrati cmos

Publications (2)

Publication Number Publication Date
DE69115983D1 true DE69115983D1 (de) 1996-02-15
DE69115983T2 DE69115983T2 (de) 1996-06-27

Family

ID=11263411

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69115983T Expired - Fee Related DE69115983T2 (de) 1990-05-08 1991-05-07 Schaltungen und Verfahren zur selektiven Umschaltung negativer Spannungen in integrierten CMOS-Schaltungen

Country Status (5)

Country Link
US (1) US5319604A (de)
EP (1) EP0456623B1 (de)
JP (1) JP3155290B2 (de)
DE (1) DE69115983T2 (de)
IT (1) IT1239781B (de)

Families Citing this family (67)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5222040A (en) * 1990-12-11 1993-06-22 Nexcom Technology, Inc. Single transistor eeprom memory cell
JP2835215B2 (ja) * 1991-07-25 1998-12-14 株式会社東芝 不揮発性半導体記憶装置
US5375083A (en) * 1993-02-04 1994-12-20 Mitsubishi Denki Kabushiki Kaisha Semiconductor integrated circuit including a substrate having a memory cell array surrounded by a well structure
EP0654791B1 (de) * 1993-11-24 1999-07-28 STMicroelectronics S.r.l. Nicht-flüchtige Speicheranordnung mit Mitteln zur Erzeugung negativer Programmierspannungen
KR0169157B1 (ko) 1993-11-29 1999-02-01 기다오까 다까시 반도체 회로 및 mos-dram
US5475335A (en) * 1994-04-01 1995-12-12 National Semiconductor Corporation High voltage cascaded charge pump
US5450357A (en) * 1994-04-01 1995-09-12 Texas Instruments Incorporated Level shifter circuit
JPH0897706A (ja) * 1994-09-26 1996-04-12 Nec Corp 出力バッファ回路
DE69429264T2 (de) * 1994-09-27 2002-06-13 St Microelectronics Srl Byte-löschbares EEPROM, das mit einem mit einer einzigen Stromversorgung versehenen Flash-EPROM-System kompatibel ist
DE19502116C2 (de) * 1995-01-24 1998-07-23 Siemens Ag MOS-Schaltungsanordnung zum Schalten hoher Spannungen auf einem Halbleiterchip
ATE209820T1 (de) * 1995-01-26 2001-12-15 Macronix Int Co Ltd Dekodierter wortadressleitungstreiber mit positiven und negativen spannungsmodi
JPH08203270A (ja) * 1995-01-27 1996-08-09 Matsushita Electron Corp 半導体集積回路
DE19519774C1 (de) * 1995-05-30 1996-10-24 Siemens Ag Verfahren zur selektiven Programmierung eines nicht-flüchtigen Speichers
JPH11507463A (ja) * 1995-06-07 1999-06-29 インテル・コーポレーション 負電圧スイッチング回路
KR100208443B1 (ko) * 1995-10-14 1999-07-15 김영환 네가티브 전압 구동회로
US5723985A (en) * 1995-11-21 1998-03-03 Information Storage Devices, Inc. Clocked high voltage switch
WO1997022971A1 (en) * 1995-12-20 1997-06-26 Intel Corporation A negative voltage switch architecture for a nonvolatile memory
US5880622A (en) * 1996-12-17 1999-03-09 Intel Corporation Method and apparatus for controlling a charge pump for rapid initialization
SG83670A1 (en) * 1997-09-02 2001-10-16 Oki Techno Ct Singapore A bias stabilization circuit
US6021083A (en) * 1997-12-05 2000-02-01 Macronix International Co., Ltd. Block decoded wordline driver with positive and negative voltage modes
US6172553B1 (en) 1998-06-25 2001-01-09 Cypress Semiconductor Corp. High voltage steering network for EEPROM/FLASH memory
US6166982A (en) * 1998-06-25 2000-12-26 Cypress Semiconductor Corp. High voltage switch for eeprom/flash memories
US6094095A (en) * 1998-06-29 2000-07-25 Cypress Semiconductor Corp. Efficient pump for generating voltages above and/or below operating voltages
US7791116B1 (en) 1998-10-14 2010-09-07 Micron Technology, Inc. CMOS imager having a nitride dielectric
US6140630A (en) * 1998-10-14 2000-10-31 Micron Technology, Inc. Vcc pump for CMOS imagers
US6740915B1 (en) 1998-11-12 2004-05-25 Micron Technology, Inc. CMOS imager cell having a buried contact
US6825878B1 (en) 1998-12-08 2004-11-30 Micron Technology, Inc. Twin P-well CMOS imager
US6639261B2 (en) * 1998-12-08 2003-10-28 Micron Technology, Inc. Method for forming a low leakage contact in a CMOS imager
US6232626B1 (en) 1999-02-01 2001-05-15 Micron Technology, Inc. Trench photosensor for a CMOS imager
US20030089929A1 (en) * 2001-02-14 2003-05-15 Rhodes Howard E. Trench photosensor for a CMOS imager
US6376868B1 (en) 1999-06-15 2002-04-23 Micron Technology, Inc. Multi-layered gate for a CMOS imager
US6310366B1 (en) 1999-06-16 2001-10-30 Micron Technology, Inc. Retrograde well structure for a CMOS imager
US6445014B1 (en) 1999-06-16 2002-09-03 Micron Technology Inc. Retrograde well structure for a CMOS imager
US6654057B1 (en) * 1999-06-17 2003-11-25 Micron Technology, Inc. Active pixel sensor with a diagonal active area
US6414342B1 (en) * 1999-06-18 2002-07-02 Micron Technology Inc. Photogate with improved short wavelength response for a CMOS imager
US6326652B1 (en) 1999-06-18 2001-12-04 Micron Technology, Inc., CMOS imager with a self-aligned buried contact
US6204524B1 (en) 1999-07-14 2001-03-20 Micron Technology, Inc. CMOS imager with storage capacitor
US6333205B1 (en) * 1999-08-16 2001-12-25 Micron Technology, Inc. CMOS imager with selectively silicided gates
US6630701B1 (en) * 1999-08-16 2003-10-07 Micron Technology, Inc. Buried channel CMOS imager and method of forming same
US6407440B1 (en) 2000-02-25 2002-06-18 Micron Technology Inc. Pixel cell with high storage capacitance for a CMOS imager
US6288603B1 (en) * 2000-06-16 2001-09-11 Stmicroelectronics S.R.L. High-voltage bidirectional switch made using high-voltage MOS transistors
JP4499251B2 (ja) * 2000-06-28 2010-07-07 ローム株式会社 電源回路およびバックアップ電池を有する携帯用電子機器
US6611037B1 (en) * 2000-08-28 2003-08-26 Micron Technology, Inc. Multi-trench region for accumulation of photo-generated charge in a CMOS imager
US6804502B2 (en) 2001-10-10 2004-10-12 Peregrine Semiconductor Corporation Switch circuit and method of switching radio frequency signals
US6956771B2 (en) * 2002-08-26 2005-10-18 Tower Semiconductor Ltd. Voltage control circuit for high voltage supply
US7709777B2 (en) * 2003-06-16 2010-05-04 Micron Technology, Inc. Pumps for CMOS imagers
USRE48965E1 (en) 2005-07-11 2022-03-08 Psemi Corporation Method and apparatus improving gate oxide reliability by controlling accumulated charge
US7890891B2 (en) 2005-07-11 2011-02-15 Peregrine Semiconductor Corporation Method and apparatus improving gate oxide reliability by controlling accumulated charge
US20080076371A1 (en) 2005-07-11 2008-03-27 Alexander Dribinsky Circuit and method for controlling charge injection in radio frequency switches
US7910993B2 (en) 2005-07-11 2011-03-22 Peregrine Semiconductor Corporation Method and apparatus for use in improving linearity of MOSFET's using an accumulated charge sink
US9653601B2 (en) 2005-07-11 2017-05-16 Peregrine Semiconductor Corporation Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction
US8742502B2 (en) 2005-07-11 2014-06-03 Peregrine Semiconductor Corporation Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction
KR100780768B1 (ko) * 2006-04-12 2007-11-30 주식회사 하이닉스반도체 고전압 펌핑장치
US7859240B1 (en) 2007-05-22 2010-12-28 Cypress Semiconductor Corporation Circuit and method for preventing reverse current flow into a voltage regulator from an output thereof
US7742325B2 (en) * 2007-12-17 2010-06-22 Suvolta, Inc. Swapped-body RAM architecture
US9048136B2 (en) 2011-10-26 2015-06-02 GlobalFoundries, Inc. SRAM cell with individual electrical device threshold control
US9029956B2 (en) 2011-10-26 2015-05-12 Global Foundries, Inc. SRAM cell with individual electrical device threshold control
KR101334843B1 (ko) * 2012-08-07 2013-12-02 주식회사 동부하이텍 전압 출력 회로 및 이를 이용한 네거티브 전압 선택 출력 장치
US9590674B2 (en) 2012-12-14 2017-03-07 Peregrine Semiconductor Corporation Semiconductor devices with switchable ground-body connection
US20150236748A1 (en) 2013-03-14 2015-08-20 Peregrine Semiconductor Corporation Devices and Methods for Duplexer Loss Reduction
US20160006348A1 (en) * 2014-07-07 2016-01-07 Ememory Technology Inc. Charge pump apparatus
US9831857B2 (en) 2015-03-11 2017-11-28 Peregrine Semiconductor Corporation Power splitter with programmable output phase shift
US10886911B2 (en) 2018-03-28 2021-01-05 Psemi Corporation Stacked FET switch bias ladders
US10236872B1 (en) 2018-03-28 2019-03-19 Psemi Corporation AC coupling modules for bias ladders
US10505530B2 (en) 2018-03-28 2019-12-10 Psemi Corporation Positive logic switch with selectable DC blocking circuit
CN110830017B (zh) * 2018-08-10 2023-10-13 圣邦微电子（北京）股份有限公司 一种无功耗片内实现多端口过负压的模拟开关
US11476849B2 (en) 2020-01-06 2022-10-18 Psemi Corporation High power positive logic switch

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3496545A (en) * 1966-04-18 1970-02-17 Sperry Rand Corp Switching matrix
DE3371961D1 (en) * 1983-05-27 1987-07-09 Itt Ind Gmbh Deutsche Mos push-pull bootstrap driver
US4667312A (en) * 1983-11-28 1987-05-19 Exel Microelectronics Inc. Charge pump method and apparatus
JPH0638318B2 (ja) * 1985-02-15 1994-05-18 株式会社リコー Ｅｐｒｏｍの書込み方法
US4804637A (en) * 1985-09-27 1989-02-14 Texas Instruments Incorporated EEPROM memory cell and driving circuitry
US4742492A (en) * 1985-09-27 1988-05-03 Texas Instruments Incorporated EEPROM memory cell having improved breakdown characteristics and driving circuitry therefor
JPH06100889B2 (ja) * 1987-12-21 1994-12-12 株式会社日立製作所 駆動回路
US4823318A (en) * 1988-09-02 1989-04-18 Texas Instruments Incorporated Driving circuitry for EEPROM memory cell

Also Published As

Publication number Publication date
IT9047927A1 (it) 1991-11-08
EP0456623A3 (en) 1992-10-21
IT9047927A0 (it) 1990-05-08
JPH0689589A (ja) 1994-03-29
IT1239781B (it) 1993-11-15
EP0456623A2 (de) 1991-11-13
EP0456623B1 (de) 1996-01-03
US5319604A (en) 1994-06-07
JP3155290B2 (ja) 2001-04-09
DE69115983T2 (de) 1996-06-27

Similar Documents

Publication Publication Date Title
DE69115983D1 (de) Schaltungen und Verfahren zur selektiven Umschaltung negativer Spannungen in integrierten CMOS-Schaltungen
DE69413860D1 (de) Transistoren und Verfahren zur Herstellung
DE69533678D1 (de) Technik zur schnellen Übertragung in CMOS integrierte Schaltungen
DE69808502D1 (de) Flexible schaltungen und träger und verfahren zur herstellung
DE69116058T2 (de) Verfahren zur Herstellung integrierter Schaltungen
DE69423573D1 (de) Verfahren und Schaltung zur Bildverbesserung
DE69429740T2 (de) Integriertes automatisches Entwicklungssystem und zugehöriges Verfahren
DE69125927T2 (de) Festkörper-bildaufnahmevorrichtung und verfahren zur herstellung derselben
DE69128334T2 (de) Integrierte Schaltung und Verfahren zu deren Herstellung
DE69534688D1 (de) Verfahren zur Bildung von erhöhten Source- und Drainzonen in integrierten Schaltungen
DE69126599D1 (de) Verfahren und Anordnung zum Verbinden integrierter Schaltungen in drei Dimensionen
DE69435074D1 (de) Geraet und verfahren zur zellenverarbeitung in zellenrelaisknoten
DE69123095T2 (de) Verfahren und Vorrichtung für den Rückfluss von gedruckten Schaltungen
DE69430881T2 (de) SOI-Halbleitervorrichtung und Verfahren zu dessen Herstellung
DE69126888D1 (de) Sitzeinrichtung und verfahren
DE69404348T2 (de) Kathodenvorrichtung und Verfahren zur Herstellung derselben
DE69218501D1 (de) Dünnfilm-Transistoren und Verfahren zur Herstellung
DE69121187D1 (de) Gerät zur versuchsverbindung von elektronischen schaltungen
DE69331983T2 (de) Leitungsanschlussschaltung und Verfahren zur Vermittlungsumschaltung bei Fehlererkennung
DE69311423T2 (de) Spannungsgeneratorschaltungen und Verfahren
DE9403928U1 (de) Schaltungsanordnung zur Verpolsicherung bei integrierten Schaltungen
DE69513250D1 (de) Verfahren und Gerät zur Prüfung integrierter Schaltungen
DE69126574T2 (de) Durch Ereignis befähigte Prüfverfahren und Schaltungen
DE69128829D1 (de) Feldeffekttransistor und Verfahren zur Herstellung
DE69126047D1 (de) Schaltkreis zur Serialisierung und Deserialisierung

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee