DE69130495T2 - Umwandlung der Befehle von internen Prozessorregistern in I/O-Adressraum - Google Patents
Umwandlung der Befehle von internen Prozessorregistern in I/O-AdressraumInfo
- Publication number
- DE69130495T2 DE69130495T2 DE69130495T DE69130495T DE69130495T2 DE 69130495 T2 DE69130495 T2 DE 69130495T2 DE 69130495 T DE69130495 T DE 69130495T DE 69130495 T DE69130495 T DE 69130495T DE 69130495 T2 DE69130495 T2 DE 69130495T2
- Authority
- DE
- Germany
- Prior art keywords
- cache
- memory
- bus
- branch
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000006243 chemical reaction Methods 0.000 title 1
- 238000000034 method Methods 0.000 abstract 4
- 230000006870 function Effects 0.000 abstract 1
- 230000007704 transition Effects 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/3012—Organisation of register space, e.g. banked or distributed register file
- G06F9/30134—Register stacks; shift registers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/3012—Organisation of register space, e.g. banked or distributed register file
- G06F9/30138—Extension of register space, e.g. register cache
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
- G06F9/3016—Decoding the operand specifier, e.g. specifier format
- G06F9/30167—Decoding the operand specifier, e.g. specifier format of immediate specifier, e.g. constants
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3802—Instruction prefetching
- G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding
- G06F9/3806—Instruction prefetching for branches, e.g. hedging, branch folding using address prediction, e.g. return stack, branch history buffer
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
- G06F9/3856—Reordering of instructions, e.g. using queues or age tags
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
- G06F9/3858—Result writeback, i.e. updating the architectural state or memory
-
- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F02—COMBUSTION ENGINES; HOT-GAS OR COMBUSTION-PRODUCT ENGINE PLANTS
- F02B—INTERNAL-COMBUSTION PISTON ENGINES; COMBUSTION ENGINES IN GENERAL
- F02B75/00—Other engines
- F02B75/02—Engines characterised by their cycles, e.g. six-stroke
- F02B2075/022—Engines characterised by their cycles, e.g. six-stroke having less than six strokes per cycle
- F02B2075/025—Engines characterised by their cycles, e.g. six-stroke having less than six strokes per cycle two
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1064—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in cache or content addressable memories
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US54799590A | 1990-06-29 | 1990-06-29 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69130495D1 DE69130495D1 (de) | 1998-12-24 |
DE69130495T2 true DE69130495T2 (de) | 1999-06-24 |
Family
ID=24186998
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69130495T Expired - Lifetime DE69130495T2 (de) | 1990-06-29 | 1991-06-27 | Umwandlung der Befehle von internen Prozessorregistern in I/O-Adressraum |
Country Status (5)
Country | Link |
---|---|
US (1) | US5481689A (de) |
EP (1) | EP0466550B1 (de) |
JP (1) | JP2962876B2 (de) |
CA (1) | CA2045798A1 (de) |
DE (1) | DE69130495T2 (de) |
Families Citing this family (55)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0576749B1 (de) | 1992-06-30 | 1999-06-02 | Discovision Associates | Datenpipelinesystem |
US5627987A (en) * | 1991-11-29 | 1997-05-06 | Kabushiki Kaisha Toshiba | Memory management and protection system for virtual memory in computer system |
US6079009A (en) | 1992-06-30 | 2000-06-20 | Discovision Associates | Coding standard token in a system compromising a plurality of pipeline stages |
US5768561A (en) | 1992-06-30 | 1998-06-16 | Discovision Associates | Tokens-based adaptive video processing arrangement |
US6034674A (en) * | 1992-06-30 | 2000-03-07 | Discovision Associates | Buffer manager |
US6047112A (en) | 1992-06-30 | 2000-04-04 | Discovision Associates | Technique for initiating processing of a data stream of encoded video information |
US6330665B1 (en) | 1992-06-30 | 2001-12-11 | Discovision Associates | Video parser |
US5842033A (en) | 1992-06-30 | 1998-11-24 | Discovision Associates | Padding apparatus for passing an arbitrary number of bits through a buffer in a pipeline system |
US6112017A (en) | 1992-06-30 | 2000-08-29 | Discovision Associates | Pipeline processing machine having a plurality of reconfigurable processing stages interconnected by a two-wire interface bus |
US6263422B1 (en) | 1992-06-30 | 2001-07-17 | Discovision Associates | Pipeline processing machine with interactive stages operable in response to tokens and system and methods relating thereto |
US5809270A (en) | 1992-06-30 | 1998-09-15 | Discovision Associates | Inverse quantizer |
US6067417A (en) | 1992-06-30 | 2000-05-23 | Discovision Associates | Picture start token |
US5835792A (en) | 1993-06-24 | 1998-11-10 | Discovision Associates | Token-based adaptive video processing arrangement |
US5699544A (en) | 1993-06-24 | 1997-12-16 | Discovision Associates | Method and apparatus for using a fixed width word for addressing variable width data |
US5805914A (en) | 1993-06-24 | 1998-09-08 | Discovision Associates | Data pipeline system and data encoding method |
US5861894A (en) | 1993-06-24 | 1999-01-19 | Discovision Associates | Buffer manager |
US6216127B1 (en) * | 1994-02-22 | 2001-04-10 | Oracle Corporation | Method and apparatus for processing electronic mail in parallel |
CA2145379C (en) | 1994-03-24 | 1999-06-08 | William P. Robbins | Method and apparatus for addressing memory |
CA2145363C (en) | 1994-03-24 | 1999-07-13 | Anthony Mark Jones | Ram interface |
US5706483A (en) * | 1994-12-13 | 1998-01-06 | Microsoft Corporation | Run-time code compiler for data block transfer |
KR100403405B1 (ko) * | 1995-05-26 | 2004-03-30 | 내셔널 세미콘덕터 코포레이션 | 분산형버스액세스및제어조정에따라다수개의내부신호버스를공유하는다수개의회로기능요소를갖는집적회로 |
US6119213A (en) * | 1995-06-07 | 2000-09-12 | Discovision Associates | Method for addressing data having variable data width using a fixed number of bits for address and width defining fields |
US5745728A (en) * | 1995-12-13 | 1998-04-28 | International Business Machines Corporation | Process or renders repeat operation instructions non-cacheable |
US6212601B1 (en) * | 1996-08-30 | 2001-04-03 | Texas Instruments Incorporated | Microprocessor system with block move circuit disposed between cache circuits |
US5826074A (en) * | 1996-11-22 | 1998-10-20 | S3 Incorporated | Extenstion of 32-bit architecture for 64-bit addressing with shared super-page register |
US6175906B1 (en) * | 1996-12-06 | 2001-01-16 | Advanced Micro Devices, Inc. | Mechanism for fast revalidation of virtual tags |
US5999935A (en) * | 1997-03-28 | 1999-12-07 | International Business Machines Corporation | Tail compression of a sparse log stream of a multisystem environment |
US5956735A (en) * | 1997-03-28 | 1999-09-21 | International Business Machines Corporation | System of compressing the tail of a sparse log stream of a computer system |
US6125393A (en) * | 1997-03-28 | 2000-09-26 | International Business Machines Corporation | System of compressing the tail of a sparse log stream of a multisystem environment |
US5920875A (en) * | 1997-03-28 | 1999-07-06 | International Business Machines Corporation | Tail compression of a sparse log stream of a computer system |
US5881274A (en) * | 1997-07-25 | 1999-03-09 | International Business Machines Corporation | Method and apparatus for performing add and rotate as a single instruction within a processor |
US6101420A (en) * | 1997-10-24 | 2000-08-08 | Compaq Computer Corporation | Method and apparatus for disambiguating change-to-dirty commands in a switch based multi-processing system with coarse directories |
US6145038A (en) * | 1997-10-31 | 2000-11-07 | International Business Machines Corporation | Method and system for early slave forwarding of strictly ordered bus operations |
US6112270A (en) * | 1997-10-31 | 2000-08-29 | International Business Machines Corporation | Method and system for high speed transferring of strictly ordered bus operations by reissuing bus operations in a multiprocessor system |
US6157986A (en) * | 1997-12-16 | 2000-12-05 | Advanced Micro Devices, Inc. | Fast linear tag validation unit for use in microprocessor |
FR2775089B1 (fr) * | 1998-02-18 | 2000-04-14 | Sgs Thomson Microelectronics | Circuit integre comportant une banque de registres partiellement utilisee |
US6199118B1 (en) * | 1998-08-18 | 2001-03-06 | Compaq Computer Corporation | System and method for aligning an initial cache line of data read from an input/output device by a central processing unit |
US6360308B1 (en) | 1998-09-30 | 2002-03-19 | Lsi Logic Corporation | Buffer controller |
TW416032B (en) * | 1999-03-05 | 2000-12-21 | Via Tech Inc | Memory pages management device and method for tracking memory access |
US6230256B1 (en) * | 1999-03-31 | 2001-05-08 | Bull Hn Information Systems Inc. | Data processing system having a bus wider than processor instruction width |
US6463518B1 (en) * | 2000-06-19 | 2002-10-08 | Philips Electronics No. America Corp. | Generation of memory addresses for accessing a memory utilizing scheme registers |
US8239271B2 (en) * | 2001-09-04 | 2012-08-07 | Ncr Corporation | Methods and apparatus for managing sequencing of data received from devices in a retail point of sale system |
JP4044756B2 (ja) * | 2001-12-11 | 2008-02-06 | 松下電器産業株式会社 | プログラム変換装置、プログラム変換方法、及び当該プログラム変換装置を実現するプログラム |
US7565509B2 (en) | 2002-04-17 | 2009-07-21 | Microsoft Corporation | Using limits on address translation to control access to an addressable entity |
TWI289751B (en) * | 2003-02-27 | 2007-11-11 | Mediatek Inc | Method for increasing memory in a processor |
US7240179B1 (en) * | 2004-12-13 | 2007-07-03 | Nvidia Corporation | System, apparatus and method for reclaiming memory holes in memory composed of arbitrarily-sized memory devices |
KR100621631B1 (ko) * | 2005-01-11 | 2006-09-13 | 삼성전자주식회사 | 반도체 디스크 제어 장치 |
US7797685B2 (en) * | 2005-05-13 | 2010-09-14 | Texas Instruments Incorporated | Method for generating timing data packet |
US7526638B1 (en) | 2008-03-16 | 2009-04-28 | International Business Machines Corporation | Hardware alteration of instructions in a microcode routine |
KR100998929B1 (ko) * | 2009-01-23 | 2010-12-09 | 한국과학기술원 | 캐쉬 컨트롤러 장치, 캐쉬 컨트롤러 장치를 이용한 인터페이스 방법 및 프로그래밍 방법 |
JP2011007888A (ja) * | 2009-06-24 | 2011-01-13 | Kawai Musical Instr Mfg Co Ltd | 楽音生成装置のメモリ制御装置 |
JP5600517B2 (ja) * | 2010-08-18 | 2014-10-01 | キヤノン株式会社 | 情報処理装置、情報処理方法、およびプログラム |
JP6011194B2 (ja) * | 2012-09-21 | 2016-10-19 | 富士通株式会社 | 演算処理装置及び演算処理装置の制御方法 |
US11106466B2 (en) * | 2018-06-18 | 2021-08-31 | International Business Machines Corporation | Decoupling of conditional branches |
CN109818603B (zh) * | 2018-12-14 | 2023-04-28 | 深圳市紫光同创电子有限公司 | 一种位宽转换电路的复用方法及位宽转换电路 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4004280A (en) * | 1973-06-11 | 1977-01-18 | Texas Instruments Incorporated | Calculator data storage system |
US4041462A (en) * | 1976-04-30 | 1977-08-09 | International Business Machines Corporation | Data processing system featuring subroutine linkage operations using hardware controlled stacks |
US4217638A (en) * | 1977-05-19 | 1980-08-12 | Tokyo Shibaura Electric Co., Ltd. | Data-processing apparatus and method |
US4236206A (en) * | 1978-10-25 | 1980-11-25 | Digital Equipment Corporation | Central processor unit for executing instructions of variable length |
US4403287A (en) * | 1981-08-24 | 1983-09-06 | Bell Telephone Laboratories, Incorporated | Microprocessor architecture having internal access means |
US4648035A (en) * | 1982-12-06 | 1987-03-03 | Digital Equipment Corporation | Address conversion unit for multiprocessor system |
US4649471A (en) * | 1983-03-01 | 1987-03-10 | Thomson Components-Mostek Corporation | Address-controlled automatic bus arbitration and address modification |
US4713748A (en) * | 1985-02-12 | 1987-12-15 | Texas Instruments Incorporated | Microprocessor with block move instruction |
CA1250667A (en) * | 1985-04-15 | 1989-02-28 | Larry D. Larsen | Branch control in a three phase pipelined signal processor |
US4868740A (en) * | 1986-06-04 | 1989-09-19 | Hitachi, Ltd. | System for processing data with multiple virtual address and data word lengths |
US5109494A (en) * | 1987-12-31 | 1992-04-28 | Texas Instruments Incorporated | Passive processor communications interface |
-
1991
- 1991-06-27 EP EP91401765A patent/EP0466550B1/de not_active Expired - Lifetime
- 1991-06-27 CA CA002045798A patent/CA2045798A1/en not_active Abandoned
- 1991-06-27 DE DE69130495T patent/DE69130495T2/de not_active Expired - Lifetime
- 1991-06-28 JP JP3159112A patent/JP2962876B2/ja not_active Expired - Fee Related
-
1993
- 1993-08-13 US US08/106,317 patent/US5481689A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH06119243A (ja) | 1994-04-28 |
JP2962876B2 (ja) | 1999-10-12 |
EP0466550B1 (de) | 1998-11-18 |
EP0466550A3 (en) | 1993-12-08 |
CA2045798A1 (en) | 1991-12-30 |
US5481689A (en) | 1996-01-02 |
DE69130495D1 (de) | 1998-12-24 |
EP0466550A2 (de) | 1992-01-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8328 | Change in the person/name/address of the agent |
Free format text: GRUENECKER, KINKELDEY, STOCKMAIR & SCHWANHAEUSSER, 80538 MUENCHEN |