DE69333359D1 - Herstellungsverfahren einer EEPROM-Zellen-Matrix - Google Patents

Herstellungsverfahren einer EEPROM-Zellen-Matrix

Info

Publication number
DE69333359D1
DE69333359D1 DE69333359T DE69333359T DE69333359D1 DE 69333359 D1 DE69333359 D1 DE 69333359D1 DE 69333359 T DE69333359 T DE 69333359T DE 69333359 T DE69333359 T DE 69333359T DE 69333359 D1 DE69333359 D1 DE 69333359D1
Authority
DE
Germany
Prior art keywords
manufacturing process
cell matrix
eeprom cell
eeprom
matrix
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69333359T
Other languages
English (en)
Other versions
DE69333359T2 (de
Inventor
Albert Bergemont
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Semiconductor Corp
Original Assignee
National Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Semiconductor Corp filed Critical National Semiconductor Corp
Publication of DE69333359D1 publication Critical patent/DE69333359D1/de
Application granted granted Critical
Publication of DE69333359T2 publication Critical patent/DE69333359T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/14Circuits for erasing electrically, e.g. erase voltage switching circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/788Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881Programmable transistors with only two possible levels of programmation
    • H01L29/7883Programmable transistors with only two possible levels of programmation charging by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/972Stored charge erasure
DE69333359T 1992-06-01 1993-05-18 Herstellungsverfahren einer EEPROM-Zellen-Matrix Expired - Lifetime DE69333359T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/891,705 US5379253A (en) 1992-06-01 1992-06-01 High density EEPROM cell array with novel programming scheme and method of manufacture
US891705 1992-06-01

Publications (2)

Publication Number Publication Date
DE69333359D1 true DE69333359D1 (de) 2004-01-29
DE69333359T2 DE69333359T2 (de) 2004-10-14

Family

ID=25398680

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69333359T Expired - Lifetime DE69333359T2 (de) 1992-06-01 1993-05-18 Herstellungsverfahren einer EEPROM-Zellen-Matrix

Country Status (6)

Country Link
US (4) US5379253A (de)
EP (1) EP0573170B1 (de)
JP (1) JPH0685282A (de)
KR (1) KR100316086B1 (de)
DE (1) DE69333359T2 (de)
TW (1) TW225043B (de)

Families Citing this family (94)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0570597B1 (de) * 1991-12-09 2001-03-21 Fujitsu Limited Flash-speicher mit verbesserten löscheigenschaften und schaltung dafür
US5592415A (en) * 1992-07-06 1997-01-07 Hitachi, Ltd. Non-volatile semiconductor memory
JP2848223B2 (ja) * 1993-12-01 1999-01-20 日本電気株式会社 不揮発性半導体記憶装置の消去方法及び製造方法
JP2626523B2 (ja) * 1993-12-01 1997-07-02 日本電気株式会社 不揮発性半導体記憶装置及びその製造方法
JP3541958B2 (ja) * 1993-12-16 2004-07-14 株式会社東芝 不揮発性半導体記憶装置
US5557124A (en) * 1994-03-11 1996-09-17 Waferscale Integration, Inc. Flash EEPROM and EPROM arrays with select transistors within the bit line pitch
US5604141A (en) * 1994-03-15 1997-02-18 National Semiconductor Corporation Method for forming virtual-ground flash EPROM array with reduced cell pitch in the X direction
FR2718289B1 (fr) * 1994-03-30 1996-08-02 Sgs Thomson Microelectronics Cellule mémoire électriquement programmable.
US5903494A (en) * 1994-03-30 1999-05-11 Sgs-Thomson Microelectronics S.A. Electrically programmable memory cell
US5432112A (en) * 1994-05-06 1995-07-11 United Microelectronics Corporation Process for EPROM, flash memory with high coupling ratio
JP3397903B2 (ja) * 1994-08-23 2003-04-21 新日本製鐵株式会社 不揮発性半導体記憶装置の製造方法
JP3406077B2 (ja) * 1994-08-26 2003-05-12 三菱電機株式会社 不揮発性半導体記憶装置
US5574685A (en) * 1994-09-01 1996-11-12 Advanced Micro Devices, Inc. Self-aligned buried channel/junction stacked gate flash memory cell
US5427229A (en) 1994-09-20 1995-06-27 Foster; Raymond K. Control system for reciprocating floor conveyor
US5622881A (en) * 1994-10-06 1997-04-22 International Business Machines Corporation Packing density for flash memories
JPH08130258A (ja) * 1994-10-31 1996-05-21 Sony Corp 半導体不揮発性メモリ素子
US5512503A (en) * 1994-11-23 1996-04-30 United Microelectronics Corporation Method of manufacture of a split gate flash EEPROM memory cell
JP3461998B2 (ja) * 1995-03-24 2003-10-27 セイコーインスツルメンツ株式会社 電気的書き換え可能な半導体不揮発性メモリ装置とその製造方法
EP0768673A3 (de) * 1995-07-19 1998-09-30 Texas Instruments Incorporated Verbesserungen in oder an integrierten Schaltungen
US5633518A (en) * 1995-07-28 1997-05-27 Zycad Corporation Nonvolatile reprogrammable interconnect cell with FN tunneling and programming method thereof
US5521109A (en) * 1995-09-01 1996-05-28 United Microelectronics Corp. Method for fabricating a high coupling ratio flash memory with a very narrow tunnel layer
US5604150A (en) * 1995-10-25 1997-02-18 Texas Instruments Incorporated Channel-stop process for use with thick-field isolation regions in triple-well structures
JPH09134973A (ja) * 1995-11-07 1997-05-20 Mitsubishi Electric Corp 半導体装置およびその製造方法
US5703808A (en) * 1996-02-21 1997-12-30 Motorola, Inc. Non-volatile memory cell and method of programming
JP3710880B2 (ja) * 1996-06-28 2005-10-26 株式会社東芝 不揮発性半導体記憶装置
US5648930A (en) * 1996-06-28 1997-07-15 Symbios Logic Inc. Non-volatile memory which is programmable from a power source
US5904524A (en) 1996-08-08 1999-05-18 Altera Corporation Method of making scalable tunnel oxide window with no isolation edges
US5717635A (en) * 1996-08-27 1998-02-10 International Business Machines Corporation High density EEPROM for solid state file
US5914514A (en) * 1996-09-27 1999-06-22 Xilinx, Inc. Two transistor flash EPROM cell
US6265266B1 (en) * 1996-09-27 2001-07-24 Xilinx, Inc. Method of forming a two transistor flash EPROM cell
US5661687A (en) * 1996-09-30 1997-08-26 Symbios Logic Inc. Drain excluded EPROM cell
US5838616A (en) * 1996-09-30 1998-11-17 Symbios, Inc. Gate edge aligned EEPROM transistor
US5768186A (en) 1996-10-25 1998-06-16 Ma; Yueh Yale High density single poly metal-gate non-volatile memory cell
US5856222A (en) * 1997-05-05 1999-01-05 National Semiconductor Corp. Method of fabricating a high density EEPROM cell
US5889700A (en) * 1997-05-05 1999-03-30 National Semiconductor Corporation High density EEPROM array using self-aligned control gate and floating gate for both access transistor and memory cell and method of operating same
US5895240A (en) * 1997-06-30 1999-04-20 Taiwan Semiconductor Manufacturing Company, Ltd. Method of making stepped edge structure of an EEPROM tunneling window
US5822243A (en) * 1997-09-09 1998-10-13 Macronix International Co., Ltd. Dual mode memory with embedded ROM
US6076056A (en) * 1997-09-19 2000-06-13 Microsoft Corporation Speech recognition system for recognizing continuous and isolated speech
TW351852B (en) * 1997-10-20 1999-02-01 United Semicondutor Corp Process for manufacturing flash memory cell structure
JP3558510B2 (ja) * 1997-10-30 2004-08-25 シャープ株式会社 不揮発性半導体記憶装置
US5973354A (en) * 1998-03-30 1999-10-26 Worldwide Semiconductor Manufacturing Corporation Single polycylindrical flash memory cell having high coupling ratio
US5862082A (en) * 1998-04-16 1999-01-19 Xilinx, Inc. Two transistor flash EEprom cell and method of operating same
US6242773B1 (en) * 1998-09-30 2001-06-05 Advanced Micro Devices, Inc. Self-aligning poly 1 ono dielectric for non-volatile memory
US6369433B1 (en) * 1998-10-30 2002-04-09 Advanced Micro Devices, Inc. High voltage transistor with low body effect and low leakage
KR100643481B1 (ko) * 1998-12-08 2007-12-04 삼성전자주식회사 비휘발성 반도체 메모리장치_
TW428287B (en) * 1998-12-21 2001-04-01 United Microelectronics Corp Manufacturing method for flash memory and the operation method for its erasure
US6072725A (en) * 1999-01-26 2000-06-06 Advanced Micro Devices, Inc. Method of erasing floating gate capacitor used in voltage regulator
US6165846A (en) * 1999-03-02 2000-12-26 Zilog, Inc. Method of eliminating gate leakage in nitrogen annealed oxides
US6274898B1 (en) * 1999-05-21 2001-08-14 Vantis Corporation Triple-well EEPROM cell using P-well for tunneling across a channel
JP3743486B2 (ja) 1999-06-23 2006-02-08 セイコーエプソン株式会社 不揮発性メモリトランジスタを含む半導体装置の製造方法
US6522587B1 (en) 1999-06-23 2003-02-18 Seiko Epson Corporation Non-volatile semiconductor memory devices
JP2001007227A (ja) 1999-06-23 2001-01-12 Seiko Epson Corp 不揮発性半導体記憶装置
JP2001060674A (ja) 1999-08-20 2001-03-06 Seiko Epson Corp 不揮発性メモリトランジスタを含む半導体装置
JP3587100B2 (ja) 1999-09-17 2004-11-10 セイコーエプソン株式会社 不揮発性メモリトランジスタを含む半導体装置の製造方法
US6507516B1 (en) * 2000-06-21 2003-01-14 National Semiconductor Corporation EEPROM memory cell embedded on core CMOS for analog applications
JP2002100688A (ja) 2000-09-22 2002-04-05 Oki Electric Ind Co Ltd 不揮発性半導体メモリの製造方法
US6363016B1 (en) * 2000-10-12 2002-03-26 Xilinx, Inc. Method for enhancement of non-volatile memory cell read current
JP3963420B2 (ja) * 2000-11-15 2007-08-22 株式会社東芝 半導体記憶装置
US6369422B1 (en) 2001-05-01 2002-04-09 Atmel Corporation Eeprom cell with asymmetric thin window
JP4809545B2 (ja) 2001-05-31 2011-11-09 株式会社半導体エネルギー研究所 半導体不揮発性メモリ及び電子機器
AU2002339620A1 (en) * 2001-11-27 2003-06-10 Koninklijke Philips Electronics N.V. Semiconductor device having a byte-erasable eeprom memory
KR100471165B1 (ko) * 2002-05-07 2005-03-08 삼성전자주식회사 평탄하지 않은 게이트 절연막을 구비하는 비휘발성 메모리장치 및 그 제조 방법
JP4678760B2 (ja) * 2002-06-21 2011-04-27 マイクロン テクノロジー, インク. メモリセルのアレイ、メモリアレイ、メモリデバイス及び多重状態セルを有するメモリアレイを形成する方法
US6853587B2 (en) * 2002-06-21 2005-02-08 Micron Technology, Inc. Vertical NROM having a storage density of 1 bit per 1F2
JP2005024665A (ja) * 2003-06-30 2005-01-27 Ricoh Co Ltd 粉体搬送装置、画像形成装置、トナー収容部及びプロセスカートリッジ
US7095075B2 (en) * 2003-07-01 2006-08-22 Micron Technology, Inc. Apparatus and method for split transistor memory having improved endurance
US6979857B2 (en) 2003-07-01 2005-12-27 Micron Technology, Inc. Apparatus and method for split gate NROM memory
TWI220252B (en) * 2003-08-06 2004-08-11 Ememory Technology Inc Method for programming, erasing and reading a flash memory cell
US7085170B2 (en) * 2003-08-07 2006-08-01 Micron Technology, Ind. Method for erasing an NROM cell
US6873550B2 (en) * 2003-08-07 2005-03-29 Micron Technology, Inc. Method for programming and erasing an NROM cell
US6933557B2 (en) * 2003-08-11 2005-08-23 Atmel Corporation Fowler-Nordheim block alterable EEPROM memory cell
US6977412B2 (en) * 2003-09-05 2005-12-20 Micron Technology, Inc. Trench corner effect bidirectional flash memory cell
US6830963B1 (en) * 2003-10-09 2004-12-14 Micron Technology, Inc. Fully depleted silicon-on-insulator CMOS logic
US7184315B2 (en) * 2003-11-04 2007-02-27 Micron Technology, Inc. NROM flash memory with self-aligned structural charge separation
US7202523B2 (en) * 2003-11-17 2007-04-10 Micron Technology, Inc. NROM flash memory devices on ultrathin silicon
US7050330B2 (en) * 2003-12-16 2006-05-23 Micron Technology, Inc. Multi-state NROM device
US7269072B2 (en) * 2003-12-16 2007-09-11 Micron Technology, Inc. NROM memory cell, memory array, related devices and methods
US7241654B2 (en) * 2003-12-17 2007-07-10 Micron Technology, Inc. Vertical NROM NAND flash memory array
US7157769B2 (en) * 2003-12-18 2007-01-02 Micron Technology, Inc. Flash memory having a high-permittivity tunnel dielectric
US6878991B1 (en) 2004-01-30 2005-04-12 Micron Technology, Inc. Vertical device 4F2 EEPROM memory
US7221018B2 (en) * 2004-02-10 2007-05-22 Micron Technology, Inc. NROM flash memory with a high-permittivity gate dielectric
US6952366B2 (en) * 2004-02-10 2005-10-04 Micron Technology, Inc. NROM flash memory cell with integrated DRAM
US7075146B2 (en) 2004-02-24 2006-07-11 Micron Technology, Inc. 4F2 EEPROM NROM memory arrays with vertical devices
US7072217B2 (en) * 2004-02-24 2006-07-04 Micron Technology, Inc. Multi-state memory cell with asymmetric charge trapping
EP1569242A1 (de) * 2004-02-27 2005-08-31 STMicroelectronics S.r.l. Elektrisch wort-löschbare nicht-flüchtige Speicheranordnung und dazugehöriges Vorspannungsverfahren
US7102191B2 (en) * 2004-03-24 2006-09-05 Micron Technologies, Inc. Memory device with high dielectric constant gate dielectrics and metal floating gates
KR100546407B1 (ko) * 2004-04-30 2006-01-26 삼성전자주식회사 Eeprom 셀 제조방법
US7274068B2 (en) * 2004-05-06 2007-09-25 Micron Technology, Inc. Ballistic direct injection NROM cell on strained silicon structures
WO2006046301A1 (ja) * 2004-10-29 2006-05-04 Spansion Llc 半導体装置および半導体装置の製造方法
FR2914163B1 (fr) * 2007-04-02 2009-06-05 Oreal Applicateur pour appliquer une composition sur les cils
US8551858B2 (en) * 2010-02-03 2013-10-08 Spansion Llc Self-aligned SI rich nitride charge trap layer isolation for charge trap flash memory
US8383475B2 (en) 2010-09-23 2013-02-26 Globalfoundries Singapore Pte. Ltd. EEPROM cell
US9711516B2 (en) * 2015-10-30 2017-07-18 Taiwan Semiconductor Manufacturing Company Ltd. Non-volatile memory having a gate-layered triple well structure
US11641739B2 (en) * 2020-06-01 2023-05-02 Globalfoundries Singapore Pte. Ltd. Semiconductor non-volatile memory devices

Family Cites Families (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4258466A (en) * 1978-11-02 1981-03-31 Texas Instruments Incorporated High density electrically programmable ROM
US4377818A (en) * 1978-11-02 1983-03-22 Texas Instruments Incorporated High density electrically programmable ROM
US4561004A (en) * 1979-10-26 1985-12-24 Texas Instruments High density, electrically erasable, floating gate memory cell
US4375087C1 (en) * 1980-04-09 2002-01-01 Hughes Aircraft Co Electrically erasable programmable read-only memory
JPS57106079A (en) * 1980-12-23 1982-07-01 Toshiba Corp Mon-volatile semiconductor memory
US4688078A (en) * 1982-09-30 1987-08-18 Ning Hseih Partially relaxable composite dielectric structure
JPS59119871A (ja) * 1982-12-27 1984-07-11 Fujitsu Ltd 不揮発性半導体記憶装置の製造方法
US4822750A (en) * 1983-08-29 1989-04-18 Seeq Technology, Inc. MOS floating gate memory cell containing tunneling diffusion region in contact with drain and extending under edges of field oxide
US4598460A (en) * 1984-12-10 1986-07-08 Solid State Scientific, Inc. Method of making a CMOS EPROM with independently selectable thresholds
US4804637A (en) * 1985-09-27 1989-02-14 Texas Instruments Incorporated EEPROM memory cell and driving circuitry
US5156990A (en) * 1986-07-23 1992-10-20 Texas Instruments Incorporated Floating-gate memory cell with tailored doping profile
US4979005A (en) * 1986-07-23 1990-12-18 Texas Instruments Incorporated Floating-gate memory cell with tailored doping profile
FR2618011B1 (fr) * 1987-07-10 1992-09-18 Commissariat Energie Atomique Procede de fabrication d'une cellule de memoire
JP2550590B2 (ja) * 1987-07-22 1996-11-06 ソニー株式会社 半導体装置の製造方法
US5017980A (en) * 1988-07-15 1991-05-21 Texas Instruments Incorporated Electrically-erasable, electrically-programmable read-only memory cell
US5012307A (en) * 1988-07-15 1991-04-30 Texas Instruments Incorporated Electrically-erasable, electrically-programmable read-only memory
US5057448A (en) * 1988-02-26 1991-10-15 Hitachi, Ltd. Method of making a semiconductor device having DRAM cells and floating gate memory cells
US4947222A (en) * 1988-07-15 1990-08-07 Texas Instruments Incorporated Electrically programmable and erasable memory cells with field plate conductor defined drain regions
FR2635408B1 (fr) * 1988-08-11 1992-04-10 Sgs Thomson Microelectronics Memoire de type eprom a haute densite d'integration
US5051796A (en) * 1988-11-10 1991-09-24 Texas Instruments Incorporated Cross-point contact-free array with a high-density floating-gate structure
JPH0760867B2 (ja) * 1988-11-14 1995-06-28 株式会社東芝 不揮発性半導体メモリ
US5057886A (en) * 1988-12-21 1991-10-15 Texas Instruments Incorporated Non-volatile memory with improved coupling between gates
US4989053A (en) * 1989-03-27 1991-01-29 Shelton Everett K Nonvolatile process compatible with a digital and analog double level metal MOS process
US5081054A (en) * 1989-04-03 1992-01-14 Atmel Corporation Fabrication process for programmable and erasable MOS memory device
JP2907863B2 (ja) * 1989-04-26 1999-06-21 株式会社日立製作所 不揮発性半導体メモリの製造方法
US5177705A (en) * 1989-09-05 1993-01-05 Texas Instruments Incorporated Programming of an electrically-erasable, electrically-programmable, read-only memory array
JPH081933B2 (ja) * 1989-12-11 1996-01-10 株式会社東芝 不揮発性半導体記憶装置
US5019879A (en) * 1990-03-15 1991-05-28 Chiu Te Long Electrically-flash-erasable and electrically-programmable memory storage devices with self aligned tunnel dielectric area
US5204835A (en) * 1990-06-13 1993-04-20 Waferscale Integration Inc. Eprom virtual ground array
JPH0451573A (ja) * 1990-06-19 1992-02-20 Mitsubishi Electric Corp 半導体装置の製造方法
US5188976A (en) * 1990-07-13 1993-02-23 Hitachi, Ltd. Manufacturing method of non-volatile semiconductor memory device
US5120670A (en) * 1991-04-18 1992-06-09 National Semiconductor Corporation Thermal process for implementing the planarization inherent to stacked etch in virtual ground EPROM memories
US5218568A (en) * 1991-12-17 1993-06-08 Texas Instruments Incorporated Electrically-erasable, electrically-programmable read-only memory cell, an array of such cells and methods for making and using the same
US5225362A (en) * 1992-06-01 1993-07-06 National Semiconductor Corporation Method of manufacturing a full feature high density EEPROM cell with poly tunnel spacer

Also Published As

Publication number Publication date
US5379253A (en) 1995-01-03
JPH0685282A (ja) 1994-03-25
US5402372A (en) 1995-03-28
KR100316086B1 (ko) 2002-03-21
EP0573170A1 (de) 1993-12-08
US5453393A (en) 1995-09-26
KR940001425A (ko) 1994-01-11
US5455790A (en) 1995-10-03
DE69333359T2 (de) 2004-10-14
TW225043B (de) 1994-06-11
EP0573170B1 (de) 2003-12-17

Similar Documents

Publication Publication Date Title
DE69333359D1 (de) Herstellungsverfahren einer EEPROM-Zellen-Matrix
BR8504919A (pt) Processo de revestimento
DE69529529D1 (de) Herstellungsverfahren von dünnschicht-solarzellen
DE69627895D1 (de) Herstellungsverfahren von mikroprismenmatrixen
BR8303541A (pt) Substrato com um forro e processo de fabricacao do substrato
BR8202653A (pt) Painel de piso e processo de producao do mesmo
BR8202764A (pt) Diafragma e processo de fabricacao de diafragma
DE69016659D1 (de) Herstellungsverfahren von zellkunststoff.
BR8503294A (pt) Processo de fabricacao de metil-mercaptano
DE69304725D1 (de) Hydrobehandlungsverfahren
FI932571A0 (fi) Kemisk process
DE69608365T2 (de) Herstellungsverfahren einer Feldemissionsmatrix
NO860033L (no) Kjemisk prosess
DE69622445T2 (de) Herstellungsverfahren einer Feldemissionskaltkathode
BR8202343A (pt) Processo de fabricacao de um painel de construcao e painel de construcao
DK0667888T3 (da) Pigmentfremstillingsproces
DE69322831D1 (de) Herstellungsverfahren einer sekundärzelle
DE69409348D1 (de) Herstellungsverfahren von Brennstoffzellenkathoden
BR8504373A (pt) Composto de mica cilindrica e processo de moldagem de estrutura de mica cilindrica
BR8403050A (pt) Processo de auto-hidrogenacao
DK245986D0 (da) Coating process
DE69604883D1 (de) Batteriegehäuse Herstellungsverfahren
DE69513917D1 (de) Herstellungsverfahren von architektonischen Paneelen
ITMI911939A0 (it) Processo di fabbricazione di lattine
KR860005057A (ko) 폴리에스터 섬유의 제조방법

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
R082 Change of representative

Ref document number: 573170

Country of ref document: EP

Representative=s name: ,