DE69526996T2 - Ein-/Ausgabeadressübersetzungsmechanismen - Google Patents

Ein-/Ausgabeadressübersetzungsmechanismen

Info

Publication number
DE69526996T2
DE69526996T2 DE69526996T DE69526996T DE69526996T2 DE 69526996 T2 DE69526996 T2 DE 69526996T2 DE 69526996 T DE69526996 T DE 69526996T DE 69526996 T DE69526996 T DE 69526996T DE 69526996 T2 DE69526996 T2 DE 69526996T2
Authority
DE
Germany
Prior art keywords
input
address translation
output address
translation mechanisms
mechanisms
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69526996T
Other languages
English (en)
Other versions
DE69526996D1 (de
Inventor
K Monroe Bridges
Robert Brooks
William R Bryg
Stephen G Burger
Eric W Hamilton
Helen Nusbaum
Brendan A Voge
Michael L Ziegler
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hewlett Packard Development Co LP
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Publication of DE69526996D1 publication Critical patent/DE69526996D1/de
Application granted granted Critical
Publication of DE69526996T2 publication Critical patent/DE69526996T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1081—Address translation for peripheral access to main memory, e.g. direct memory access [DMA]
DE69526996T 1994-03-24 1995-03-09 Ein-/Ausgabeadressübersetzungsmechanismen Expired - Lifetime DE69526996T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/217,587 US5535352A (en) 1994-03-24 1994-03-24 Access hints for input/output address translation mechanisms

Publications (2)

Publication Number Publication Date
DE69526996D1 DE69526996D1 (de) 2002-07-18
DE69526996T2 true DE69526996T2 (de) 2003-03-20

Family

ID=22811684

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69526996T Expired - Lifetime DE69526996T2 (de) 1994-03-24 1995-03-09 Ein-/Ausgabeadressübersetzungsmechanismen

Country Status (4)

Country Link
US (1) US5535352A (de)
EP (1) EP0674270B1 (de)
JP (1) JP4136001B2 (de)
DE (1) DE69526996T2 (de)

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US6266753B1 (en) 1997-07-10 2001-07-24 Cirrus Logic, Inc. Memory manager for multi-media apparatus and method therefor
USRE42761E1 (en) 1997-12-31 2011-09-27 Crossroads Systems, Inc. Storage router and method for providing virtual local storage
US5941972A (en) 1997-12-31 1999-08-24 Crossroads Systems, Inc. Storage router and method for providing virtual local storage
US6023737A (en) * 1998-04-24 2000-02-08 International Business Machines Corporation Multi-stage pipelined data coalescing for improved frequency operation
US6148350A (en) * 1998-05-29 2000-11-14 3Com Corporation System for allocating an integer unit of memory greater than a requested size and filling the extra space due to difference in sizes with extraneous data
US6430657B1 (en) * 1998-10-12 2002-08-06 Institute For The Development Of Emerging Architecture L.L.C. Computer system that provides atomicity by using a tlb to indicate whether an exportable instruction should be executed using cache coherency or by exporting the exportable instruction, and emulates instructions specifying a bus lock
US7366845B2 (en) * 2004-06-29 2008-04-29 Intel Corporation Pushing of clean data to one or more processors in a system having a coherency protocol
US7350029B2 (en) * 2005-02-10 2008-03-25 International Business Machines Corporation Data stream prefetching in a microprocessor
US7380066B2 (en) * 2005-02-10 2008-05-27 International Business Machines Corporation Store stream prefetching in a microprocessor
US8266609B2 (en) * 2005-12-07 2012-09-11 Microsoft Corporation Efficient placement of software transactional memory operations around procedure calls
US8799882B2 (en) * 2005-12-07 2014-08-05 Microsoft Corporation Compiler support for optimizing decomposed software transactional memory operations
US8706950B2 (en) 2008-03-01 2014-04-22 Kabushiki Kaisha Toshiba Memory system
JP4621749B2 (ja) * 2008-03-01 2011-01-26 株式会社東芝 メモリシステム
US9195623B2 (en) * 2010-06-23 2015-11-24 International Business Machines Corporation Multiple address spaces per adapter with address translation
US8650337B2 (en) 2010-06-23 2014-02-11 International Business Machines Corporation Runtime determination of translation formats for adapter functions
US9342352B2 (en) 2010-06-23 2016-05-17 International Business Machines Corporation Guest access to address spaces of adapter
US8626970B2 (en) 2010-06-23 2014-01-07 International Business Machines Corporation Controlling access by a configuration to an adapter function
US8671287B2 (en) 2010-06-23 2014-03-11 International Business Machines Corporation Redundant power supply configuration for a data center
US8478922B2 (en) 2010-06-23 2013-07-02 International Business Machines Corporation Controlling a rate at which adapter interruption requests are processed
US8650335B2 (en) 2010-06-23 2014-02-11 International Business Machines Corporation Measurement facility for adapter functions
US8417911B2 (en) 2010-06-23 2013-04-09 International Business Machines Corporation Associating input/output device requests with memory associated with a logical partition
US8645767B2 (en) 2010-06-23 2014-02-04 International Business Machines Corporation Scalable I/O adapter function level error detection, isolation, and reporting
US8918573B2 (en) 2010-06-23 2014-12-23 International Business Machines Corporation Input/output (I/O) expansion response processing in a peripheral component interconnect express (PCIe) environment
US8572635B2 (en) 2010-06-23 2013-10-29 International Business Machines Corporation Converting a message signaled interruption into an I/O adapter event notification
US8677180B2 (en) 2010-06-23 2014-03-18 International Business Machines Corporation Switch failover control in a multiprocessor computer system
US9213661B2 (en) 2010-06-23 2015-12-15 International Business Machines Corporation Enable/disable adapters of a computing environment
US8683108B2 (en) 2010-06-23 2014-03-25 International Business Machines Corporation Connected input/output hub management
US8639858B2 (en) 2010-06-23 2014-01-28 International Business Machines Corporation Resizing address spaces concurrent to accessing the address spaces
US8656228B2 (en) 2010-06-23 2014-02-18 International Business Machines Corporation Memory error isolation and recovery in a multiprocessor computer system
US8505032B2 (en) 2010-06-23 2013-08-06 International Business Machines Corporation Operating system notification of actions to be taken responsive to adapter events
US8645606B2 (en) 2010-06-23 2014-02-04 International Business Machines Corporation Upbound input/output expansion request and response processing in a PCIe architecture
US8510599B2 (en) 2010-06-23 2013-08-13 International Business Machines Corporation Managing processing associated with hardware events
US8504754B2 (en) 2010-06-23 2013-08-06 International Business Machines Corporation Identification of types of sources of adapter interruptions
US8416834B2 (en) 2010-06-23 2013-04-09 International Business Machines Corporation Spread spectrum wireless communication code for data center environments
US8566480B2 (en) 2010-06-23 2013-10-22 International Business Machines Corporation Load instruction for communicating with adapters
US8615645B2 (en) 2010-06-23 2013-12-24 International Business Machines Corporation Controlling the selectively setting of operational parameters for an adapter
US8635430B2 (en) 2010-06-23 2014-01-21 International Business Machines Corporation Translation of input/output addresses to memory addresses
US8549182B2 (en) 2010-06-23 2013-10-01 International Business Machines Corporation Store/store block instructions for communicating with adapters
US8745292B2 (en) 2010-06-23 2014-06-03 International Business Machines Corporation System and method for routing I/O expansion requests and responses in a PCIE architecture
US8621112B2 (en) 2010-06-23 2013-12-31 International Business Machines Corporation Discovery by operating system of information relating to adapter functions accessible to the operating system
US8468284B2 (en) 2010-06-23 2013-06-18 International Business Machines Corporation Converting a message signaled interruption into an I/O adapter event notification to a guest operating system
US8615622B2 (en) 2010-06-23 2013-12-24 International Business Machines Corporation Non-standard I/O adapters in a standardized I/O architecture
CN113196234A (zh) * 2018-12-21 2021-07-30 英特尔公司 使用硬件分页提示的进程空间标识符虚拟化

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US4403282A (en) * 1978-01-23 1983-09-06 Data General Corporation Data processing system using a high speed data channel for providing direct memory access for block data transfers
US4525778A (en) * 1982-05-25 1985-06-25 Massachusetts Computer Corporation Computer memory control
US4574346A (en) * 1982-09-29 1986-03-04 International Business Machines Corporation Method and apparatus for peripheral data handling hierarchies
US4669043A (en) * 1984-02-17 1987-05-26 Signetics Corporation Memory access controller
US5347636A (en) * 1985-11-08 1994-09-13 Nec Corporation Data processor which efficiently accesses main memory and input/output devices
US4928239A (en) * 1986-06-27 1990-05-22 Hewlett-Packard Company Cache memory with variable fetch and replacement schemes
JPS63240632A (ja) * 1987-03-27 1988-10-06 Nec Corp 情報処理装置
EP0288649B1 (de) * 1987-04-22 1992-10-21 International Business Machines Corporation Speichersteuersystem
JPH0628036B2 (ja) * 1988-02-01 1994-04-13 インターナショナル・ビジネス・マシーンズ・コーポレーシヨン シミュレーシヨン方法
JPH061463B2 (ja) * 1990-01-16 1994-01-05 インターナショナル・ビジネス・マシーンズ・コーポレーション マルチプロセッサ・システムおよびそのプライベート・キャッシュ制御方法
DE69132300T2 (de) * 1990-03-12 2000-11-30 Hewlett Packard Co Durch Anwender festgelegter direkter Speicherzugriff mit Anwendung von virtuellen Adressen
JP2774862B2 (ja) * 1990-07-16 1998-07-09 株式会社日立製作所 Ｄｍａ制御装置および情報処理装置
GB2251102B (en) * 1990-12-21 1995-03-15 Sun Microsystems Inc Translation lookaside buffer
US5263140A (en) * 1991-01-23 1993-11-16 Silicon Graphics, Inc. Variable page size per entry translation look-aside buffer

Also Published As

Publication number Publication date
DE69526996D1 (de) 2002-07-18
EP0674270A2 (de) 1995-09-27
JPH07271668A (ja) 1995-10-20
EP0674270B1 (de) 2002-06-12
JP4136001B2 (ja) 2008-08-20
EP0674270A3 (de) 1996-06-26
US5535352A (en) 1996-07-09

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Legal Events

Date Code Title Description
8332 No legal effect for de
8370 Indication of lapse of patent is to be deleted
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: HEWLETT-PACKARD DEVELOPMENT CO., L.P., HOUSTON, TE