US5943242A
(en)
*
|
1995-11-17 |
1999-08-24 |
Pact Gmbh |
Dynamically reconfigurable data processing system
|
US7266725B2
(en)
|
2001-09-03 |
2007-09-04 |
Pact Xpp Technologies Ag |
Method for debugging reconfigurable architectures
|
DE19651075A1
(de)
|
1996-12-09 |
1998-06-10 |
Pact Inf Tech Gmbh |
Einheit zur Verarbeitung von numerischen und logischen Operationen, zum Einsatz in Prozessoren (CPU's), Mehrrechnersystemen, Datenflußprozessoren (DFP's), digitalen Signal Prozessoren (DSP's) oder dergleichen
|
DE19654595A1
(de)
|
1996-12-20 |
1998-07-02 |
Pact Inf Tech Gmbh |
I0- und Speicherbussystem für DFPs sowie Bausteinen mit zwei- oder mehrdimensionaler programmierbaren Zellstrukturen
|
US6338106B1
(en)
|
1996-12-20 |
2002-01-08 |
Pact Gmbh |
I/O and memory bus system for DFPS and units with two or multi-dimensional programmable cell architectures
|
DE19654846A1
(de)
|
1996-12-27 |
1998-07-09 |
Pact Inf Tech Gmbh |
Verfahren zum selbständigen dynamischen Umladen von Datenflußprozessoren (DFPs) sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstrukturen (FPGAs, DPGAs, o. dgl.)
|
EP1329816B1
(de)
|
1996-12-27 |
2011-06-22 |
Richter, Thomas |
Verfahren zum selbständigen dynamischen Umladen von Datenflussprozessoren (DFPs) sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstrukturen (FPGAs, DPGAs, o.dgl.)
|
DE19704728A1
(de)
|
1997-02-08 |
1998-08-13 |
Pact Inf Tech Gmbh |
Verfahren zur Selbstsynchronisation von konfigurierbaren Elementen eines programmierbaren Bausteines
|
US6542998B1
(en)
|
1997-02-08 |
2003-04-01 |
Pact Gmbh |
Method of self-synchronization of configurable elements of a programmable module
|
DE19704742A1
(de)
*
|
1997-02-11 |
1998-09-24 |
Pact Inf Tech Gmbh |
Internes Bussystem für DFPs, sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstrukturen, zur Bewältigung großer Datenmengen mit hohem Vernetzungsaufwand
|
US6160419A
(en)
*
|
1997-11-03 |
2000-12-12 |
Altera Corporation |
Programmable logic architecture incorporating a content addressable embedded array block
|
US6011407A
(en)
*
|
1997-06-13 |
2000-01-04 |
Xilinx, Inc. |
Field programmable gate array with dedicated computer bus interface and method for configuring both
|
US6092123A
(en)
*
|
1997-07-17 |
2000-07-18 |
International Business Machines Corporation |
Method and apparatus for changing functions of a hardware device using two or more communication channels
|
US8686549B2
(en)
|
2001-09-03 |
2014-04-01 |
Martin Vorbach |
Reconfigurable elements
|
US6034542A
(en)
*
|
1997-10-14 |
2000-03-07 |
Xilinx, Inc. |
Bus structure for modularized chip with FPGA modules
|
US5923892A
(en)
*
|
1997-10-27 |
1999-07-13 |
Levy; Paul S. |
Host processor and coprocessor arrangement for processing platform-independent code
|
DE19861088A1
(de)
|
1997-12-22 |
2000-02-10 |
Pact Inf Tech Gmbh |
Verfahren zur Reparatur von integrierten Schaltkreisen
|
US6034538A
(en)
*
|
1998-01-21 |
2000-03-07 |
Lucent Technologies Inc. |
Virtual logic system for reconfigurable hardware
|
DE19807872A1
(de)
|
1998-02-25 |
1999-08-26 |
Pact Inf Tech Gmbh |
Verfahren zur Verwaltung von Konfigurationsdaten in Datenflußprozessoren sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstruktur (FPGAs, DPGAs, o. dgl.
|
US6038627A
(en)
*
|
1998-03-16 |
2000-03-14 |
Actel Corporation |
SRAM bus architecture and interconnect to an FPGA
|
US7146441B1
(en)
*
|
1998-03-16 |
2006-12-05 |
Actel Corporation |
SRAM bus architecture and interconnect to an FPGA
|
US6237129B1
(en)
|
1998-03-27 |
2001-05-22 |
Xilinx, Inc. |
Method for constraining circuit element positions in structured layouts
|
US6260182B1
(en)
*
|
1998-03-27 |
2001-07-10 |
Xilinx, Inc. |
Method for specifying routing in a logic module by direct module communication
|
US6243851B1
(en)
|
1998-03-27 |
2001-06-05 |
Xilinx, Inc. |
Heterogeneous method for determining module placement in FPGAs
|
US6430732B1
(en)
|
1998-03-27 |
2002-08-06 |
Xilinx, Inc. |
Method for structured layout in a hardware description language
|
US6216258B1
(en)
|
1998-03-27 |
2001-04-10 |
Xilinx, Inc. |
FPGA modules parameterized by expressions
|
US6292925B1
(en)
|
1998-03-27 |
2001-09-18 |
Xilinx, Inc. |
Context-sensitive self implementing modules
|
US20050149694A1
(en)
*
|
1998-12-08 |
2005-07-07 |
Mukesh Patel |
Java hardware accelerator using microcode engine
|
US6826749B2
(en)
|
1998-12-08 |
2004-11-30 |
Nazomi Communications, Inc. |
Java hardware accelerator using thread manager
|
US6332215B1
(en)
|
1998-12-08 |
2001-12-18 |
Nazomi Communications, Inc. |
Java virtual machine hardware for RISC and CISC processors
|
US7225436B1
(en)
|
1998-12-08 |
2007-05-29 |
Nazomi Communications Inc. |
Java hardware accelerator using microcode engine
|
US6081473A
(en)
*
|
1998-12-15 |
2000-06-27 |
Lattice Semiconductor Corporation |
FPGA integrated circuit having embedded sram memory blocks each with statically and dynamically controllable read mode
|
US6262596B1
(en)
*
|
1999-04-05 |
2001-07-17 |
Xilinx, Inc. |
Configuration bus interface circuit for FPGAS
|
JP2003505753A
(ja)
|
1999-06-10 |
2003-02-12 |
ペーアーツェーテー インフォルマツィオーンステヒノロギー ゲゼルシャフト ミット ベシュレンクテル ハフツング |
セル構造におけるシーケンス分割方法
|
US6347346B1
(en)
*
|
1999-06-30 |
2002-02-12 |
Chameleon Systems, Inc. |
Local memory unit system with global access for use on reconfigurable chips
|
DE19946752A1
(de)
*
|
1999-09-29 |
2001-04-12 |
Infineon Technologies Ag |
Rekonfigurierbares Gate-Array
|
US6555398B1
(en)
*
|
1999-10-22 |
2003-04-29 |
Magic Corporation |
Software programmable multiple function integrated circuit module
|
US6438737B1
(en)
*
|
2000-02-15 |
2002-08-20 |
Intel Corporation |
Reconfigurable logic for a computer
|
DE10018374A1
(de)
*
|
2000-04-13 |
2001-10-18 |
Siemens Ag |
Mobiles Endgerät
|
DE50115584D1
(de)
|
2000-06-13 |
2010-09-16 |
Krass Maren |
Pipeline ct-protokolle und -kommunikation
|
US7346644B1
(en)
|
2000-09-18 |
2008-03-18 |
Altera Corporation |
Devices and methods with programmable logic and digital signal processing regions
|
US7119576B1
(en)
|
2000-09-18 |
2006-10-10 |
Altera Corporation |
Devices and methods with programmable logic and digital signal processing regions
|
US8058899B2
(en)
|
2000-10-06 |
2011-11-15 |
Martin Vorbach |
Logic cell array and bus system
|
KR20020028814A
(ko)
*
|
2000-10-10 |
2002-04-17 |
나조미 커뮤니케이션즈, 인코포레이티드 |
마이크로코드 엔진을 이용한 자바 하드웨어 가속기
|
DE10105987A1
(de)
*
|
2001-02-09 |
2002-08-29 |
Infineon Technologies Ag |
Datenverarbeitungsvorrichtung
|
US7444531B2
(en)
|
2001-03-05 |
2008-10-28 |
Pact Xpp Technologies Ag |
Methods and devices for treating and processing data
|
US7844796B2
(en)
|
2001-03-05 |
2010-11-30 |
Martin Vorbach |
Data processing device and method
|
US9037807B2
(en)
|
2001-03-05 |
2015-05-19 |
Pact Xpp Technologies Ag |
Processor arrangement on a chip including data processing, memory, and interface elements
|
US7653710B2
(en)
|
2002-06-25 |
2010-01-26 |
Qst Holdings, Llc. |
Hardware task manager
|
US6836839B2
(en)
|
2001-03-22 |
2004-12-28 |
Quicksilver Technology, Inc. |
Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements
|
US7249242B2
(en)
|
2002-10-28 |
2007-07-24 |
Nvidia Corporation |
Input pipeline registers for a node in an adaptive computing engine
|
US7962716B2
(en)
|
2001-03-22 |
2011-06-14 |
Qst Holdings, Inc. |
Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements
|
US7752419B1
(en)
|
2001-03-22 |
2010-07-06 |
Qst Holdings, Llc |
Method and system for managing hardware resources to implement system functions using an adaptive computing architecture
|
US8843928B2
(en)
|
2010-01-21 |
2014-09-23 |
Qst Holdings, Llc |
Method and apparatus for a general-purpose, multiple-core system for implementing stream-based computations
|
US6577678B2
(en)
|
2001-05-08 |
2003-06-10 |
Quicksilver Technology |
Method and system for reconfigurable channel coding
|
JP3561506B2
(ja)
*
|
2001-05-10 |
2004-09-02 |
東京エレクトロンデバイス株式会社 |
演算システム
|
US10031733B2
(en)
*
|
2001-06-20 |
2018-07-24 |
Scientia Sol Mentis Ag |
Method for processing data
|
AU2002347560A1
(en)
|
2001-06-20 |
2003-01-02 |
Pact Xpp Technologies Ag |
Data processing method
|
US7566478B2
(en)
|
2001-07-25 |
2009-07-28 |
Nantero, Inc. |
Methods of making carbon nanotube films, layers, fabrics, ribbons, elements and articles
|
US6924538B2
(en)
|
2001-07-25 |
2005-08-02 |
Nantero, Inc. |
Devices having vertically-disposed nanofabric articles and methods of making the same
|
US6919592B2
(en)
|
2001-07-25 |
2005-07-19 |
Nantero, Inc. |
Electromechanical memory array using nanotube ribbons and method for making same
|
US6835591B2
(en)
|
2001-07-25 |
2004-12-28 |
Nantero, Inc. |
Methods of nanotube films and articles
|
US6706402B2
(en)
|
2001-07-25 |
2004-03-16 |
Nantero, Inc. |
Nanotube films and articles
|
US6911682B2
(en)
|
2001-12-28 |
2005-06-28 |
Nantero, Inc. |
Electromechanical three-trace junction devices
|
US6574130B2
(en)
|
2001-07-25 |
2003-06-03 |
Nantero, Inc. |
Hybrid circuit having nanotube electromechanical memory
|
US6643165B2
(en)
|
2001-07-25 |
2003-11-04 |
Nantero, Inc. |
Electromechanical memory having cell selection circuitry constructed with nanotube technology
|
US7259410B2
(en)
|
2001-07-25 |
2007-08-21 |
Nantero, Inc. |
Devices having horizontally-disposed nanofabric articles and methods of making the same
|
US7996827B2
(en)
|
2001-08-16 |
2011-08-09 |
Martin Vorbach |
Method for the translation of programs for reconfigurable architectures
|
US8769508B2
(en)
|
2001-08-24 |
2014-07-01 |
Nazomi Communications Inc. |
Virtual machine hardware for RISC and CISC processors
|
US7434191B2
(en)
|
2001-09-03 |
2008-10-07 |
Pact Xpp Technologies Ag |
Router
|
JP4152319B2
(ja)
*
|
2001-09-07 |
2008-09-17 |
アイピーフレックス株式会社 |
データ処理システムおよびその制御方法
|
US8686475B2
(en)
|
2001-09-19 |
2014-04-01 |
Pact Xpp Technologies Ag |
Reconfigurable elements
|
US6901473B2
(en)
*
|
2001-10-16 |
2005-05-31 |
Sun Microsystems, Inc. |
Apparatus and method for configuring an external device
|
US7046635B2
(en)
|
2001-11-28 |
2006-05-16 |
Quicksilver Technology, Inc. |
System for authorizing functionality in adaptable hardware devices
|
US8412915B2
(en)
|
2001-11-30 |
2013-04-02 |
Altera Corporation |
Apparatus, system and method for configuration of adaptive integrated circuitry having heterogeneous computational elements
|
US6986021B2
(en)
|
2001-11-30 |
2006-01-10 |
Quick Silver Technology, Inc. |
Apparatus, method, system and executable module for configuration and operation of adaptive integrated circuitry having fixed, application specific computational elements
|
US7215701B2
(en)
|
2001-12-12 |
2007-05-08 |
Sharad Sambhwani |
Low I/O bandwidth method and system for implementing detection and identification of scrambling codes
|
US7176505B2
(en)
|
2001-12-28 |
2007-02-13 |
Nantero, Inc. |
Electromechanical three-trace junction devices
|
US6784028B2
(en)
|
2001-12-28 |
2004-08-31 |
Nantero, Inc. |
Methods of making electromechanical three-trace junction devices
|
US7403981B2
(en)
*
|
2002-01-04 |
2008-07-22 |
Quicksilver Technology, Inc. |
Apparatus and method for adaptive multimedia reception and transmission in communication environments
|
WO2003060747A2
(de)
|
2002-01-19 |
2003-07-24 |
Pact Xpp Technologies Ag |
Reconfigurierbarer prozessor
|
AU2003214003A1
(en)
|
2002-02-18 |
2003-09-09 |
Pact Xpp Technologies Ag |
Bus systems and method for reconfiguration
|
US7386717B2
(en)
*
|
2002-03-07 |
2008-06-10 |
Intel Corporation |
Method and system for accelerating the conversion process between encryption schemes
|
US8914590B2
(en)
|
2002-08-07 |
2014-12-16 |
Pact Xpp Technologies Ag |
Data processing method and device
|
US7335395B2
(en)
|
2002-04-23 |
2008-02-26 |
Nantero, Inc. |
Methods of using pre-formed nanotubes to make carbon nanotube films, layers, fabrics, ribbons, elements and articles
|
US7328414B1
(en)
|
2003-05-13 |
2008-02-05 |
Qst Holdings, Llc |
Method and system for creating and programming an adaptive computing engine
|
US7660984B1
(en)
|
2003-05-13 |
2010-02-09 |
Quicksilver Technology |
Method and system for achieving individualized protected space in an operating system
|
US7024654B2
(en)
|
2002-06-11 |
2006-04-04 |
Anadigm, Inc. |
System and method for configuring analog elements in a configurable hardware device
|
US20040133795A1
(en)
*
|
2002-07-26 |
2004-07-08 |
Eric Murray |
Method and system for handling multiple security protocols in a processing system
|
AU2003286131A1
(en)
|
2002-08-07 |
2004-03-19 |
Pact Xpp Technologies Ag |
Method and device for processing data
|
US7657861B2
(en)
|
2002-08-07 |
2010-02-02 |
Pact Xpp Technologies Ag |
Method and device for processing data
|
US20040044988A1
(en)
*
|
2002-08-29 |
2004-03-04 |
Schene Christopher Robin |
Generation of compiled code for simulator speed up
|
US8108656B2
(en)
|
2002-08-29 |
2012-01-31 |
Qst Holdings, Llc |
Task definition for specifying resource requirements
|
US20040122643A1
(en)
*
|
2002-08-29 |
2004-06-24 |
Anderson Howard C. |
Apparatus and method for simulating switched-capacitor circuits
|
US6978435B2
(en)
|
2002-08-29 |
2005-12-20 |
Anadigm, Inc. |
Apparatus for programming a programmable device, and method
|
EP1537486A1
(de)
|
2002-09-06 |
2005-06-08 |
PACT XPP Technologies AG |
Rekonfigurierbare sequenzerstruktur
|
US7937591B1
(en)
|
2002-10-25 |
2011-05-03 |
Qst Holdings, Llc |
Method and system for providing a device which can be adapted on an ongoing basis
|
US8276135B2
(en)
|
2002-11-07 |
2012-09-25 |
Qst Holdings Llc |
Profiling of software and circuit designs utilizing data operation analyses
|
US7225301B2
(en)
|
2002-11-22 |
2007-05-29 |
Quicksilver Technologies |
External memory controller node
|
US7560136B2
(en)
|
2003-01-13 |
2009-07-14 |
Nantero, Inc. |
Methods of using thin metal layers to make carbon nanotube films, layers, fabrics, ribbons, elements and articles
|
EP1676208A2
(de)
|
2003-08-28 |
2006-07-05 |
PACT XPP Technologies AG |
Datenverarbeitungseinrichtung und verfahren
|
US7840630B2
(en)
*
|
2003-12-29 |
2010-11-23 |
Xilinx, Inc. |
Arithmetic logic unit circuit
|
US7870182B2
(en)
|
2003-12-29 |
2011-01-11 |
Xilinx Inc. |
Digital signal processing circuit having an adder circuit with carry-outs
|
US7840627B2
(en)
|
2003-12-29 |
2010-11-23 |
Xilinx, Inc. |
Digital signal processing circuit having input register blocks
|
US7849119B2
(en)
|
2003-12-29 |
2010-12-07 |
Xilinx, Inc. |
Digital signal processing circuit having a pattern detector circuit
|
US7882165B2
(en)
|
2003-12-29 |
2011-02-01 |
Xilinx, Inc. |
Digital signal processing element having an arithmetic logic unit
|
US7844653B2
(en)
|
2003-12-29 |
2010-11-30 |
Xilinx, Inc. |
Digital signal processing circuit having a pre-adder circuit
|
US7853636B2
(en)
|
2003-12-29 |
2010-12-14 |
Xilinx, Inc. |
Digital signal processing circuit having a pattern detector circuit for convergent rounding
|
US8495122B2
(en)
|
2003-12-29 |
2013-07-23 |
Xilinx, Inc. |
Programmable device with dynamic DSP architecture
|
US7853632B2
(en)
|
2003-12-29 |
2010-12-14 |
Xilinx, Inc. |
Architectural floorplan for a digital signal processing circuit
|
US7853634B2
(en)
|
2003-12-29 |
2010-12-14 |
Xilinx, Inc. |
Digital signal processing circuit having a SIMD circuit
|
US7865542B2
(en)
|
2003-12-29 |
2011-01-04 |
Xilinx, Inc. |
Digital signal processing block having a wide multiplexer
|
US7472155B2
(en)
|
2003-12-29 |
2008-12-30 |
Xilinx, Inc. |
Programmable logic device with cascading DSP slices
|
US7860915B2
(en)
|
2003-12-29 |
2010-12-28 |
Xilinx, Inc. |
Digital signal processing circuit having a pattern circuit for determining termination conditions
|
US7480690B2
(en)
|
2003-12-29 |
2009-01-20 |
Xilinx, Inc. |
Arithmetic circuit with multiplexed addend inputs
|
US7567997B2
(en)
|
2003-12-29 |
2009-07-28 |
Xilinx, Inc. |
Applications of cascading DSP slices
|
US7467175B2
(en)
|
2003-12-29 |
2008-12-16 |
Xilinx, Inc. |
Programmable logic device with pipelined DSP slices
|
US7987312B2
(en)
*
|
2004-07-30 |
2011-07-26 |
Via Technologies, Inc. |
Method and apparatus for dynamically determining bit configuration
|
US7546441B1
(en)
|
2004-08-06 |
2009-06-09 |
Xilinx, Inc. |
Coprocessor interface controller
|
US7346759B1
(en)
|
2004-08-06 |
2008-03-18 |
Xilinx, Inc. |
Decoder interface
|
US7590822B1
(en)
|
2004-08-06 |
2009-09-15 |
Xilinx, Inc. |
Tracking an instruction through a processor pipeline
|
US7590823B1
(en)
*
|
2004-08-06 |
2009-09-15 |
Xilinx, Inc. |
Method and system for handling an instruction not supported in a coprocessor formed using configurable logic
|
JP4527571B2
(ja)
*
|
2005-03-14 |
2010-08-18 |
富士通株式会社 |
再構成可能演算処理装置
|
US8138788B2
(en)
*
|
2005-05-31 |
2012-03-20 |
Fuji Xerox Co., Ltd. |
Reconfigurable device
|
US8386722B1
(en)
|
2008-06-23 |
2013-02-26 |
Google Inc. |
Stacked DIMM memory interface
|
US8796830B1
(en)
|
2006-09-01 |
2014-08-05 |
Google Inc. |
Stackable low-profile lead frame package
|
US8055833B2
(en)
|
2006-10-05 |
2011-11-08 |
Google Inc. |
System and method for increasing capacity, performance, and flexibility of flash storage
|
WO2007002324A2
(en)
*
|
2005-06-24 |
2007-01-04 |
Metaram, Inc. |
An integrated memory core and memory interface circuit
|
US8041881B2
(en)
|
2006-07-31 |
2011-10-18 |
Google Inc. |
Memory device with emulated characteristics
|
US20080082763A1
(en)
|
2006-10-02 |
2008-04-03 |
Metaram, Inc. |
Apparatus and method for power management of memory circuits by a system or component thereof
|
US8335894B1
(en)
|
2008-07-25 |
2012-12-18 |
Google Inc. |
Configurable memory system with interface circuit
|
US8327104B2
(en)
|
2006-07-31 |
2012-12-04 |
Google Inc. |
Adjusting the timing of signals associated with a memory system
|
US8090897B2
(en)
|
2006-07-31 |
2012-01-03 |
Google Inc. |
System and method for simulating an aspect of a memory circuit
|
US9171585B2
(en)
|
2005-06-24 |
2015-10-27 |
Google Inc. |
Configurable memory circuit system and method
|
US9542352B2
(en)
|
2006-02-09 |
2017-01-10 |
Google Inc. |
System and method for reducing command scheduling constraints of memory circuits
|
US8359187B2
(en)
|
2005-06-24 |
2013-01-22 |
Google Inc. |
Simulating a different number of memory circuit devices
|
US7609567B2
(en)
|
2005-06-24 |
2009-10-27 |
Metaram, Inc. |
System and method for simulating an aspect of a memory circuit
|
US8438328B2
(en)
|
2008-02-21 |
2013-05-07 |
Google Inc. |
Emulation of abstracted DIMMs using abstracted DRAMs
|
US20080028136A1
(en)
|
2006-07-31 |
2008-01-31 |
Schakel Keith R |
Method and apparatus for refresh management of memory modules
|
US8089795B2
(en)
|
2006-02-09 |
2012-01-03 |
Google Inc. |
Memory module with memory stack and interface with enhanced capabilities
|
US8244971B2
(en)
|
2006-07-31 |
2012-08-14 |
Google Inc. |
Memory circuit system and method
|
US8111566B1
(en)
|
2007-11-16 |
2012-02-07 |
Google, Inc. |
Optimal channel design for memory devices for providing a high-speed memory interface
|
US8081474B1
(en)
|
2007-12-18 |
2011-12-20 |
Google Inc. |
Embossed heat spreader
|
US8077535B2
(en)
|
2006-07-31 |
2011-12-13 |
Google Inc. |
Memory refresh apparatus and method
|
US8130560B1
(en)
|
2006-11-13 |
2012-03-06 |
Google Inc. |
Multi-rank partial width memory modules
|
US9507739B2
(en)
|
2005-06-24 |
2016-11-29 |
Google Inc. |
Configurable memory circuit system and method
|
US8060774B2
(en)
|
2005-06-24 |
2011-11-15 |
Google Inc. |
Memory systems and memory modules
|
US10013371B2
(en)
|
2005-06-24 |
2018-07-03 |
Google Llc |
Configurable memory circuit system and method
|
US7386656B2
(en)
|
2006-07-31 |
2008-06-10 |
Metaram, Inc. |
Interface circuit system and method for performing power management operations in conjunction with only a portion of a memory circuit
|
US8397013B1
(en)
|
2006-10-05 |
2013-03-12 |
Google Inc. |
Hybrid memory module
|
GB2444663B
(en)
|
2005-09-02 |
2011-12-07 |
Metaram Inc |
Methods and apparatus of stacking drams
|
US8620980B1
(en)
|
2005-09-27 |
2013-12-31 |
Altera Corporation |
Programmable device with specialized multiplier blocks
|
JP4909588B2
(ja)
|
2005-12-28 |
2012-04-04 |
日本電気株式会社 |
情報処理装置及び再構成デバイスの利用方法
|
EP1974265A1
(de)
|
2006-01-18 |
2008-10-01 |
PACT XPP Technologies AG |
Hardwaredefinitionsverfahren
|
US9632929B2
(en)
|
2006-02-09 |
2017-04-25 |
Google Inc. |
Translating an address associated with a command communicated between a system and memory circuits
|
US8041759B1
(en)
|
2006-02-09 |
2011-10-18 |
Altera Corporation |
Specialized processing block for programmable logic device
|
US8266198B2
(en)
|
2006-02-09 |
2012-09-11 |
Altera Corporation |
Specialized processing block for programmable logic device
|
US8266199B2
(en)
|
2006-02-09 |
2012-09-11 |
Altera Corporation |
Specialized processing block for programmable logic device
|
US8301681B1
(en)
|
2006-02-09 |
2012-10-30 |
Altera Corporation |
Specialized processing block for programmable logic device
|
US7836117B1
(en)
|
2006-04-07 |
2010-11-16 |
Altera Corporation |
Specialized processing block for programmable logic device
|
US7539967B1
(en)
*
|
2006-05-05 |
2009-05-26 |
Altera Corporation |
Self-configuring components on a device
|
US7822799B1
(en)
|
2006-06-26 |
2010-10-26 |
Altera Corporation |
Adder-rounder circuitry for specialized processing block in programmable logic device
|
US7724589B2
(en)
|
2006-07-31 |
2010-05-25 |
Google Inc. |
System and method for delaying a signal communicated from a system to at least one of a plurality of memory circuits
|
US8386550B1
(en)
|
2006-09-20 |
2013-02-26 |
Altera Corporation |
Method for configuring a finite impulse response filter in a programmable logic device
|
US7930336B2
(en)
|
2006-12-05 |
2011-04-19 |
Altera Corporation |
Large multiplier for programmable logic device
|
US8386553B1
(en)
|
2006-12-05 |
2013-02-26 |
Altera Corporation |
Large multiplier for programmable logic device
|
US7814137B1
(en)
|
2007-01-09 |
2010-10-12 |
Altera Corporation |
Combined interpolation and decimation filter for programmable logic device
|
US7865541B1
(en)
|
2007-01-22 |
2011-01-04 |
Altera Corporation |
Configuring floating point operations in a programmable logic device
|
US8650231B1
(en)
|
2007-01-22 |
2014-02-11 |
Altera Corporation |
Configuring floating point operations in a programmable device
|
US8645450B1
(en)
|
2007-03-02 |
2014-02-04 |
Altera Corporation |
Multiplier-accumulator circuitry and methods
|
JP4852149B2
(ja)
*
|
2007-05-21 |
2012-01-11 |
ルネサスエレクトロニクス株式会社 |
半導体装置
|
WO2008142767A1
(ja)
*
|
2007-05-21 |
2008-11-27 |
Renesas Technology Corp. |
半導体装置
|
US8209479B2
(en)
|
2007-07-18 |
2012-06-26 |
Google Inc. |
Memory circuit system and method
|
US7949699B1
(en)
|
2007-08-30 |
2011-05-24 |
Altera Corporation |
Implementation of decimation filter in integrated circuit device using ram-based data storage
|
US8080874B1
(en)
|
2007-09-14 |
2011-12-20 |
Google Inc. |
Providing additional space between an integrated circuit and a circuit board for positioning a component therebetween
|
US8959137B1
(en)
|
2008-02-20 |
2015-02-17 |
Altera Corporation |
Implementing large multipliers in a programmable integrated circuit device
|
US8244789B1
(en)
|
2008-03-14 |
2012-08-14 |
Altera Corporation |
Normalization of floating point operations in a programmable integrated circuit device
|
US8626815B1
(en)
|
2008-07-14 |
2014-01-07 |
Altera Corporation |
Configuring a programmable integrated circuit device to perform matrix multiplication
|
US8255448B1
(en)
|
2008-10-02 |
2012-08-28 |
Altera Corporation |
Implementing division in a programmable integrated circuit device
|
US8307023B1
(en)
|
2008-10-10 |
2012-11-06 |
Altera Corporation |
DSP block for implementing large multiplier on a programmable integrated circuit device
|
US8479133B2
(en)
|
2009-01-27 |
2013-07-02 |
Xilinx, Inc. |
Method of and circuit for implementing a filter in an integrated circuit
|
US8543635B2
(en)
|
2009-01-27 |
2013-09-24 |
Xilinx, Inc. |
Digital signal processing block with preadder stage
|
US8886696B1
(en)
|
2009-03-03 |
2014-11-11 |
Altera Corporation |
Digital signal processing circuitry with redundancy and ability to support larger multipliers
|
US8805916B2
(en)
|
2009-03-03 |
2014-08-12 |
Altera Corporation |
Digital signal processing circuitry with redundancy and bidirectional data paths
|
US8549055B2
(en)
|
2009-03-03 |
2013-10-01 |
Altera Corporation |
Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitry
|
US8468192B1
(en)
|
2009-03-03 |
2013-06-18 |
Altera Corporation |
Implementing multipliers in a programmable integrated circuit device
|
US8645449B1
(en)
|
2009-03-03 |
2014-02-04 |
Altera Corporation |
Combined floating point adder and subtractor
|
US8706790B1
(en)
|
2009-03-03 |
2014-04-22 |
Altera Corporation |
Implementing mixed-precision floating-point operations in a programmable integrated circuit device
|
EP2441007A1
(de)
|
2009-06-09 |
2012-04-18 |
Google, Inc. |
Programmierung von dimm-abschlusswiderstandswerten
|
US8650236B1
(en)
|
2009-08-04 |
2014-02-11 |
Altera Corporation |
High-rate interpolation or decimation filter in integrated circuit device
|
US8412756B1
(en)
|
2009-09-11 |
2013-04-02 |
Altera Corporation |
Multi-operand floating point operations in a programmable integrated circuit device
|
US8396914B1
(en)
|
2009-09-11 |
2013-03-12 |
Altera Corporation |
Matrix decomposition in an integrated circuit device
|
US8539016B1
(en)
|
2010-02-09 |
2013-09-17 |
Altera Corporation |
QR decomposition in an integrated circuit device
|
US7948267B1
(en)
|
2010-02-09 |
2011-05-24 |
Altera Corporation |
Efficient rounding circuits and methods in configurable integrated circuit devices
|
US8601044B2
(en)
|
2010-03-02 |
2013-12-03 |
Altera Corporation |
Discrete Fourier Transform in an integrated circuit device
|
US8458243B1
(en)
|
2010-03-03 |
2013-06-04 |
Altera Corporation |
Digital signal processing circuit blocks with support for systolic finite-impulse-response digital filtering
|
US8484265B1
(en)
|
2010-03-04 |
2013-07-09 |
Altera Corporation |
Angular range reduction in an integrated circuit device
|
US8510354B1
(en)
|
2010-03-12 |
2013-08-13 |
Altera Corporation |
Calculation of trigonometric functions in an integrated circuit device
|
US8539014B2
(en)
|
2010-03-25 |
2013-09-17 |
Altera Corporation |
Solving linear matrices in an integrated circuit device
|
US8589463B2
(en)
|
2010-06-25 |
2013-11-19 |
Altera Corporation |
Calculation of trigonometric functions in an integrated circuit device
|
US8862650B2
(en)
|
2010-06-25 |
2014-10-14 |
Altera Corporation |
Calculation of trigonometric functions in an integrated circuit device
|
WO2012022496A2
(en)
|
2010-08-19 |
2012-02-23 |
Per Sonne Holm |
Method for killing tumor stem cells
|
US8577951B1
(en)
|
2010-08-19 |
2013-11-05 |
Altera Corporation |
Matrix operations in an integrated circuit device
|
US9582266B2
(en)
*
|
2011-02-28 |
2017-02-28 |
Microsemi SoC Corporation |
Apparatus and methods for in-application programming of flash-based programable logic devices
|
US8645451B2
(en)
|
2011-03-10 |
2014-02-04 |
Altera Corporation |
Double-clocked specialized processing block in an integrated circuit device
|
US9600278B1
(en)
|
2011-05-09 |
2017-03-21 |
Altera Corporation |
Programmable device using fixed and configurable logic to implement recursive trees
|
US8812576B1
(en)
|
2011-09-12 |
2014-08-19 |
Altera Corporation |
QR decomposition in an integrated circuit device
|
US8949298B1
(en)
|
2011-09-16 |
2015-02-03 |
Altera Corporation |
Computing floating-point polynomials in an integrated circuit device
|
US9053045B1
(en)
|
2011-09-16 |
2015-06-09 |
Altera Corporation |
Computing floating-point polynomials in an integrated circuit device
|
US8762443B1
(en)
|
2011-11-15 |
2014-06-24 |
Altera Corporation |
Matrix operations in an integrated circuit device
|
US8543634B1
(en)
|
2012-03-30 |
2013-09-24 |
Altera Corporation |
Specialized processing block for programmable integrated circuit device
|
CN104335282B
(zh)
|
2012-03-30 |
2017-11-17 |
英特尔公司 |
用于可编程器件阵列的基于自旋转移矩的存储器元件
|
US9098332B1
(en)
|
2012-06-01 |
2015-08-04 |
Altera Corporation |
Specialized processing block with fixed- and floating-point structures
|
US8996600B1
(en)
|
2012-08-03 |
2015-03-31 |
Altera Corporation |
Specialized processing block for implementing floating-point multiplier with subnormal operation support
|
US9207909B1
(en)
|
2012-11-26 |
2015-12-08 |
Altera Corporation |
Polynomial calculations optimized for programmable integrated circuit device structures
|
KR102032895B1
(ko)
|
2013-01-28 |
2019-11-08 |
삼성전자주식회사 |
기능 유닛들 간의 기능 로직 공유 장치, 방법 및 재구성 가능 프로세서
|
US9189200B1
(en)
|
2013-03-14 |
2015-11-17 |
Altera Corporation |
Multiple-precision processing block in a programmable integrated circuit device
|
US9348795B1
(en)
|
2013-07-03 |
2016-05-24 |
Altera Corporation |
Programmable device using fixed and configurable logic to implement floating-point rounding
|
CN104636151B
(zh)
*
|
2013-11-06 |
2018-06-05 |
京微雅格(北京)科技有限公司 |
基于应用存储器的fpga芯片配置结构和配置方法
|
CN104636290B
(zh)
*
|
2013-11-06 |
2018-05-25 |
京微雅格(北京)科技有限公司 |
基于多配置链组的fpga芯片配置结构和配置方法
|
US9379687B1
(en)
|
2014-01-14 |
2016-06-28 |
Altera Corporation |
Pipelined systolic finite impulse response filter
|
US9684488B2
(en)
|
2015-03-26 |
2017-06-20 |
Altera Corporation |
Combined adder and pre-adder for high-radix multiplier circuit
|
US20180081834A1
(en)
*
|
2016-09-16 |
2018-03-22 |
Futurewei Technologies, Inc. |
Apparatus and method for configuring hardware to operate in multiple modes during runtime
|
US10242728B2
(en)
*
|
2016-10-27 |
2019-03-26 |
Samsung Electronics Co., Ltd. |
DPU architecture
|
US10942706B2
(en)
|
2017-05-05 |
2021-03-09 |
Intel Corporation |
Implementation of floating-point trigonometric functions in an integrated circuit device
|
CN111459874A
(zh)
*
|
2020-04-02 |
2020-07-28 |
京微齐力(北京)科技有限公司 |
一种现场可编程门阵列配置闪存的复用方法
|