DE69927967D1 - Programmierungverfahren eines nichtflüchtigen Multibit Speichers durch Regelung der Gatespannung - Google Patents

Programmierungverfahren eines nichtflüchtigen Multibit Speichers durch Regelung der Gatespannung

Info

Publication number
DE69927967D1
DE69927967D1 DE69927967T DE69927967T DE69927967D1 DE 69927967 D1 DE69927967 D1 DE 69927967D1 DE 69927967 T DE69927967 T DE 69927967T DE 69927967 T DE69927967 T DE 69927967T DE 69927967 D1 DE69927967 D1 DE 69927967D1
Authority
DE
Germany
Prior art keywords
regulating
gate voltage
bit memory
programming method
volatile multi
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69927967T
Other languages
English (en)
Other versions
DE69927967T2 (de
Inventor
Guido Torelli
Alberto Modelli
Alessandro Manstretta
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
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STMicroelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SRL filed Critical STMicroelectronics SRL
Publication of DE69927967D1 publication Critical patent/DE69927967D1/de
Application granted granted Critical
Publication of DE69927967T2 publication Critical patent/DE69927967T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628Programming or writing circuits; Data input circuits
DE69927967T 1999-08-03 1999-08-03 Programmierungverfahren eines nichtflüchtigen Multibit Speichers durch Regelung der Gatespannung Expired - Lifetime DE69927967T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP99830501A EP1074995B1 (de) 1999-08-03 1999-08-03 Programmierungverfahren eines nichtflüchtigen Multibit Speichers durch Regelung der Gatespannung

Publications (2)

Publication Number Publication Date
DE69927967D1 true DE69927967D1 (de) 2005-12-01
DE69927967T2 DE69927967T2 (de) 2006-07-27

Family

ID=8243537

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69927967T Expired - Lifetime DE69927967T2 (de) 1999-08-03 1999-08-03 Programmierungverfahren eines nichtflüchtigen Multibit Speichers durch Regelung der Gatespannung

Country Status (4)

Country Link
US (1) US6366496B1 (de)
EP (1) EP1074995B1 (de)
JP (1) JP4469475B2 (de)
DE (1) DE69927967T2 (de)

Families Citing this family (100)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100385228B1 (ko) * 2001-04-18 2003-05-27 삼성전자주식회사 불휘발성 메모리를 프로그램하는 방법 및 장치
US6504760B1 (en) * 2001-06-22 2003-01-07 Intel Corporation Charging a capacitance of a memory cell and charger
US6700820B2 (en) 2002-01-03 2004-03-02 Intel Corporation Programming non-volatile memory devices
TWI292914B (de) * 2002-01-17 2008-01-21 Macronix Int Co Ltd
JP3908957B2 (ja) * 2002-01-24 2007-04-25 シャープ株式会社 不揮発性半導体メモリ装置
CN100409367C (zh) * 2002-01-30 2008-08-06 旺宏电子股份有限公司 多重值闪存的写入与清除方法
TWI244165B (en) * 2002-10-07 2005-11-21 Infineon Technologies Ag Single bit nonvolatile memory cell and methods for programming and erasing thereof
US6847550B2 (en) * 2002-10-25 2005-01-25 Nexflash Technologies, Inc. Nonvolatile semiconductor memory having three-level memory cells and program and read mapping circuits therefor
ITMI20022531A1 (it) * 2002-11-28 2004-05-29 St Microelectronics Srl Metodo di programmazione di celle di memoria non volatile multilivello e relativo circuito di programmazione
KR100558004B1 (ko) * 2003-10-22 2006-03-06 삼성전자주식회사 게이트 전극과 반도체 기판 사이에 전하저장층을 갖는비휘발성 메모리 소자의 프로그램 방법
KR100632940B1 (ko) 2004-05-06 2006-10-12 삼성전자주식회사 프로그램 사이클 시간을 가변시킬 수 있는 불 휘발성반도체 메모리 장치
KR100890672B1 (ko) * 2005-02-03 2009-03-26 가부시끼가이샤 도시바 불휘발성 반도체 기억 장치 및 그 동작 방법
KR100794654B1 (ko) 2005-07-06 2008-01-14 삼성전자주식회사 상 변화 메모리 장치 및 그것의 프로그램 방법
JPWO2007043133A1 (ja) * 2005-10-04 2009-04-16 スパンション エルエルシー 半導体装置およびその制御方法
US7180780B1 (en) * 2005-11-17 2007-02-20 Macronix International Co., Ltd. Multi-level-cell programming methods of non-volatile memories
CN103258572B (zh) 2006-05-12 2016-12-07 苹果公司 存储设备中的失真估计和消除
WO2007132456A2 (en) 2006-05-12 2007-11-22 Anobit Technologies Ltd. Memory device with adaptive capacity
US8156403B2 (en) 2006-05-12 2012-04-10 Anobit Technologies Ltd. Combined distortion estimation and error correction coding for memory devices
US7663925B2 (en) * 2006-05-15 2010-02-16 Micron Technology Inc. Method and apparatus for programming flash memory
US8060806B2 (en) * 2006-08-27 2011-11-15 Anobit Technologies Ltd. Estimation of non-linear distortion in memory devices
US7602650B2 (en) * 2006-08-30 2009-10-13 Samsung Electronics Co., Ltd. Flash memory device and method for programming multi-level cells in the same
US7525838B2 (en) * 2006-08-30 2009-04-28 Samsung Electronics Co., Ltd. Flash memory device and method for programming multi-level cells in the same
US7975192B2 (en) 2006-10-30 2011-07-05 Anobit Technologies Ltd. Reading memory cells using multiple thresholds
US7924648B2 (en) * 2006-11-28 2011-04-12 Anobit Technologies Ltd. Memory power and performance management
WO2008068747A2 (en) 2006-12-03 2008-06-12 Anobit Technologies Ltd. Automatic defect management in memory devices
US7900102B2 (en) 2006-12-17 2011-03-01 Anobit Technologies Ltd. High-speed programming of memory devices
KR100816161B1 (ko) * 2007-01-23 2008-03-21 주식회사 하이닉스반도체 플래시 메모리 소자의 프로그램 방법
US7751240B2 (en) 2007-01-24 2010-07-06 Anobit Technologies Ltd. Memory device with negative thresholds
US8151166B2 (en) 2007-01-24 2012-04-03 Anobit Technologies Ltd. Reduction of back pattern dependency effects in memory devices
WO2008111058A2 (en) 2007-03-12 2008-09-18 Anobit Technologies Ltd. Adaptive estimation of memory cell read thresholds
WO2008124760A2 (en) * 2007-04-10 2008-10-16 Sandisk Corporation Non-volatile memory and method for predictive programming
US7551483B2 (en) * 2007-04-10 2009-06-23 Sandisk Corporation Non-volatile memory with predictive programming
US7643348B2 (en) * 2007-04-10 2010-01-05 Sandisk Corporation Predictive programming in non-volatile memory
US8001320B2 (en) 2007-04-22 2011-08-16 Anobit Technologies Ltd. Command interface for memory devices
US8234545B2 (en) 2007-05-12 2012-07-31 Apple Inc. Data storage with incremental redundancy
WO2008139441A2 (en) * 2007-05-12 2008-11-20 Anobit Technologies Ltd. Memory device with internal signal processing unit
US7925936B1 (en) 2007-07-13 2011-04-12 Anobit Technologies Ltd. Memory device with non-uniform programming levels
US8259497B2 (en) * 2007-08-06 2012-09-04 Apple Inc. Programming schemes for multi-level analog memory cells
US8174905B2 (en) 2007-09-19 2012-05-08 Anobit Technologies Ltd. Programming orders for reducing distortion in arrays of multi-level analog memory cells
US8527819B2 (en) 2007-10-19 2013-09-03 Apple Inc. Data storage in analog memory cell arrays having erase failures
US8068360B2 (en) 2007-10-19 2011-11-29 Anobit Technologies Ltd. Reading analog memory cells using built-in multi-threshold commands
US8000141B1 (en) 2007-10-19 2011-08-16 Anobit Technologies Ltd. Compensation for voltage drifts in analog memory cells
WO2009063450A2 (en) 2007-11-13 2009-05-22 Anobit Technologies Optimized selection of memory units in multi-unit memory devices
US8225181B2 (en) 2007-11-30 2012-07-17 Apple Inc. Efficient re-read operations from memory devices
US7688638B2 (en) * 2007-12-07 2010-03-30 Sandisk Corporation Faster programming of multi-level non-volatile storage through reduced verify operations
US8209588B2 (en) 2007-12-12 2012-06-26 Anobit Technologies Ltd. Efficient interference cancellation in analog memory cell arrays
US8456905B2 (en) * 2007-12-16 2013-06-04 Apple Inc. Efficient data storage in multi-plane memory devices
US8085586B2 (en) 2007-12-27 2011-12-27 Anobit Technologies Ltd. Wear level estimation in analog memory cells
US8156398B2 (en) 2008-02-05 2012-04-10 Anobit Technologies Ltd. Parameter estimation based on error correction code parity check equations
US7924587B2 (en) * 2008-02-21 2011-04-12 Anobit Technologies Ltd. Programming of analog memory cells using a single programming pulse per state transition
US8230300B2 (en) 2008-03-07 2012-07-24 Apple Inc. Efficient readout from analog memory cells using data compression
US8059457B2 (en) 2008-03-18 2011-11-15 Anobit Technologies Ltd. Memory device with multiple-accuracy read commands
US8400858B2 (en) 2008-03-18 2013-03-19 Apple Inc. Memory device with reduced sense time readout
US7826271B2 (en) * 2008-06-12 2010-11-02 Sandisk Corporation Nonvolatile memory with index programming and reduced verify
US7813172B2 (en) 2008-06-12 2010-10-12 Sandisk Corporation Nonvolatile memory with correlated multiple pass programming
US7800945B2 (en) * 2008-06-12 2010-09-21 Sandisk Corporation Method for index programming and reduced verify in nonvolatile memory
US7796435B2 (en) * 2008-06-12 2010-09-14 Sandisk Corporation Method for correlated multiple pass programming in nonvolatile memory
US7924613B1 (en) 2008-08-05 2011-04-12 Anobit Technologies Ltd. Data storage in analog memory cells with protection against programming interruption
US7995388B1 (en) 2008-08-05 2011-08-09 Anobit Technologies Ltd. Data storage using modified voltages
US7715235B2 (en) * 2008-08-25 2010-05-11 Sandisk Corporation Non-volatile memory and method for ramp-down programming
US8169825B1 (en) 2008-09-02 2012-05-01 Anobit Technologies Ltd. Reliable data storage in analog memory cells subjected to long retention periods
US8949684B1 (en) 2008-09-02 2015-02-03 Apple Inc. Segmented data storage
US8482978B1 (en) 2008-09-14 2013-07-09 Apple Inc. Estimation of memory cell read thresholds by sampling inside programming level distribution intervals
US8000135B1 (en) 2008-09-14 2011-08-16 Anobit Technologies Ltd. Estimation of memory cell read thresholds by sampling inside programming level distribution intervals
US8239734B1 (en) 2008-10-15 2012-08-07 Apple Inc. Efficient data storage in storage device arrays
US8713330B1 (en) 2008-10-30 2014-04-29 Apple Inc. Data scrambling in memory devices
US8208304B2 (en) 2008-11-16 2012-06-26 Anobit Technologies Ltd. Storage at M bits/cell density in N bits/cell analog memory cell devices, M>N
US8174857B1 (en) 2008-12-31 2012-05-08 Anobit Technologies Ltd. Efficient readout schemes for analog memory cell devices using multiple read threshold sets
US8248831B2 (en) 2008-12-31 2012-08-21 Apple Inc. Rejuvenation of analog memory cells
US8924661B1 (en) 2009-01-18 2014-12-30 Apple Inc. Memory system including a controller and processors associated with memory devices
US8223551B2 (en) * 2009-02-19 2012-07-17 Micron Technology, Inc. Soft landing for desired program threshold voltage
US8228701B2 (en) * 2009-03-01 2012-07-24 Apple Inc. Selective activation of programming schemes in analog memory cell arrays
US8259506B1 (en) 2009-03-25 2012-09-04 Apple Inc. Database of memory read thresholds
US8832354B2 (en) 2009-03-25 2014-09-09 Apple Inc. Use of host system resources by memory controller
KR101600539B1 (ko) * 2009-04-07 2016-03-08 삼성전자주식회사 불휘발성 메모리 장치의 프로그램 방법
US8238157B1 (en) 2009-04-12 2012-08-07 Apple Inc. Selective re-programming of analog memory cells
US8479080B1 (en) 2009-07-12 2013-07-02 Apple Inc. Adaptive over-provisioning in memory systems
US8495465B1 (en) 2009-10-15 2013-07-23 Apple Inc. Error correction coding over multiple memory pages
US8677054B1 (en) 2009-12-16 2014-03-18 Apple Inc. Memory management schemes for non-volatile memory devices
US8694814B1 (en) 2010-01-10 2014-04-08 Apple Inc. Reuse of host hibernation storage space by memory controller
US8677203B1 (en) 2010-01-11 2014-03-18 Apple Inc. Redundant data storage schemes for multi-die memory systems
US8116140B2 (en) * 2010-04-09 2012-02-14 Sandisk Technologies Inc. Saw-shaped multi-pulse programming for program noise reduction in memory
US8694853B1 (en) 2010-05-04 2014-04-08 Apple Inc. Read commands for reading interfering memory cells
US8572423B1 (en) 2010-06-22 2013-10-29 Apple Inc. Reducing peak current in memory systems
US8595591B1 (en) 2010-07-11 2013-11-26 Apple Inc. Interference-aware assignment of programming levels in analog memory cells
US9104580B1 (en) 2010-07-27 2015-08-11 Apple Inc. Cache memory for hybrid disk drives
US8767459B1 (en) 2010-07-31 2014-07-01 Apple Inc. Data storage in analog memory cells across word lines using a non-integer number of bits per cell
US8856475B1 (en) 2010-08-01 2014-10-07 Apple Inc. Efficient selection of memory blocks for compaction
US8694854B1 (en) 2010-08-17 2014-04-08 Apple Inc. Read threshold setting based on soft readout statistics
US9021181B1 (en) 2010-09-27 2015-04-28 Apple Inc. Memory management for unifying memory cell conditions by using maximum time intervals
US8879329B2 (en) 2010-11-19 2014-11-04 Micron Technology, Inc. Program verify operation in a memory device
CN106158027B (zh) * 2015-04-09 2020-02-07 硅存储技术公司 用于对分离栅式非易失性存储器单元编程的系统和方法
US9418731B1 (en) * 2015-11-06 2016-08-16 Phison Electronics Corp. Memory management method, memory storage device and memory control circuit unit
US10249382B2 (en) 2017-08-22 2019-04-02 Sandisk Technologies Llc Determination of fast to program word lines in non-volatile memory
US10991430B2 (en) 2018-12-19 2021-04-27 Ememory Technology Inc. Non-volatile memory cell compliant to a near memory computation system
CN111863087B (zh) * 2019-04-29 2022-08-30 北京兆易创新科技股份有限公司 一种控制编程性能的方法和装置
TWI695385B (zh) 2019-05-31 2020-06-01 旺宏電子股份有限公司 非揮發性記憶體與其操作方法
KR20200144000A (ko) * 2019-06-17 2020-12-28 에스케이하이닉스 주식회사 메모리 장치 및 그것의 동작 방법
US11556416B2 (en) 2021-05-05 2023-01-17 Apple Inc. Controlling memory readout reliability and throughput by adjusting distance between read thresholds
US11847342B2 (en) 2021-07-28 2023-12-19 Apple Inc. Efficient transfer of hard data and confidence levels in reading a nonvolatile memory

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5555204A (en) * 1993-06-29 1996-09-10 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device
JP3730272B2 (ja) * 1994-09-17 2005-12-21 株式会社東芝 不揮発性半導体記憶装置
KR0172401B1 (ko) * 1995-12-07 1999-03-30 김광호 다수상태 불휘발성 반도체 메모리 장치
EP0904588B1 (de) * 1996-06-14 2001-07-25 Infineon Technologies AG Anordnung und verfahren zum speichern und lesen von mehrpegelladung
JPH1055690A (ja) * 1996-08-07 1998-02-24 Nec Corp 電気的書込可能な不揮発性半導体記憶装置
DE69723700D1 (de) * 1997-11-03 2003-08-28 St Microelectronics Srl Verfahren zur Programmierung eines nichtflüchtigen Mehrpegelspeichers und nichtflüchtiger Mehrpegelspeicher

Also Published As

Publication number Publication date
DE69927967T2 (de) 2006-07-27
JP2001057091A (ja) 2001-02-27
EP1074995B1 (de) 2005-10-26
US6366496B1 (en) 2002-04-02
EP1074995A1 (de) 2001-02-07
JP4469475B2 (ja) 2010-05-26

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Representative=s name: LEINWEBER & ZIMMERMANN, 80331 MUENCHEN