US20040087111A1 - Method for manufacturing a semiconductor film - Google Patents

Method for manufacturing a semiconductor film Download PDF

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Publication number
US20040087111A1
US20040087111A1 US10/658,294 US65829403A US2004087111A1 US 20040087111 A1 US20040087111 A1 US 20040087111A1 US 65829403 A US65829403 A US 65829403A US 2004087111 A1 US2004087111 A1 US 2004087111A1
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layer
silicon layer
heating
type
substrate
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US10/658,294
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Yukiko Iwasaki
Tatsumi Shoji
Shoji Nishida
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Canon Inc
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Canon Inc
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Priority to US10/658,294 priority Critical patent/US20040087111A1/en
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Abandoned legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76259Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along a porous layer
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/547Monocrystalline silicon PV cells

Definitions

  • the present invention relates to a method for manufacturing a semiconductor film, and more particularly, to a method for manufacturing a semiconductor film which is suitable for use as a solar cell or a silicon-on-insulator (SOI) substrate
  • the SOI substrate is obtained by forming a semiconductor film having a thickness of about several tens of nm to a few ⁇ m, for example, a single-crystal silicon film, on an insulating layer. Methods for inexpensively manufacturing a solar cell using such a thin semiconductor film have also been proposed.
  • U.S. Pat. No. 5,856,229 describes a method for manufacturing such an SOI substrate.
  • a first substrate comprising nonporous single-crystal silicon is prepared, and a porous silicon layer is formed by anodizing a surface of the first substrate.
  • a nonporous single-crystal silicon layer is formed on the porous silicon layer according to epitaxial growth.
  • An insulating layer comprising silicon oxide is formed by oxidizing the surface of the nonporous single-crystal silicon layer, and a multilayer structure is formed by bonding a second substrate on the surface of the insulating layer.
  • an SOI substrate is manufactured by separating the nonporous single-crystal silicon layer from the first substrate at the-porous silicon layer by applying an external force, such as a tensile force or the like, to the multilayer structure, and transferring the nonporous single-crystal silicon layer onto the second substrate via the insulating layer.
  • an external force such as a tensile force or the like
  • U.S. Pat. No. 6,054,363 describes another method for manufacturing an SOI substrate.
  • the same processing as described above is performed until a multilayer structure is formed.
  • the nonporous single-crystal silicon layer is separated from the first substrate by applying an abrupt thermal stress to the porous silicon layer, by heating the nonporous single-crystal silicon layer by causing a current to flow only therein.
  • a method for manufacturing a semiconductor film includes the steps of preparing a first member including a semiconductor substrate, a semiconductor layer, and a separation layer provided between the semiconductor substrate and the semiconductor layer, bonding or attracting a second member which is hardly heated by induction heating, onto the semiconductor layer of the first member, and separating the semiconductor layer from the semiconductor substrate at the separation layer by heating the semiconductor substrate by induction heating.
  • a method for manufacturing a semiconductor film includes the steps of preparing a first member including a semiconductor substrate, a semiconductor layer, and a separation layer provided between the semiconductor substrate and the semiconductor layer, bonding or attracting a second member whose resistivity is higher than a resistivity of the semiconductor substrate, onto the semiconductor layer of the first member, and separating the semiconductor layer from the semiconductor substrate at the separation layer by heating the semiconductor substrate by induction heating.
  • a method for manufacturing a semiconductor film includes the steps of preparing a first member including a semiconductor substrate, a semiconductor layer whose resistivity is higher than a resistivity of the semiconductor substrate, and a separation layer provided between the semiconductor substrate and the semiconductor layer, and separating the semiconductor layer from the semiconductor substrate at the separation layer by heating the first member by induction heating. It is desirable that the resistivity of the semiconductor layer is at least 10 times the resistivity of the semiconductor substrate. It is desirable that the resistivity of the semiconductor layer is at least 1 ⁇ .cm, and the resistivity of the semiconductor substrate is equal to or less than 0.1 ⁇ .cm.
  • the first member is prepared by a step of forming a porous silicon layer, serving as a separation layer, by anodizing a surface of a nonporous silicon substrate, and a step of forming a nonporous silicon layer on the porous silicon layer according to epitaxial growth.
  • the first member may also be prepared by a step of forming an ion-implanted layer, serving as a separation layer, except for a silicon layer where ions are not implanted on a surface thereof, by implanting at least one type of ions selected from hydrogen, nitrogen and helium to a predetermined depth from a surface of a silicon substrate.
  • a protective film may be formed on the surface of the silicon substrate before implanting the ions.
  • the step of heating the semiconductor substrate by induction heating is performed by mounting the bonded or attracted first and second members on an induction-heating mount around which a coil is wound, and causing a current to flow in the semiconductor substrate by supplying the coil with a high-frequency current.
  • Slits may be formed in the separation layer before heating the semiconductor substrate by induction heating.
  • a tensile force, a compressive force or a shearing force may be applied simultaneously with the induction heating.
  • a pressure or a hydrostatic pressure by a fluid may be applied to the separation layer simultaneously with the induction heating.
  • the second member may be cooled simultaneously with the induction heating.
  • a residue of the separation layer remaining on the semiconductor layer is removed according to etching, if necessary.
  • a remaining semiconductor substrate may be reutilized for preparing another first member. At that time, a residue of the separation layer remaining on the semiconductor substrate may be removed according to etching, if necessary.
  • a method for manufacturing a solar cell includes the steps of forming a porous silicon layer by anodizing a surface of a p + -type nonporous silicon substrate, sequentially forming a p ⁇ -type nonporous silicon layer and an n + -type nonporous silicon layer on the porous silicon layer according to epitaxial growth, attracting an attraction mount which is hardly heated by induction heating, on the n + -type nonporous silicon layer, separating the p ⁇ -type and n + -type nonporous silicon layers from the p + -type nonporous silicon substrate at the porous silicon layer by heating the p + -type nonporous silicon substrate by induction heating, and forming electrodes on the separated p ⁇ and n + -type nonporous silicon layer.
  • a method for manufacturing an SOI substrate includes the steps of forming a porous silicon layer by anodizing a surface of a p + -type nonporous silicon substrate, forming a p ⁇ -type nonporous silicon layer on the porous silicon layer according to epitaxial growth, forming a silicon-oxide layer on a surface of the p ⁇ -type nonporous silicon layer, forming a multilayer structure by bonding another nonporous silicon substrate on a surface of the silicon-oxide layer, and separating the p ⁇ -type nonporous silicon layer from the p + -type nonporous silicon substrate at the porous silicon layer by heating the multilayer structure by induction heating.
  • FIGS. 1 A- 1 F are schematic cross-sectional views illustrating a method for manufacturing a semiconductor film according to a first embodiment of the present invention
  • FIGS. 2 A- 2 F are schematic cross-sectional views illustrating a method for manufacturing a semiconductor film according to a second embodiment of the present invention
  • FIGS. 3 A- 3 F are schematic cross-sectional views illustrating a method for manufacturing a semiconductor film according to a third embodiment of the present invention.
  • FIGS. 4 A- 4 F are schematic cross-sectional views illustrating a method for manufacturing a semiconductor film according to a fourth embodiment of the present invention.
  • FIGS. 5 A- 5 G are schematic cross-sectional views illustrating a method for manufacturing a solar cell according to the present invention.
  • FIGS. 6 A- 6 G are schematic cross-sectional views illustrating a method for manufacturing an SOI substrate according to the present invention.
  • FIGS. 1 A- 1 F are schematic cross-sectional views illustrating a method for manufacturing a semiconductor film according to a first embodiment of the present invention.
  • a nonporous single-crystal silicon substrate 101 is prepared as a semiconductor substrate.
  • a porous silicon layer 102 is formed on a surface of the nonporous single-crystal silicon substrate 101 by anodizing the nonporous single-crystal silicon substrate 101 .
  • the porous silicon layer 102 operates as a separation layer.
  • a hydrogen-fluoride (HF) solution or a solution obtained by mixing alcohol with this solution may be used as an anodization solution.
  • the porous silicon layer 102 may be formed in a multilayer structure in which a plurality of layers having different porosities are laminated in the direction of the thickness.
  • a nonporous single-crystal silicon layer 103 is formed on the porous silicon layer 102 according to epitaxial growth.
  • the nonporous single-crystal silicon layer 103 may be formed according to chemical vapor deposition (CVD), liquid deposition or the like.
  • a p ⁇ -type silicon layer whose resistivity is higher than the resistivity of the nonporous single-crystal silicon substrate 101 is desirable as the nonporous single-crystal silicon layer 103 .
  • the nonporous single-crystal silicon layer 103 may include a plurality of layers having different conduction types or compositions. The above-described structure in which the nonporous single-crystal silicon layer 103 is formed on the nonporous single-crystal silicon substrate 101 via the porous silicon layer 102 operates as a first member 104 .
  • an oxide film may be formed on the inner walls of pores in the porous silicon layer 102 , followed by annealing in a reductive atmosphere including hydrogen.
  • silicon atoms on the surface of the porous silicon layer 102 move to reduce the sizes of the pores.
  • defects in the nonporous single-crystal silicon layer 103 growing on the porous silicon layer 102 can be reduced.
  • the oxide film is formed in advance on the inner walls of pores in order to prevent silicon atoms from moving within the pores to close the pores. As a result, when removing a residue of the porous silicon layer 102 by etching as will be described later, the residue can be more easily removed.
  • a method for forming oxide films on both of the inner walls of pores and the surface of the porous silicon layer 102 by performing heat treatment of the porous silicon layer 102 , for example, in an oxygen atmosphere may be used as the method for forming an oxide film only in the inner walls of pores of the porous silicon layer 102 as described above. Thereafter, by processing the surface of the porous silicon layer 102 with a hydrogen-fluoride (HF) solution, only the oxide layer on the surface of the porous silicon layer 102 can be removed while leaving the oxide film on the inner walls of pores.
  • HF hydrogen-fluoride
  • the first member 104 attracted on the attraction mount 105 is mounted on an induction-heating mount 106 .
  • a heating coil 107 is wound around the induction-heating mount 106 .
  • a high-frequency current is caused to flow in the heating coil from an AC power supply 108 .
  • the attraction mount 105 is made of a material which is hardly heated by induction heating, i.e., a material which is substantially not heated by induction heating.
  • a high-resistivity material such as alumina, Photoveel (the trade name of a product made by Sumikin Ceramics Co., Ltd.), Macor (the trade name of a product made by Corning Incorporated) or the like, may preferably be used as such a material. That is, the attraction mount 105 operates as a second member. Although in the first embodiment, the silicon substrate 101 faces the induction heating mount 106 , the attraction mount 105 may face the induction-heating mount 106 .
  • the attraction mount 105 is provided in order to generate a temperature difference with respect to the silicon substrate 101 . Accordingly, the attraction mount 105 has a resistivity higher than the resistivity of the silicon substrate 101 .
  • the temperature difference with respect to the silicon substrate 101 may be increased by providing a pipe (not shown) within the attraction mount 105 and causing water, or cooled nitrogen gas, helium gas or the like to flow in the pipe, i.e., by providing a cooling mechanism within the attraction mount 105 .
  • a member to be bonded on the surface of the nonporous single-crystal silicon layer 103 may also be used.
  • the nonporous single-crystal silicon layer 103 is bonded on a supporting substrate before being separated from the silicon substrate 101 .
  • the supporting member operates as the second member.
  • a single-crystal silicon substrate manufactured according to a Czochralski (CZ) method, a single-crystal silicon substrate manufactured according to a floating-zone (FZ) method, a single-crystal silicon substrate subjected to hydrogen annealing, a transparent glass substrate, or the like may be used as the supporting member.
  • the resistivity of the supporting member must be higher than the resistivity of the silicon substrate 101 .
  • the supporting member is preferably made of a material which is substantially not heated by induction heating, i.e., a material which is hardly heated by induction heating. It is desirable that the resistivity of the supporting member is at least 1 ⁇ .cm, preferably, at least 10 ⁇ .cm, and more preferably, at least 100 ⁇ .cm.
  • the supporting member may be bonded on nonporous single-crystal layer 103 via an insulating layer.
  • the insulating layer may be formed on the surface of the nonporous single-crystal silicon layer 103 , or may be formed on both the surface of the nonporous single-crystal silicon layer 103 and the surface of the silicon substrate.
  • silicon-oxide layers formed by performing thermal oxidation of the surface of the nonporous single-crystal silicon layer 103 and the surface of the silicon substrate are used as such insulating layers.
  • the silicon substrate 101 is heated by induction heating by causing a high-frequency current to flow in the heating coil 107 wound around the induction-heating mount 106 from the AC power supply 108 .
  • the attraction mount 105 is hardly heated, a temperature difference is provided between the silicon substrate 101 and the attraction mount 105 .
  • the thermal conductivity of the porous silicon layer 102 is usually lower than the thermal conductivity of the silicon substrate 101 , and a temperature distribution (difference or gradient) is produced starting from the porous silicon layer 102 , i.e., the separation layer.
  • the above-described temperature difference is desirably at least 500° C.
  • slits may be provided at sides of the porous silicon layer 102 .
  • a tensile force, a compressive force or a shearing force may be applied to the porous silicon layer 102 by a suitable expedient as a separation assist simultaneously with the induction heating.
  • a pressure or a hydrostatic pressure exerted by a fluid may also be applied to the porous silicon layer 102 simultaneously with the induction heating. Since the structure of the porous silicon layer 102 is more fragile than the silicon substrate 101 and the nonporous single-crystal silicon layer 103 , separation can be accelerated by applying such an external force.
  • a residue 102 a of the porous silicon layer 102 sometimes remains on the separated nonporous single-crystal silicon layer 103 .
  • the residue 102 a may be removed by etching, if necessary.
  • a residue 102 b of the porous silicon layer 102 also sometimes remains on the silicon substrate 101 from which the nonporous single-crystal silicon layer 103 has been separated. Such a residue 102 b may also be removed by etching, if necessary.
  • the nonporous single-crystal silicon layer 103 and the silicon substrate 101 are obtained.
  • the nonporous single-crystal silicon layer 103 is used, for example, for manufacturing a semiconductor device, such as a solar cell or the like.
  • the silicon substrate 101 can be reutilized for preparing another first member. That is, by using the silicon substrate 101 shown in FIG. 1F, another nonporous single-crystal silicon layer 103 can again be manufactured according to the processing shown in FIGS. 1 A- 1 E.
  • a substance to be heated comprising a metal or a low-resistivity material, is disposed within a winding made of a conductive pipe (mainly made of copper) called a heating coil.
  • a heating coil By causing a high-frequency current to flow in the heating coil, high-frequency magnetic fluxes are generated to cause an eddy current to flow in the substance to be heated, and the temperature rises due to the Joule heating.
  • This operation is called induction heating, and has features such that, for example, rapid heating can be performed, the running cost is low, and localized heating can be performed.
  • the resistivity of the silicon substrate 101 is preferably equal to or less than 0.1 ⁇ .cm, and more preferably, equal to or less than 0.05 ⁇ .cm.
  • the resistivity of the nonporous single-crystal silicon layer 103 is at least 1 ⁇ .cm.
  • the nonporous single-crystal silicon layer 103 is attracted or bonded on the attraction mount 106 , which is hardly heated by induction heating, and the heat of the nonporous single-crystal silicon substrate 103 is transmitted to the attraction mount 106 .
  • the nonporous single-crystal silicon layer 103 need not always have the above-described high resistivity. That is, although it has been described that the nonporous single-crystal silicon layer 103 desirably comprises p ⁇ -type silicon whose resistivity is higher than the resistivity of the silicon substrate 101 , the nonporous single-crystal silicon layer 103 may comprise non-doped silicon, p + -type silicon, n ⁇ -type silicon or n + -type silicon in accordance with the desired semiconductor film.
  • FIGS. 2 A- 2 F are schematic cross-sectional views illustrating a method for manufacturing a semiconductor film according to a second embodiment of the present invention.
  • FIGS. 2 A- 2 F the same components as those in FIGS. 1 A- 1 F are indicated by the same reference numerals, and further description thereof will be omitted.
  • a nonporous single-crystal silicon substrate 201 is prepared. Then, as shown in FIG. 2B, ions 209 of at least one type selected from rare gases, such as hydrogen, nitrogen, helium and the like, are implanted to a predetermined depth from the surface of the silicon substrate 201 . At that time, before implanting ions, it is preferable to form a protective layer comprising a silicon-oxide layer or the like on the surface of the silicon substrate 201 .
  • an ion-implanted layer 202 is formed except for a silicon layer 203 where ions are not implanted on the surface thereof.
  • the ion-implanted layer 202 operates as a separation layer.
  • a structure in which the silicon layer 203 is formed on the silicon substrate 201 via the ion-implanted layer 202 in the above-described manner serves as a first member 204 .
  • the silicon substrate 201 is heated by induction heating by causing a high-frequency current to flow in a heating coil 107 wound around the induction-heating mount 106 from an AC power supply 108 . Since defects and distortion are concentrated in the ion-implanted layer 202 , very small bubbles agglomerate under the effect of heating at 400-600° C.
  • the attraction mount 105 since the attraction mount 105 is hardly heated, a temperature difference is provided between the silicon substrate 101 and the attraction mount 105 , and a temperature distribution is provided starting from the ion-implanted layer 202 , i.e., the separation layer. Due to this temperature difference, a thermal stress is applied to the ion-implanted layer 202 . As a result, cracks are produced in the ion-implanted layer 202 , to separate the silicon layer 203 from the silicon substrate 201 .
  • a residue 202 a of the ion-implanted layer 202 sometimes remain on the separated silicon layer 203 .
  • the residue 202 a may be removed by etching, if necessary.
  • a residue 202 b of the ion-implanted layer 202 also sometimes remains on the silicon substrate 201 from which the silicon layer 203 has been separated.
  • Such a residue 202 b may also be removed by etching, if necessary.
  • the residue 202 a or 202 b may be removed not only by etching, but also, for example, by smoothing the surface of the silicon layer 203 or the silicon substrate 201 , respectively, by performing annealing after grinding the surface.
  • the silicon layer 203 and the silicon substrate 201 are obtained.
  • the silicon layer 203 is used, for example, for manufacturing a semiconductor device, such as a solar cell or the like.
  • the silicon substrate 201 can be reutilized for preparing another first member. That is, by using the silicon substrate 201 shown in FIG. 2F, the silicon layer 203 can again be manufactured according to the processing shown in FIGS. 2 A- 2 E.
  • FIGS. 3 A- 3 F are schematic cross-sectional views illustrating a method for manufacturing a semiconductor film according to a third embodiment of the present invention.
  • a semiconductor layer is separated from a semiconductor substrate by utilizing a difference in the resistivity between the semiconductor substrate and the semiconductor layer.
  • FIGS. 3 A- 3 F the same components as those in FIGS. 1 A- 1 F are indicated by the same reference numerals, and further description thereof will be omitted.
  • a nonporous single-crystal silicon substrate 101 having a first resistivity is prepared as a semiconductor substrate.
  • the first resistivity is preferably equal to or less than 0.1 ⁇ .cm, and more preferably, equal to or less than 0.05 ⁇ . cm.
  • a material comprising, for example, p + -type silicon or n + -type silicon, may be preferably used as the silicon substrate 101 .
  • a porous silicon layer 302 is formed on a surface of the nonporous single-crystal silicon substrate 101 by anodizing the nonporous single-crystal silicon substrate 301 .
  • the porous silicon layer 302 operates as a separation layer.
  • a nonporous single-crystal silicon layer 303 having a second resistivity is formed on the porous silicon layer 302 according to epitaxial growth.
  • the above-described structure in which the nonporous single-crystal silicon layer 303 is formed on the silicon substrate 301 via the porous silicon layer 202 operates as a first member 304 .
  • the second resistivity is higher than the first resistivity, i.e., the resistivity of the silicon substrate 301 .
  • the second resistivity is preferably at least 10 times, and more preferably, at least 100 times higher than the first resistivity. It is desirable that the second resistivity is at least 1 ⁇ .cm.
  • the nonporous single-crystal silicon layer 303 comprises, for example, non-doped silicon, p ⁇ -type silicon or n ⁇ -type silicon.
  • p + -type silicon or n + -type silicon has an impurity concentration equal to or more than 10 17 atoms/cm 3
  • p ⁇ silicon or n ⁇ -type silicon has an impurity concentration equal to or less than 10 16 atoms/cm 3
  • the resistivity of p + -type silicon or n + -type silicon is at least 0.1 ⁇ .cm
  • the resistivity of p ⁇ -type silicon or n ⁇ -type silicon is at least 1 ⁇ .cm.
  • the first member 304 is mounted on an induction heating mount 106 .
  • the silicon substrate 101 faces the induction-heating mount 106
  • the nonporous single-crystal silicon layer 303 may face the induction-heating mount 106 .
  • the silicon substrate 101 is heated by induction heating by causing a high-frequency current to flow in a heating coil 107 wound around the induction-heating mount 106 from an AC power supply 108 .
  • the silicon substrate 301 is selectively heated.
  • a temperature difference is provided between the nonporous single-crystal silicon layer 303 and the silicon substrate 101 . Due to this temperature difference, a thermal stress is applied to the porous silicon layer 302 .
  • a tensile force, a compressive force, a shearing force, or a pressure or a hydrostatic pressure by a fluid may also be applied to the porous silicon layer 102 as separation assisting means.
  • a residue 302 a of the porous silicon layer 302 sometimes remains on the separated nonporous single-crystal silicon layer 303 .
  • a residue 202 b of the porous silicon layer 302 also sometimes remains on the silicon substrate 301 from which the nonporous single-crystal silicon layer 303 has been separated.
  • Such a residue 202 a or 202 b may also be removed by etching, if necessary, as in the first embodiment.
  • the nonporous single-crystal silicon layer 303 and the silicon substrate 301 are obtained.
  • the nonporous single-crystal silicon layer 303 is used, for example, for manufacturing a semiconductor device, such as a solar cell or the like.
  • the silicon substrate 301 can be reutilized for preparing another first member, as in the first embodiment. That is, by using the silicon substrate 301 shown in FIG. 3F, another nonporous single-crystal silicon layer 303 can again be manufactured according to the processing shown in FIGS. 3 A- 3 E.
  • FIGS. 4 A- 4 F are schematic cross-sectional views illustrating a method for manufacturing a semiconductor film according to a fourth embodiment of the present invention.
  • FIGS. 4 A- 4 F the same components as those in FIGS. 1 A- 1 F are indicated by the same reference numerals, and further description thereof will be omitted.
  • a nonporous single-crystal silicon substrate 401 having a first resistivity is prepared.
  • a nonporous single-crystal silicon layer 408 having a second resistivity is formed on the silicon substrate 401 according to epitaxial growth.
  • the first and second resistivities are set in the same manner as in the third embodiment.
  • a substrate comprising p + -type silicon may, for example, be used as the silicon substrate 401
  • a p ⁇ silicon layer may, for example, be used as the silicon layer 408 .
  • the silicon layer 408 is formed according to CVD or liquid deposition.
  • ions may be implanted such that the region where the concentration distribution of implanted ions is highest is present within the silicon substrate 401 , using a p + -type or n + -type silicon substrate.
  • a protective layer comprising a silicon-oxide layer or the like, on the surface of the silicon substrate 408 .
  • an ion-implanted layer 402 is formed except for a silicon layer 403 where ions are not implanted on the surface
  • the ion-implanted layer 402 operates as a separation layer.
  • a structure in which the silicon layer 403 is formed on the silicon substrate 401 via the ion-implanted layer 402 in the above-described manner serves as a first member 404 .
  • the first member 404 is mounted on an induction heating mount 106 .
  • the silicon substrate 401 faces the induction-heating mount 106
  • the silicon layer 403 may face the induction-heating mount 106 .
  • the silicon substrate 401 is heated by induction heating by causing a high-frequency current to flow in a heating coil 107 wound around the induction-heating mount 106 from an AC power supply 108 . Since defects and distortion are concentrated in the ion-implanted layer 402 , very small bubbles agglomerate by heating at 400-600° C. On the other hand, the silicon layer 403 is hardly heated because the resistivity of the silicon layer 403 is higher than the silicon substrate 401 .
  • a temperature difference is provided between the silicon substrate 401 and the silicon layer 403 , and a temperature distribution is provided starting from the ion-implanted layer 402 , i.e., the separation layer. Due to this temperature difference, a thermal stress is applied to the ion-implanted layer 402 . As a result, cracks are produced in the ion-implanted layer 402 , to separate the silicon layer 403 from the silicon substrate 401 .
  • Residues 402 a and 402 b of the ion-implanted layer 402 sometimes remain on the separated silicon layer 403 , and the silicon substrate 401 from which the silicon layer 403 has been separated, respectively.
  • the residues 402 a and 402 b may be removed by etching, or by smoothing the surfaces of the silicon layer 403 and the silicon substrate 401 by performing annealing after grinding the surfaces.
  • the silicon layer 403 and the silicon substrate 401 are obtained.
  • the silicon layer 403 is used, for example, for manufacturing a semiconductor device, such as a solar cell or the like.
  • the silicon substrate 401 can be reutilized for preparing another first member, as in the first embodiment. That is, by using the silicon substrate 401 shown in FIG. 4F, another silicon layer 403 can again be manufactured according to the processing shown in FIGS. 4 A- 4 E.
  • the silicon layer is separated by utilizing the difference in the resistivity between the silicon substrate and the silicon layer
  • a second member whose resistivity is higher than the resistivity of the silicon substrate may also be used together. That is, after attracting the attraction mount 105 described in the first embodiment onto the surface of the silicon layer 303 or 403 , the silicon substrate may be heated according to induction heating.
  • a multilayer structure may be provided by bonding the silicon layer 303 or 403 onto a supporting substrate directly or via an insulating layer, and the multilayer structure may be heated according to induction heating.
  • the supporting substrate operates as the second member.
  • the silicon substrate or the glass substrate described in the first embodiment may be used as the supporting substrate.
  • the insulating layer may be formed according to a method similar to the above-described method.
  • the nonporous single-crystal silicon substrate and the nonporous single-crystal silicon layer are used as the semiconductor substrate and the semiconductor layer, respectively, the semiconductor substrate and the semiconductor layer may be formed using any other appropriate materials, provided that a separation layer can be formed.
  • a semiconductor film was formed according to the method shown in FIGS. 3 A- 3 F.
  • a p + -type nonporous single-crystal silicon substrate (silicon wafer) 301 having a resistivity of 0.02 ⁇ .cm and a diameter of 3 inches was prepared.
  • This silicon substrate 301 was immersed in a solution obtained by mixing a hydrogen-fluoride (HF) solution and ethanol. After causing a current having a current density of 7 mA/cm 2 to flow in the silicon substrate 301 for one minute, a current having a current density of 20 mA/cm 2 was caused to flow in the silicon substrate 301 for ten minutes, to form the porous silicon layer 302 shown in FIG. 3B.
  • HF hydrogen-fluoride
  • the silicon substrate 301 was placed within a CVD apparatus, and annealing was performed at 950° C. by introducing hydrogen gas into the apparatus, to smooth the surface of the porous silicon layer 302 . Then, by introducing a source gas into the CVD apparatus, a p ⁇ -type nonporous single-crystal silicon layer 303 was formed on the porous silicon layer 302 according to epitaxial growth, to form the first member 304 shown in FIG. 3C.
  • the resistivity of the formed silicon layer 303 measured using a monitor was 1.5 ⁇ .cm.
  • the first member 304 was mounted on the induction-heating mount 106 , and a current having a frequency of 350 kHz and an output of 2 kW was caused to flow in the heating coil 107 from the AC power supply 108 .
  • the silicon substrate 301 was thereby heated to 500° C. in 20 seconds.
  • a shearing force was generated due to the temperature difference between the silicon substrate 301 and the silicon layer 303 , and, as shown in FIG. 3E, the silicon layer 303 was separated from the silicon substrate 301 at the porous silicon layer 302 .
  • FIGS. 5 A- 5 G A solar cell was manufactured according to a method to be described with reference to the schematic cross-sectional views shown in FIGS. 5 A- 5 G.
  • FIGS. 5 A- 5 G the same components as those shown in FIGS. 1 A- 1 F are indicated by the same reference numerals, and further description thereof will be omitted.
  • a p + -type nonporous single-crystal silicon substrate (silicon wafer) 501 having a resistivity of 0.01 ⁇ .cm and a diameter of 4 inches was prepared.
  • This silicon substrate 501 was immersed in a solution obtained by mixing a hydrogen-fluoride (HF) solution and ethanol. After causing a current having a current density of 8 mA/cm 2 to flow in the silicon substrate 301 for one minute, a current having a current density of 20 mA/cm 2 was caused to flow in the silicon substrate 501 for ten minutes, to form a porous silicon layer 502 shown in FIG. 5B.
  • the porous silicon layer 502 included two porous layers having different porosities.
  • the silicon substrate 501 was annealed in a hydrogen atmosphere to smooth the surface of the porous silicon layer 502 .
  • a p ⁇ nonporous single-crystal silicon layer 503 having a thickness of 50 ⁇ m and an n ⁇ -type nonporous single-crystal silicon layer 505 having a thickness of 0.2 ⁇ m were sequentially formed on the porous silicon layer 502 according to liquid deposition, to provide a first member 504 shown in FIG. 5C.
  • the attraction mount 105 had a cooling mechanism for causing cooled nitrogen gas to flow within a mounted pipe.
  • the silicon substrate 501 was selectively heated by causing a current having a frequency of 500 kHz and an output of 5 kW to flow in a heating coil 107 from an AC power supply 108 .
  • the silicon layers 505 and 503 were cooled by the cooling mechanism of the attraction mount 105 .
  • the temperature difference between the silicon substrate 501 , and the silicon layers 505 and 503 reached 500° C. in 10 seconds.
  • the porous silicon layer 502 was destructed by a shearing force generated due to a difference in thermal expansion at the porous silicon layer 502 , and, as shown in FIG. 5E, the silicon layers 505 and 503 were separated from the silicon substrate 501 .
  • a residue 502 a of the porous silicon layer 502 remaining on the silicon layer 503 was removed by etching, to obtain a semiconductor layer shown in FIG. 5F, i.e., a laminated structure comprising the p ⁇ -type silicon layer 503 and the n ⁇ -type silicon layer 505 was obtained.
  • a silicon substrate 501 having a smooth surface shown in FIG. 5F was obtained. This silicon substrate 501 could be again used for manufacturing another solar cell according to the processing shown in FIGS. 5 A- 5 F.
  • FIG. 5G by performing heat welding of the p ⁇ -type silicon layer 503 of the laminated structure obtained in the above-described manner onto an aluminum plate 506 , serving as an electrode as well as a supporting member, and simultaneously diffusing aluminum into the p ⁇ silicon layer 503 , a p + -type silicon layer 507 was formed. Then, by forming an antireflection layer 509 after forming current collecting electrodes 508 on the n ⁇ -type silicon layer 505 , a thin-film solar cell shown in FIG. 5G was manufactured.
  • Example 2 Although in Example 2, the residue 502 a on the p ⁇ -type silicon layer 503 was removed, it is only necessary to perform such processing if necessary. Such processing may not be performed if a solar cell can be manufactured even if the residue 502 a remains.
  • FIGS. 6 A- 6 G An SOI substrate was manufactured according to a method to be described with reference to the schematic cross-sectional views shown in FIGS. 6 A- 6 G.
  • FIGS. 6 A- 6 G the same components as those shown in FIGS. 1 A- 1 F are indicated by the same reference numerals, and further description thereof will be omitted.
  • a p + -type nonporous single-crystal silicon substrate (silicon wafer) 601 having a resistivity of 0.01 ⁇ .cm and a diameter of 5 inches was prepared.
  • This silicon substrate 601 was immersed in a solution obtained by mixing a hydrogen-fluoride (HF) solution and ethanol. After causing a current having a current density of 7 mA/cm 2 to flow in the silicon substrate 601 for five minutes, a current having a current density of 30 mA/cm 2 was caused to flow in the silicon substrate 601 for ten minutes, to form a porous silicon layer 602 having a thickness of 5 ⁇ m shown in FIG. 6B.
  • the porous silicon layer 602 included two porous layers having different porosities.
  • the silicon substrate 601 was then placed within a CVD apparatus, and annealing was performed at 950° C. by introducing hydrogen gas into the apparatus, to smooth the surface of the porous silicon layer 602 .
  • a source gas into the CVD apparatus, a p-type nonporous single-crystal silicon layer 603 having a thickness of 0.3 ⁇ m was formed on the porous silicon layer 602 according to epitaxial growth.
  • the resistivity of the formed silicon layer 603 measured using a monitor was 10 ⁇ .cm.
  • the surface of the silicon layer 603 was thermally oxidized to form a silicon-oxide layer 605 having a thickness of 100 nm as an insulating layer.
  • a first member 604 shown in FIG. 6C was formed.
  • the silicon-oxide layer 605 was tightly superposed on a separately prepared silicon substrate (silicon wafer) 606 , as shown in FIG. 6D.
  • the first member 604 and the silicon substrate 606 were bonded together by performing heat treatment of the integrated structure at 600° C. for three hours, to obtain a laminated structure 607 .
  • the laminated structure 607 was mounted on an induction-heating mount 106 .
  • the silicon substrate 601 was selectively heated by causing a current having a frequency of 700 kHz and an output of 10 kW to flow in a heating coil 107 from an AC power supply 108 .
  • the silicon substrate 606 was cooled by the cooling mechanism of the attraction mount 105 .
  • the temperature difference between the silicon substrate 601 and the silicon layer 603 reached 550° C. in 20 seconds.
  • the porous silicon layer 602 was destructed by a shearing force generated due to a difference in thermal expansion at the porous silicon layer 602 , and, as shown in FIG. 6F, the silicon layer 603 was separated from the silicon substrate 601 , and was transferred on the silicon substrate 606 via the silicon-oxide layer 605 .
  • the silicon substrate 601 having a smooth surface shown in FIG. 6G was obtained.
  • This silicon substrate 601 could be again used for manufacturing another SOI substrate according to the processing shown in FIGS. 6 A- 6 G.
  • a solar cell was manufactured according to another method to be described below.
  • the same components as those shown in FIGS. 1 A- 1 F are indicated by the same name, and further description thereof will be omitted.
  • a p + -type nonporous single-crystal silicon substrate (silicon wafer) having a resistivity of 0.01 ⁇ .cm and a diameter of 4 inches was prepared. Then, a p ⁇ nonporous single-crystal silicon layer having a resistivity of 2 ⁇ .cm and a thickness of 1.2 ⁇ m and an n + -type nonporous single-crystal silicon layer having a thickness of 0.2 ⁇ m were sequentially formed on the silicon substrate according to epitaxial growth by CVD.
  • the first member was mounted on an induction-heating mount 106 .
  • the attraction mount 105 had a cooling mechanism for causing cooled nitrogen gas to flow within a mounted pipe.
  • the silicon substrate was selectively heated by causing a current having a frequency of 450 kHz and an output of 3 kW to flow in a heating coil 107 from an AC power supply 108 , while cooling the n + -type silicon layer, the p + -type silicon layer, and the surface p + layer of the silicon substrate by the cooling mechanism of the attraction mount 105 .
  • the laminated structure was bonded on a supporting substrate made of stainless steel. Then, by forming an antireflection layer after forming current collecting electrodes on the n + -type silicon layer, a thin-film solar cell was manufactured. In this solar cell, the back surface (BSF) effect was obtained due to the p + -type silicon layer.
  • BSF back surface

Abstract

A method for manufacturing a semiconductor film includes a step of preparing a first member including a semiconductor substrate, a semiconductor layer, and a separation layer provided between the semiconductor substrate and the semiconductor layer, a step of bonding or attracting a second member which is hardly heated by induction heating, onto the semiconductor layer of the first member, and a step of separating the semiconductor layer from the semiconductor substrate at the separation layer by heating the semiconductor substrate by induction heating.

Description

    BACKGROUND OF THE INVENTION
  • 1. Field of the Invention [0001]
  • The present invention relates to a method for manufacturing a semiconductor film, and more particularly, to a method for manufacturing a semiconductor film which is suitable for use as a solar cell or a silicon-on-insulator (SOI) substrate [0002]
  • 2. Description of the Related Art [0003]
  • Recently, a technique for manufacturing an SOI substrate has been attracting notice as a technique for improving the processing speed of a semiconductor device and allowing saving of electric power. The SOI substrate is obtained by forming a semiconductor film having a thickness of about several tens of nm to a few μm, for example, a single-crystal silicon film, on an insulating layer. Methods for inexpensively manufacturing a solar cell using such a thin semiconductor film have also been proposed. [0004]
  • U.S. Pat. No. 5,856,229 describes a method for manufacturing such an SOI substrate. In this method, first, a first substrate (wafer) comprising nonporous single-crystal silicon is prepared, and a porous silicon layer is formed by anodizing a surface of the first substrate. Then, a nonporous single-crystal silicon layer is formed on the porous silicon layer according to epitaxial growth. An insulating layer comprising silicon oxide is formed by oxidizing the surface of the nonporous single-crystal silicon layer, and a multilayer structure is formed by bonding a second substrate on the surface of the insulating layer. Then, an SOI substrate is manufactured by separating the nonporous single-crystal silicon layer from the first substrate at the-porous silicon layer by applying an external force, such as a tensile force or the like, to the multilayer structure, and transferring the nonporous single-crystal silicon layer onto the second substrate via the insulating layer. [0005]
  • U.S. Pat. No. 6,054,363 describes another method for manufacturing an SOI substrate. In this method, the same processing as described above is performed until a multilayer structure is formed. After this processing, the nonporous single-crystal silicon layer is separated from the first substrate by applying an abrupt thermal stress to the porous silicon layer, by heating the nonporous single-crystal silicon layer by causing a current to flow only therein. [0006]
  • SUMMARY OF THE INVENTION
  • It is an object of the present invention to provide a method for manufacturing a semiconductor film more simply and efficiently by improving the above-described conventional methods. [0007]
  • According to one aspect of the present invention, a method for manufacturing a semiconductor film includes the steps of preparing a first member including a semiconductor substrate, a semiconductor layer, and a separation layer provided between the semiconductor substrate and the semiconductor layer, bonding or attracting a second member which is hardly heated by induction heating, onto the semiconductor layer of the first member, and separating the semiconductor layer from the semiconductor substrate at the separation layer by heating the semiconductor substrate by induction heating. [0008]
  • According to another aspect of the present invention, a method for manufacturing a semiconductor film includes the steps of preparing a first member including a semiconductor substrate, a semiconductor layer, and a separation layer provided between the semiconductor substrate and the semiconductor layer, bonding or attracting a second member whose resistivity is higher than a resistivity of the semiconductor substrate, onto the semiconductor layer of the first member, and separating the semiconductor layer from the semiconductor substrate at the separation layer by heating the semiconductor substrate by induction heating. [0009]
  • According to still another aspect of the present invention, a method for manufacturing a semiconductor film includes the steps of preparing a first member including a semiconductor substrate, a semiconductor layer whose resistivity is higher than a resistivity of the semiconductor substrate, and a separation layer provided between the semiconductor substrate and the semiconductor layer, and separating the semiconductor layer from the semiconductor substrate at the separation layer by heating the first member by induction heating. It is desirable that the resistivity of the semiconductor layer is at least 10 times the resistivity of the semiconductor substrate. It is desirable that the resistivity of the semiconductor layer is at least 1 Ω.cm, and the resistivity of the semiconductor substrate is equal to or less than 0.1 Ω.cm. [0010]
  • In the present invention, the first member is prepared by a step of forming a porous silicon layer, serving as a separation layer, by anodizing a surface of a nonporous silicon substrate, and a step of forming a nonporous silicon layer on the porous silicon layer according to epitaxial growth. (3) The first member may also be prepared by a step of forming an ion-implanted layer, serving as a separation layer, except for a silicon layer where ions are not implanted on a surface thereof, by implanting at least one type of ions selected from hydrogen, nitrogen and helium to a predetermined depth from a surface of a silicon substrate. In this process, a protective film may be formed on the surface of the silicon substrate before implanting the ions. [0011]
  • In the present invention, the step of heating the semiconductor substrate by induction heating is performed by mounting the bonded or attracted first and second members on an induction-heating mount around which a coil is wound, and causing a current to flow in the semiconductor substrate by supplying the coil with a high-frequency current. Slits may be formed in the separation layer before heating the semiconductor substrate by induction heating. A tensile force, a compressive force or a shearing force may be applied simultaneously with the induction heating. A pressure or a hydrostatic pressure by a fluid may be applied to the separation layer simultaneously with the induction heating. The second member may be cooled simultaneously with the induction heating. [0012]
  • After separating the semiconductor layer, a residue of the separation layer remaining on the semiconductor layer is removed according to etching, if necessary. After separating the semiconductor layer, a remaining semiconductor substrate may be reutilized for preparing another first member. At that time, a residue of the separation layer remaining on the semiconductor substrate may be removed according to etching, if necessary. [0013]
  • According to yet another aspect of the present invention, a method for manufacturing a solar cell includes the steps of forming a porous silicon layer by anodizing a surface of a p[0014] +-type nonporous silicon substrate, sequentially forming a p-type nonporous silicon layer and an n+-type nonporous silicon layer on the porous silicon layer according to epitaxial growth, attracting an attraction mount which is hardly heated by induction heating, on the n+-type nonporous silicon layer, separating the p-type and n+-type nonporous silicon layers from the p+-type nonporous silicon substrate at the porous silicon layer by heating the p+-type nonporous silicon substrate by induction heating, and forming electrodes on the separated pand n+-type nonporous silicon layer.
  • According to yet a further aspect of the present invention, a method for manufacturing an SOI substrate includes the steps of forming a porous silicon layer by anodizing a surface of a p[0015] +-type nonporous silicon substrate, forming a p-type nonporous silicon layer on the porous silicon layer according to epitaxial growth, forming a silicon-oxide layer on a surface of the p-type nonporous silicon layer, forming a multilayer structure by bonding another nonporous silicon substrate on a surface of the silicon-oxide layer, and separating the p-type nonporous silicon layer from the p+-type nonporous silicon substrate at the porous silicon layer by heating the multilayer structure by induction heating.
  • The foregoing and other objects, advantages and features of the present invention will become more apparent from the following description of the preferred embodiments taken in conjunction with the accompanying drawings.[0016]
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIGS. [0017] 1A-1F are schematic cross-sectional views illustrating a method for manufacturing a semiconductor film according to a first embodiment of the present invention;
  • FIGS. [0018] 2A-2F are schematic cross-sectional views illustrating a method for manufacturing a semiconductor film according to a second embodiment of the present invention;
  • FIGS. [0019] 3A-3F are schematic cross-sectional views illustrating a method for manufacturing a semiconductor film according to a third embodiment of the present invention;
  • FIGS. [0020] 4A-4F are schematic cross-sectional views illustrating a method for manufacturing a semiconductor film according to a fourth embodiment of the present invention;
  • FIGS. [0021] 5A-5G are schematic cross-sectional views illustrating a method for manufacturing a solar cell according to the present invention; and
  • FIGS. [0022] 6A-6G are schematic cross-sectional views illustrating a method for manufacturing an SOI substrate according to the present invention.
  • DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
  • FIGS. [0023] 1A-1F are schematic cross-sectional views illustrating a method for manufacturing a semiconductor film according to a first embodiment of the present invention. In order to manufacture a semiconductor film, first, as shown in FIG. 1 A, a nonporous single-crystal silicon substrate 101 is prepared as a semiconductor substrate. A low-resistivity material which can be heated by induction heating, such as p+-type silicon or n+-type silicon, is desirable as the nonporous single-crystal silicon substrate 101.
  • Then, as shown in FIG. 1B, a [0024] porous silicon layer 102 is formed on a surface of the nonporous single-crystal silicon substrate 101 by anodizing the nonporous single-crystal silicon substrate 101. The porous silicon layer 102 operates as a separation layer. A hydrogen-fluoride (HF) solution or a solution obtained by mixing alcohol with this solution may be used as an anodization solution. At that time, by changing the anodization solution or the current density during anodization, the porous silicon layer 102 may be formed in a multilayer structure in which a plurality of layers having different porosities are laminated in the direction of the thickness. By thus providing a layer having a high porosity in a part of the multilayer structure, it is easy to perform separation or to control a portion to be separated.
  • Then, as shown in FIG. 1C, a nonporous single-[0025] crystal silicon layer 103 is formed on the porous silicon layer 102 according to epitaxial growth. The nonporous single-crystal silicon layer 103 may be formed according to chemical vapor deposition (CVD), liquid deposition or the like. A p-type silicon layer whose resistivity is higher than the resistivity of the nonporous single-crystal silicon substrate 101 is desirable as the nonporous single-crystal silicon layer 103. The nonporous single-crystal silicon layer 103 may include a plurality of layers having different conduction types or compositions. The above-described structure in which the nonporous single-crystal silicon layer 103 is formed on the nonporous single-crystal silicon substrate 101 via the porous silicon layer 102 operates as a first member 104.
  • Before forming the nonporous single-[0026] crystal silicon layer 103 in the above-described manner, an oxide film may be formed on the inner walls of pores in the porous silicon layer 102, followed by annealing in a reductive atmosphere including hydrogen. By such annealing, silicon atoms on the surface of the porous silicon layer 102 move to reduce the sizes of the pores. As a result, defects in the nonporous single-crystal silicon layer 103 growing on the porous silicon layer 102 can be reduced. The oxide film is formed in advance on the inner walls of pores in order to prevent silicon atoms from moving within the pores to close the pores. As a result, when removing a residue of the porous silicon layer 102 by etching as will be described later, the residue can be more easily removed.
  • A method for forming oxide films on both of the inner walls of pores and the surface of the [0027] porous silicon layer 102 by performing heat treatment of the porous silicon layer 102, for example, in an oxygen atmosphere may be used as the method for forming an oxide film only in the inner walls of pores of the porous silicon layer 102 as described above. Thereafter, by processing the surface of the porous silicon layer 102 with a hydrogen-fluoride (HF) solution, only the oxide layer on the surface of the porous silicon layer 102 can be removed while leaving the oxide film on the inner walls of pores.
  • Then, as shown in FIG. 1D, after attracting the surface of the nonporous single-[0028] crystal silicon layer 103 of the first member 104 onto an attraction mount 105, the first member 104 attracted on the attraction mount 105 is mounted on an induction-heating mount 106. A heating coil 107 is wound around the induction-heating mount 106. A high-frequency current is caused to flow in the heating coil from an AC power supply 108. The attraction mount 105 is made of a material which is hardly heated by induction heating, i.e., a material which is substantially not heated by induction heating. A high-resistivity material, such as alumina, Photoveel (the trade name of a product made by Sumikin Ceramics Co., Ltd.), Macor (the trade name of a product made by Corning Incorporated) or the like, may preferably be used as such a material. That is, the attraction mount 105 operates as a second member. Although in the first embodiment, the silicon substrate 101 faces the induction heating mount 106, the attraction mount 105 may face the induction-heating mount 106.
  • The [0029] attraction mount 105 is provided in order to generate a temperature difference with respect to the silicon substrate 101. Accordingly, the attraction mount 105 has a resistivity higher than the resistivity of the silicon substrate 101. The temperature difference with respect to the silicon substrate 101 may be increased by providing a pipe (not shown) within the attraction mount 105 and causing water, or cooled nitrogen gas, helium gas or the like to flow in the pipe, i.e., by providing a cooling mechanism within the attraction mount 105.
  • Instead of the above-described [0030] attraction mount 105, a member to be bonded on the surface of the nonporous single-crystal silicon layer 103 may also be used. For example, when manufacturing an SOI substrate, the nonporous single-crystal silicon layer 103 is bonded on a supporting substrate before being separated from the silicon substrate 101. In this case, the supporting member operates as the second member. A single-crystal silicon substrate manufactured according to a Czochralski (CZ) method, a single-crystal silicon substrate manufactured according to a floating-zone (FZ) method, a single-crystal silicon substrate subjected to hydrogen annealing, a transparent glass substrate, or the like may be used as the supporting member.
  • When using the supporting member as the second member in the above-described manner, the resistivity of the supporting member must be higher than the resistivity of the [0031] silicon substrate 101. Furthermore, the supporting member is preferably made of a material which is substantially not heated by induction heating, i.e., a material which is hardly heated by induction heating. It is desirable that the resistivity of the supporting member is at least 1 Ω.cm, preferably, at least 10 Ω.cm, and more preferably, at least 100 Ω.cm.
  • When using a silicon substrate as the supporting substrate, the supporting member may be bonded on nonporous single-[0032] crystal layer 103 via an insulating layer. At that time, the insulating layer may be formed on the surface of the nonporous single-crystal silicon layer 103, or may be formed on both the surface of the nonporous single-crystal silicon layer 103 and the surface of the silicon substrate. For example, silicon-oxide layers formed by performing thermal oxidation of the surface of the nonporous single-crystal silicon layer 103 and the surface of the silicon substrate are used as such insulating layers.
  • Then, as shown in FIG. 1E, the [0033] silicon substrate 101 is heated by induction heating by causing a high-frequency current to flow in the heating coil 107 wound around the induction-heating mount 106 from the AC power supply 108. At that time, since the attraction mount 105 is hardly heated, a temperature difference is provided between the silicon substrate 101 and the attraction mount 105. Although it depends on the porosity of the porous silicon layer 102, the thermal conductivity of the porous silicon layer 102 is usually lower than the thermal conductivity of the silicon substrate 101, and a temperature distribution (difference or gradient) is produced starting from the porous silicon layer 102, i.e., the separation layer. Due to this temperature difference, a thermal stress is applied to the porous silicon layer 102. As a result, cracks are produced in the porous silicon layer 102, resulting in separation of the nonporous single-crystal silicon layer 103 from the silicon substrate 101. That is, the nonporous single-crystal silicon layer 103 is separated from the silicon substrate at the porous silicon layer 102. In order to realize such separation, the above-described temperature difference is desirably at least 500° C.
  • Before performing induction heating as shown in FIG. 1E, slits may be provided at sides of the [0034] porous silicon layer 102. Furthermore, a tensile force, a compressive force or a shearing force may be applied to the porous silicon layer 102 by a suitable expedient as a separation assist simultaneously with the induction heating. Furthermore, a pressure or a hydrostatic pressure exerted by a fluid may also be applied to the porous silicon layer 102 simultaneously with the induction heating. Since the structure of the porous silicon layer 102 is more fragile than the silicon substrate 101 and the nonporous single-crystal silicon layer 103, separation can be accelerated by applying such an external force.
  • As shown in FIG. 1E, a [0035] residue 102 a of the porous silicon layer 102 sometimes remains on the separated nonporous single-crystal silicon layer 103. In such a case, the residue 102 a may be removed by etching, if necessary. In addition, a residue 102 b of the porous silicon layer 102 also sometimes remains on the silicon substrate 101 from which the nonporous single-crystal silicon layer 103 has been separated. Such a residue 102 b may also be removed by etching, if necessary.
  • Thus, as shown in FIG. 1F, the nonporous single-[0036] crystal silicon layer 103 and the silicon substrate 101 are obtained. The nonporous single-crystal silicon layer 103 is used, for example, for manufacturing a semiconductor device, such as a solar cell or the like. On the other hand, the silicon substrate 101 can be reutilized for preparing another first member. That is, by using the silicon substrate 101 shown in FIG. 1F, another nonporous single-crystal silicon layer 103 can again be manufactured according to the processing shown in FIGS. 1A-1E.
  • The principle of induction heating will now be briefly described. A substance to be heated, comprising a metal or a low-resistivity material, is disposed within a winding made of a conductive pipe (mainly made of copper) called a heating coil. By causing a high-frequency current to flow in the heating coil, high-frequency magnetic fluxes are generated to cause an eddy current to flow in the substance to be heated, and the temperature rises due to the Joule heating. This operation is called induction heating, and has features such that, for example, rapid heating can be performed, the running cost is low, and localized heating can be performed. [0037]
  • When performing induction heating in the present invention, selective heating of the [0038] silicon substrate 101 is an important point. Accordingly, the resistivity of the silicon substrate 101 is preferably equal to or less than 0.1 Ω.cm, and more preferably, equal to or less than 0.05 Ω.cm. In order to provide an effective temperature difference, it is desirable that the resistivity of the nonporous single-crystal silicon layer 103 is at least 1 Ω.cm. However, in the first embodiment, the nonporous single-crystal silicon layer 103 is attracted or bonded on the attraction mount 106, which is hardly heated by induction heating, and the heat of the nonporous single-crystal silicon substrate 103 is transmitted to the attraction mount 106. Hence, the nonporous single-crystal silicon layer 103 need not always have the above-described high resistivity. That is, although it has been described that the nonporous single-crystal silicon layer 103 desirably comprises p-type silicon whose resistivity is higher than the resistivity of the silicon substrate 101, the nonporous single-crystal silicon layer 103 may comprise non-doped silicon, p+-type silicon, n-type silicon or n+-type silicon in accordance with the desired semiconductor film.
  • FIGS. [0039] 2A-2F are schematic cross-sectional views illustrating a method for manufacturing a semiconductor film according to a second embodiment of the present invention. In FIGS. 2A-2F, the same components as those in FIGS. 1A-1F are indicated by the same reference numerals, and further description thereof will be omitted.
  • In the second embodiment, first, as shown in FIG. 2A, a nonporous single-[0040] crystal silicon substrate 201 is prepared. Then, as shown in FIG. 2B, ions 209 of at least one type selected from rare gases, such as hydrogen, nitrogen, helium and the like, are implanted to a predetermined depth from the surface of the silicon substrate 201. At that time, before implanting ions, it is preferable to form a protective layer comprising a silicon-oxide layer or the like on the surface of the silicon substrate 201.
  • By the ion implantation, as shown in FIG. 2C, an ion-implanted [0041] layer 202 is formed except for a silicon layer 203 where ions are not implanted on the surface thereof. The ion-implanted layer 202 operates as a separation layer. A structure in which the silicon layer 203 is formed on the silicon substrate 201 via the ion-implanted layer 202 in the above-described manner serves as a first member 204.
  • Then, as shown in FIG. 2D, after attracting the surface of the [0042] silicon layer 203 of the first member 204 onto an attraction mount 105, the first member 204 attracted on the attraction mount 105 is mounted on an induction-heating mount 106. Then, as shown in FIG. 2E, the silicon substrate 201 is heated by induction heating by causing a high-frequency current to flow in a heating coil 107 wound around the induction-heating mount 106 from an AC power supply 108. Since defects and distortion are concentrated in the ion-implanted layer 202, very small bubbles agglomerate under the effect of heating at 400-600° C. On the other hand, since the attraction mount 105 is hardly heated, a temperature difference is provided between the silicon substrate 101 and the attraction mount 105, and a temperature distribution is provided starting from the ion-implanted layer 202, i.e., the separation layer. Due to this temperature difference, a thermal stress is applied to the ion-implanted layer 202. As a result, cracks are produced in the ion-implanted layer 202, to separate the silicon layer 203 from the silicon substrate 201.
  • As shown in FIG. 2E, a [0043] residue 202 a of the ion-implanted layer 202 sometimes remain on the separated silicon layer 203. In such a case, the residue 202 a may be removed by etching, if necessary. In addition, a residue 202 b of the ion-implanted layer 202 also sometimes remains on the silicon substrate 201 from which the silicon layer 203 has been separated. Such a residue 202 b may also be removed by etching, if necessary. The residue 202 a or 202 b may be removed not only by etching, but also, for example, by smoothing the surface of the silicon layer 203 or the silicon substrate 201, respectively, by performing annealing after grinding the surface.
  • Thus, as shown in FIG. 2F, the [0044] silicon layer 203 and the silicon substrate 201 are obtained. The silicon layer 203 is used, for example, for manufacturing a semiconductor device, such as a solar cell or the like. On the other hand, the silicon substrate 201 can be reutilized for preparing another first member. That is, by using the silicon substrate 201 shown in FIG. 2F, the silicon layer 203 can again be manufactured according to the processing shown in FIGS. 2A-2E.
  • FIGS. [0045] 3A-3F are schematic cross-sectional views illustrating a method for manufacturing a semiconductor film according to a third embodiment of the present invention. In the third embodiment, a semiconductor layer is separated from a semiconductor substrate by utilizing a difference in the resistivity between the semiconductor substrate and the semiconductor layer. In FIGS. 3A-3F, the same components as those in FIGS. 1A-1F are indicated by the same reference numerals, and further description thereof will be omitted.
  • In the third embodiment, first, as shown in FIG. 3A, a nonporous single-[0046] crystal silicon substrate 101 having a first resistivity is prepared as a semiconductor substrate. In order to be sufficiently heated by induction heating, the first resistivity is preferably equal to or less than 0.1 Ω.cm, and more preferably, equal to or less than 0.05 Ω. cm. A material comprising, for example, p+-type silicon or n+-type silicon, may be preferably used as the silicon substrate 101.
  • Then, as shown in FIG. 3B, a [0047] porous silicon layer 302 is formed on a surface of the nonporous single-crystal silicon substrate 101 by anodizing the nonporous single-crystal silicon substrate 301. The porous silicon layer 302 operates as a separation layer.
  • Then, as shown in FIG. 3C, a nonporous single-[0048] crystal silicon layer 303 having a second resistivity is formed on the porous silicon layer 302 according to epitaxial growth. The above-described structure in which the nonporous single-crystal silicon layer 303 is formed on the silicon substrate 301 via the porous silicon layer 202 operates as a first member 304.
  • The second resistivity is higher than the first resistivity, i.e., the resistivity of the [0049] silicon substrate 301. The second resistivity is preferably at least 10 times, and more preferably, at least 100 times higher than the first resistivity. It is desirable that the second resistivity is at least 1 Ω.cm. More specifically, the nonporous single-crystal silicon layer 303 comprises, for example, non-doped silicon, p-type silicon or n-type silicon. In this description, p+-type silicon or n+-type silicon has an impurity concentration equal to or more than 1017 atoms/cm3, and psilicon or n-type silicon has an impurity concentration equal to or less than 1016 atoms/cm3. Usually, the resistivity of p+-type silicon or n+-type silicon is at least 0.1 Ω.cm, and the resistivity of p-type silicon or n-type silicon is at least 1 Ω.cm.
  • Then, as shown in FIG. 3D, the [0050] first member 304 is mounted on an induction heating mount 106. Although in the third embodiment, the silicon substrate 101 faces the induction-heating mount 106, the nonporous single-crystal silicon layer 303 may face the induction-heating mount 106.
  • Then, as shown in FIG. 3E, the [0051] silicon substrate 101 is heated by induction heating by causing a high-frequency current to flow in a heating coil 107 wound around the induction-heating mount 106 from an AC power supply 108. At that time, since the resistivity of the nonporous single-crystal silicon layer 303 is higher than the resistivity of the silicon substrate 301, the silicon substrate 301 is selectively heated. As a result, a temperature difference is provided between the nonporous single-crystal silicon layer 303 and the silicon substrate 101. Due to this temperature difference, a thermal stress is applied to the porous silicon layer 302. As a result, cracks are produced in the porous silicon layer 302, to separate the nonporous single-crystal silicon layer 103 from the silicon substrate 101. In the third embodiment, also, as in the first embodiment, a tensile force, a compressive force, a shearing force, or a pressure or a hydrostatic pressure by a fluid may also be applied to the porous silicon layer 102 as separation assisting means.
  • As shown in FIG. 3E, a [0052] residue 302 a of the porous silicon layer 302 sometimes remains on the separated nonporous single-crystal silicon layer 303. In addition, a residue 202 b of the porous silicon layer 302 also sometimes remains on the silicon substrate 301 from which the nonporous single-crystal silicon layer 303 has been separated. Such a residue 202 a or 202 b may also be removed by etching, if necessary, as in the first embodiment.
  • Thus, as shown in FIG. 3F, the nonporous single-[0053] crystal silicon layer 303 and the silicon substrate 301 are obtained. The nonporous single-crystal silicon layer 303 is used, for example, for manufacturing a semiconductor device, such as a solar cell or the like. On the other hand, the silicon substrate 301 can be reutilized for preparing another first member, as in the first embodiment. That is, by using the silicon substrate 301 shown in FIG. 3F, another nonporous single-crystal silicon layer 303 can again be manufactured according to the processing shown in FIGS. 3A-3E.
  • FIGS. [0054] 4A-4F are schematic cross-sectional views illustrating a method for manufacturing a semiconductor film according to a fourth embodiment of the present invention. In FIGS. 4A-4F, the same components as those in FIGS. 1A-1F are indicated by the same reference numerals, and further description thereof will be omitted.
  • In the fourth embodiment, first, as shown in FIG. 4A, a nonporous single-[0055] crystal silicon substrate 401 having a first resistivity is prepared. Then, a nonporous single-crystal silicon layer 408 having a second resistivity is formed on the silicon substrate 401 according to epitaxial growth. The first and second resistivities are set in the same manner as in the third embodiment. A substrate comprising p+-type silicon may, for example, be used as the silicon substrate 401, and a psilicon layer may, for example, be used as the silicon layer 408. The silicon layer 408 is formed according to CVD or liquid deposition.
  • Then, as shown in FIG. 4B, [0056] ions 409 of at least one type selected from rare gases, such as hydrogen, nitrogen, helium and the like, are implanted to a predetermined depth from the surface of the silicon layer 408. It is preferable to implant ions such that the projected range, i.e., the region where the concentration distribution of implanted ions is highest, is present within the silicon layer 408 or at the interface between the silicon substrate 401 and the silicon layer 408. On the other hand, when intending to provide a back surface field (BSF) effect in the thin film after separation, ions may be implanted such that the region where the concentration distribution of implanted ions is highest is present within the silicon substrate 401, using a p+-type or n+-type silicon substrate. Before implanting ions, it is preferable to form a protective layer comprising a silicon-oxide layer or the like, on the surface of the silicon substrate 408.
  • By the ion implantation, as shown in FIG. 4C, an ion-implanted layer [0057] 402 is formed except for a silicon layer 403 where ions are not implanted on the surface The ion-implanted layer 402 operates as a separation layer. A structure in which the silicon layer 403 is formed on the silicon substrate 401 via the ion-implanted layer 402 in the above-described manner serves as a first member 404.
  • Then, as shown in FIG. 4D, the first member [0058] 404 is mounted on an induction heating mount 106. Although in the fourth embodiment, the silicon substrate 401 faces the induction-heating mount 106, the silicon layer 403 may face the induction-heating mount 106.
  • Then, as shown in FIG. 4E, the [0059] silicon substrate 401 is heated by induction heating by causing a high-frequency current to flow in a heating coil 107 wound around the induction-heating mount 106 from an AC power supply 108. Since defects and distortion are concentrated in the ion-implanted layer 402, very small bubbles agglomerate by heating at 400-600° C. On the other hand, the silicon layer 403 is hardly heated because the resistivity of the silicon layer 403 is higher than the silicon substrate 401. As a result, a temperature difference is provided between the silicon substrate 401 and the silicon layer 403, and a temperature distribution is provided starting from the ion-implanted layer 402, i.e., the separation layer. Due to this temperature difference, a thermal stress is applied to the ion-implanted layer 402. As a result, cracks are produced in the ion-implanted layer 402, to separate the silicon layer 403 from the silicon substrate 401.
  • [0060] Residues 402 a and 402 b of the ion-implanted layer 402 sometimes remain on the separated silicon layer 403, and the silicon substrate 401 from which the silicon layer 403 has been separated, respectively. As in the second embodiment, the residues 402 a and 402 b may be removed by etching, or by smoothing the surfaces of the silicon layer 403 and the silicon substrate 401 by performing annealing after grinding the surfaces.
  • Thus, as shown in FIG. 4F, the [0061] silicon layer 403 and the silicon substrate 401 are obtained. The silicon layer 403 is used, for example, for manufacturing a semiconductor device, such as a solar cell or the like. On the other hand, the silicon substrate 401 can be reutilized for preparing another first member, as in the first embodiment. That is, by using the silicon substrate 401 shown in FIG. 4F, another silicon layer 403 can again be manufactured according to the processing shown in FIGS. 4A-4E.
  • Although in the above-described third and fourth embodiments, the silicon layer is separated by utilizing the difference in the resistivity between the silicon substrate and the silicon layer, a second member whose resistivity is higher than the resistivity of the silicon substrate may also be used together. That is, after attracting the [0062] attraction mount 105 described in the first embodiment onto the surface of the silicon layer 303 or 403, the silicon substrate may be heated according to induction heating.
  • Alternatively, a multilayer structure may be provided by bonding the [0063] silicon layer 303 or 403 onto a supporting substrate directly or via an insulating layer, and the multilayer structure may be heated according to induction heating. In this case, the supporting substrate operates as the second member. The silicon substrate or the glass substrate described in the first embodiment may be used as the supporting substrate. When bonding the silicon layer onto the supporting member via the insulating layer, the insulating layer may be formed according to a method similar to the above-described method.
  • Although in the above-described first through fourth embodiments, the nonporous single-crystal silicon substrate and the nonporous single-crystal silicon layer are used as the semiconductor substrate and the semiconductor layer, respectively, the semiconductor substrate and the semiconductor layer may be formed using any other appropriate materials, provided that a separation layer can be formed. [0064]
  • EXAMPLE1
  • A semiconductor film was formed according to the method shown in FIGS. [0065] 3A-3F. First, as shown in FIG. 3A, a p+-type nonporous single-crystal silicon substrate (silicon wafer) 301 having a resistivity of 0.02 Ω.cm and a diameter of 3 inches was prepared. This silicon substrate 301 was immersed in a solution obtained by mixing a hydrogen-fluoride (HF) solution and ethanol. After causing a current having a current density of 7 mA/cm2 to flow in the silicon substrate 301 for one minute, a current having a current density of 20 mA/cm2 was caused to flow in the silicon substrate 301 for ten minutes, to form the porous silicon layer 302 shown in FIG. 3B.
  • Then, the [0066] silicon substrate 301 was placed within a CVD apparatus, and annealing was performed at 950° C. by introducing hydrogen gas into the apparatus, to smooth the surface of the porous silicon layer 302. Then, by introducing a source gas into the CVD apparatus, a p-type nonporous single-crystal silicon layer 303 was formed on the porous silicon layer 302 according to epitaxial growth, to form the first member 304 shown in FIG. 3C. The resistivity of the formed silicon layer 303 measured using a monitor was 1.5 Ω.cm.
  • Then, as shown in FIG. 3D, the [0067] first member 304 was mounted on the induction-heating mount 106, and a current having a frequency of 350 kHz and an output of 2 kW was caused to flow in the heating coil 107 from the AC power supply 108. The silicon substrate 301 was thereby heated to 500° C. in 20 seconds. As a result, a shearing force was generated due to the temperature difference between the silicon substrate 301 and the silicon layer 303, and, as shown in FIG. 3E, the silicon layer 303 was separated from the silicon substrate 301 at the porous silicon layer 302.
  • By immersing the separated [0068] silicon layer 303 in a solution obtained by mixing a hydrogen-fluoride (HF) solution, a hydrogen-peroxide (H2O2) solution, ethanol and water, a residue 302 a of the porous silicon layer 302 remaining on the silicon layer 303 was removed by etching, to obtain the semiconductor layer shown in FIG. 3F, i.e., the nonporous single-crystal silicon layer 303. By also removing a residue 302 b of the porous silicon layer 302 remaining on the silicon substrate 301 by etching, the silicon substrate 301 having a smooth surface shown in FIG. 3F was obtained. This silicon substrate 301 could be again used for manufacturing another silicon layer 303 according to the processing shown in FIGS. 3A-3F.
  • EXAMPLE2
  • A solar cell was manufactured according to a method to be described with reference to the schematic cross-sectional views shown in FIGS. [0069] 5A-5G. In FIGS. 5A-5G, the same components as those shown in FIGS. 1A-1F are indicated by the same reference numerals, and further description thereof will be omitted.
  • First, as shown in FIG. 5A, a p[0070] +-type nonporous single-crystal silicon substrate (silicon wafer) 501 having a resistivity of 0.01 Ω.cm and a diameter of 4 inches was prepared. This silicon substrate 501 was immersed in a solution obtained by mixing a hydrogen-fluoride (HF) solution and ethanol. After causing a current having a current density of 8 mA/cm2 to flow in the silicon substrate 301 for one minute, a current having a current density of 20 mA/cm2 was caused to flow in the silicon substrate 501 for ten minutes, to form a porous silicon layer 502 shown in FIG. 5B. The porous silicon layer 502 included two porous layers having different porosities.
  • Then, the [0071] silicon substrate 501 was annealed in a hydrogen atmosphere to smooth the surface of the porous silicon layer 502. Then, a pnonporous single-crystal silicon layer 503 having a thickness of 50 μm and an n-type nonporous single-crystal silicon layer 505 having a thickness of 0.2 μm were sequentially formed on the porous silicon layer 502 according to liquid deposition, to provide a first member 504 shown in FIG. 5C.
  • Then, as shown in FIG. 5D, after attracting the [0072] silicon layer 505 of the first member 504 onto an attraction mount 105, the first member 504 was mounted on an induction-heating mount 106. The attraction mount 105 had a cooling mechanism for causing cooled nitrogen gas to flow within a mounted pipe.
  • Then, the [0073] silicon substrate 501 was selectively heated by causing a current having a frequency of 500 kHz and an output of 5 kW to flow in a heating coil 107 from an AC power supply 108. At the same time, the silicon layers 505 and 503 were cooled by the cooling mechanism of the attraction mount 105. The temperature difference between the silicon substrate 501, and the silicon layers 505 and 503 reached 500° C. in 10 seconds. As a result, the porous silicon layer 502 was destructed by a shearing force generated due to a difference in thermal expansion at the porous silicon layer 502, and, as shown in FIG. 5E, the silicon layers 505 and 503 were separated from the silicon substrate 501.
  • By immersing the separated [0074] silicon layers 505 and 503 in a solution obtained by mixing a hydrogen-fluoride (HF) solution, a hydrogen-peroxide (H2O2) solution, ethanol and water, a residue 502 a of the porous silicon layer 502 remaining on the silicon layer 503 was removed by etching, to obtain a semiconductor layer shown in FIG. 5F, i.e., a laminated structure comprising the p-type silicon layer 503 and the n-type silicon layer 505 was obtained. By also removing a residue 502 b of the porous silicon layer 502 remaining on the silicon substrate 501 by etching, a silicon substrate 501 having a smooth surface shown in FIG. 5F was obtained. This silicon substrate 501 could be again used for manufacturing another solar cell according to the processing shown in FIGS. 5A-5F.
  • As shown in FIG. 5G, by performing heat welding of the p[0075] -type silicon layer 503 of the laminated structure obtained in the above-described manner onto an aluminum plate 506, serving as an electrode as well as a supporting member, and simultaneously diffusing aluminum into the psilicon layer 503, a p+-type silicon layer 507 was formed. Then, by forming an antireflection layer 509 after forming current collecting electrodes 508 on the n-type silicon layer 505, a thin-film solar cell shown in FIG. 5G was manufactured.
  • Although in Example 2, the [0076] residue 502 a on the p-type silicon layer 503 was removed, it is only necessary to perform such processing if necessary. Such processing may not be performed if a solar cell can be manufactured even if the residue 502 a remains.
  • EXAMPLE 3
  • An SOI substrate was manufactured according to a method to be described with reference to the schematic cross-sectional views shown in FIGS. [0077] 6A-6G. In FIGS. 6A-6G, the same components as those shown in FIGS. 1A-1F are indicated by the same reference numerals, and further description thereof will be omitted.
  • First, as shown in FIG. 6A, a p[0078] +-type nonporous single-crystal silicon substrate (silicon wafer) 601 having a resistivity of 0.01 Ω.cm and a diameter of 5 inches was prepared. This silicon substrate 601 was immersed in a solution obtained by mixing a hydrogen-fluoride (HF) solution and ethanol. After causing a current having a current density of 7 mA/cm2 to flow in the silicon substrate 601 for five minutes, a current having a current density of 30 mA/cm2 was caused to flow in the silicon substrate 601 for ten minutes, to form a porous silicon layer 602 having a thickness of 5 μm shown in FIG. 6B. The porous silicon layer 602 included two porous layers having different porosities.
  • Then, by heating the [0079] silicon substrate 601 on which the porous silicon layer 602 was formed in an oxygen atmosphere at 400° C. for one hour, an silicon-oxide film was formed on the inner walls of pores and the surface of the porous silicon layer 602. Then, only the silicon-oxide layer on the surface of the porous silicon layer 602 was removed by processing the surface of the porous silicon layer 602 with a hydrogen fluoride (HF) solution.
  • The [0080] silicon substrate 601 was then placed within a CVD apparatus, and annealing was performed at 950° C. by introducing hydrogen gas into the apparatus, to smooth the surface of the porous silicon layer 602. By introducing a source gas into the CVD apparatus, a p-type nonporous single-crystal silicon layer 603 having a thickness of 0.3 μm was formed on the porous silicon layer 602 according to epitaxial growth. The resistivity of the formed silicon layer 603 measured using a monitor was 10 Ω.cm. Then, the surface of the silicon layer 603 was thermally oxidized to form a silicon-oxide layer 605 having a thickness of 100 nm as an insulating layer. Thus, a first member 604 shown in FIG. 6C was formed.
  • Then, after activating the surface of the silicon-[0081] oxide layer 605 by projecting nitrogen (N2) plasma thereon, the silicon-oxide layer 605 was tightly superposed on a separately prepared silicon substrate (silicon wafer) 606, as shown in FIG. 6D. The first member 604 and the silicon substrate 606 were bonded together by performing heat treatment of the integrated structure at 600° C. for three hours, to obtain a laminated structure 607.
  • Then, as shown in FIG. 6E, after attracting the [0082] silicon substrate 606 of the laminated structure 607 onto an attraction mount 105 having a water-cooling mechanism, the laminated structure 607 was mounted on an induction-heating mount 106. Then, the silicon substrate 601 was selectively heated by causing a current having a frequency of 700 kHz and an output of 10 kW to flow in a heating coil 107 from an AC power supply 108. At the same time, the silicon substrate 606 was cooled by the cooling mechanism of the attraction mount 105. The temperature difference between the silicon substrate 601 and the silicon layer 603 reached 550° C. in 20 seconds. As a result, the porous silicon layer 602 was destructed by a shearing force generated due to a difference in thermal expansion at the porous silicon layer 602, and, as shown in FIG. 6F, the silicon layer 603 was separated from the silicon substrate 601, and was transferred on the silicon substrate 606 via the silicon-oxide layer 605.
  • By immersing the [0083] silicon substrate 606, on which the silicon layer 603 was transferred, in a solution obtained by mixing a hydrogen-fluoride (HF) solution, a hydrogen-peroxide (H2O2) solution, ethanol and water, a residue 602 a of the porous silicon layer 602 remaining on the silicon layer 603 was removed by etching. Then, by annealing the silicon substrate 606 on which the silicon layer 603 was transferred in a reductive atmosphere including hydrogen at 1,100° C. for one hour, the surface of the silicon layer 603 was smoothed. Thus, as shown in FIG. 6G, an SOI substrate 608 having the single-crystal silicon layer 603 on the silicon substrate 606 via the silicon-oxide layer 605 was manufactured.
  • By also removing a [0084] residue 602 b of the porous silicon layer 602 remaining on the silicon substrate 601 by etching, the silicon substrate 601 having a smooth surface shown in FIG. 6G was obtained. This silicon substrate 601 could be again used for manufacturing another SOI substrate according to the processing shown in FIGS. 6A-6G.
  • EXAMPLE 4
  • A solar cell was manufactured according to another method to be described below. In the description the same components as those shown in FIGS. [0085] 1A-1F are indicated by the same name, and further description thereof will be omitted.
  • First, a p[0086] +-type nonporous single-crystal silicon substrate (silicon wafer) having a resistivity of 0.01 Ω.cm and a diameter of 4 inches was prepared. Then, a pnonporous single-crystal silicon layer having a resistivity of 2 Ω.cm and a thickness of 1.2 μm and an n+-type nonporous single-crystal silicon layer having a thickness of 0.2 μm were sequentially formed on the silicon substrate according to epitaxial growth by CVD. Then, hydrogen ions with energy of 450 eV were implanted from the side of the n+-type silicon layer to a concentration of 7.0×1016/cm2, to form an ion-implanted layer to a depth of about 2 μm from the surface of then +-type silicon layer. Then, a first member, in which the ion-implanted layer, a surface p+ layer of the silicon substrate where ions were not implanted, the p silicon layer and the n+-type silicon layer are sequentially laminated, was formed on a remaining portion of the silicon substrate.
  • Then, after attracting the n[0087] +-type silicon layer of the first member onto an attraction mount 105 having a cooling mechanism, the first member was mounted on an induction-heating mount 106. The attraction mount 105 had a cooling mechanism for causing cooled nitrogen gas to flow within a mounted pipe. Then, the silicon substrate was selectively heated by causing a current having a frequency of 450 kHz and an output of 3 kW to flow in a heating coil 107 from an AC power supply 108, while cooling the n+-type silicon layer, the p+-type silicon layer, and the surface p+ layer of the silicon substrate by the cooling mechanism of the attraction mount 105. As a result, very small bubbles agglomerated within the ion-implanted layer by the heating, and the temperature difference between the remaining portion of the silicon substrate, and the n+-type silicon layer, the p-type silicon layer and the surface p+ layer reached 500° C. in 10 seconds. As a result, cracks were produced in the ion-implanted layer by a shearing force generated due to a difference in thermal expansion at the ion-implanted layer, and, the n+-type silicon layer, the psilicon layer and the surface p+ layer were separated from the remaining portion of the silicon substrate.
  • By removing a residue of the ion-implanted layer from the separated silicon layers by etching, a semiconductor film having a laminated structure comprising the p+ layer, the p[0088] silicon layer and the n+-type silicon layer was obtained. By also removing a residue of the ion-implanted layer remaining on the remaining silicon substrate by etching, a silicon substrate having a smooth surface was obtained. This silicon substrate could be again used for manufacturing another solar cell according to the above-described processing.
  • By coating a conductive adhesive on the p[0089] +-type silicon layer of the laminated structure obtained in the above-described manner, the laminated structure was bonded on a supporting substrate made of stainless steel. Then, by forming an antireflection layer after forming current collecting electrodes on the n+-type silicon layer, a thin-film solar cell was manufactured. In this solar cell, the back surface (BSF) effect was obtained due to the p+-type silicon layer.
  • The individual components shown in outline in the drawings are all well known in the semiconductor-film manufacturing arts, and their specific construction and operation are not critical to the operation or the best mode for carrying out the invention. [0090]
  • While the present invention has been described with respect to what are presently considered to be the preferred embodiments, it is to be understood that the invention is not limited to the disclosed embodiments. To the contrary, the present invention is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims. The scope of the following claims is to be accorded the broadest interpretation so as to encompass all such modifications and equivalent structures and functions. [0091]

Claims (58)

What is claimed is:
1. A method for manufacturing a semiconductor film, comprising the steps of:
preparing a first member including a semiconductor substrate, a semiconductor layer, and a separation layer provided between the semiconductor substrate and the semiconductor layer;
bonding or attracting a second member which is hardly heated by induction heating, onto the semiconductor layer of the first member; and
separating the semiconductor layer from the semiconductor substrate at the separation layer by heating the semiconductor substrate by induction heating.
2. A method according to claim 1, wherein said step for preparing the first member comprises a step of forming a porous silicon layer, serving as a separation layer, by anodizing a surface of a nonporous silicon substrate, and a step of forming a nonporous silicon layer on the porous silicon layer according to epitaxial growth.
3. A method according to claim 1, wherein said step for preparing the first member comprises a step of forming an ion-implanted layer, serving as a separation layer, except for a silicon layer where ions are not implanted on a surface thereof, by implanting at least one type of ions selected from hydrogen, nitrogen and helium to a predetermined depth from a surface of a silicon substrate.
4. A method according to claim 3, wherein said step for preparing the first member further comprises a step of forming a protective film on the surface of the silicon substrate before implanting the ions.
5. A method according to claim 1, wherein said step of heating the semiconductor substrate by induction heating comprises a step of mounting the bonded or attracted first and second members on an induction-heating mount around which a coil is wound, and causing a current to flow in the semiconductor substrate by supplying the coil with a high-frequency current.
6. A method according to claim 1, further comprising a step of forming slits in the separation layer before heating the semiconductor substrate by induction heating.
7. A method according to claim 1, wherein, in said step of heating the semiconductor substrate by induction heating, a tensile force, a compressive force or a shearing force is simultaneously applied to the separation layer.
8. A method according to claim 1, wherein, in said step of heating the semiconductor substrate by induction heating, a pressure or a hydrostatic pressure by a fluid is simultaneously applied to the separation layer.
9. A method according to claim 1, wherein, in said step of heating the semiconductor substrate by induction heating, the second member is simultaneously cooled.
10. A method according to claim 1, further comprising a step of removing a residue of the separation layer remaining on the semiconductor layer according to etching, after separating the semiconductor layer.
11. A method according to claim 1, further comprising a step of reutilizing a remaining semiconductor substrate for preparing another first member, after separating the semiconductor layer.
12. A method according to claim 11, further comprising a step of removing a residue of the separation layer remaining on the semiconductor substrate according to etching, before reutilizing the semiconductor substrate.
13. A method for manufacturing a semiconductor film comprising the steps of:
preparing a first member including a semiconductor substrate, a semiconductor layer, and a separation layer provided between the semiconductor substrate and the semiconductor layer;
bonding or attracting a second member whose resistivity is higher than a resistivity of the semiconductor substrate, onto the semiconductor layer of the first member; and
separating the semiconductor layer from the semiconductor substrate at the separation layer by heating the semiconductor substrate by induction heating.
14. A method according to claim 13, wherein said step for preparing the first member comprises a step of forming a porous silicon layer, serving as a separation layer, by anodizing a surface of a nonporous silicon substrate, and a step of forming a nonporous silicon layer on the porous silicon layer according to epitaxial growth.
15. A method according to claim 13, wherein said step for preparing the first member comprises a step of forming an ion-implanted layer, serving as a separation layer, except for a silicon layer where ions are not implanted on a surface thereof, by implanting at least one type of ions selected from hydrogen, nitrogen and helium to a predetermined depth from a surface of a silicon substrate.
16. A method according to claim 15, wherein said step for preparing the first member further comprises a step of forming a protective film on the surface of the silicon substrate before implanting the ions.
17. A method according to claim 13, wherein said step of heating the semiconductor substrate by induction heating comprises a step of mounting the bonded or attracted first and second members on an induction-heating mount around which a coil is wound, and causing a current to flow in the semiconductor substrate by supplying the coil with a high-frequency current.
18. A method according to claim 13, further comprising a step of forming slits in the separation layer before heating the semiconductor substrate by induction heating.
19. A method according to claim 13, wherein, in said step of heating the semiconductor substrate by induction heating, a tensile force, a compressive force or a shearing force is simultaneously applied to the separation layer.
20. A method according to claim 13, wherein, in said step of heating the semiconductor substrate by induction heating, a pressure or a hydrostatic pressure by a fluid is simultaneously applied to the separation layer.
21. A method according to claim 13, wherein, in said step of heating the semiconductor substrate by induction heating, the second member is simultaneously cooled.
22. A method according to claim 13, further comprising a step of removing a residue of the separation layer remaining on the semiconductor layer according to etching, after separating the semiconductor layer.
23. A method according to claim 13, further comprising a step of reutilizing a remaining semiconductor substrate for preparing another first member, after separating the semiconductor layer.
24. A method according to claim 23, further comprising a step of removing a residue of the separation layer remaining on the semiconductor substrate according to etching, before reutilizing the semiconductor substrate.
25. A method for manufacturing a semiconductor film comprising the steps of:
preparing a first member including a semiconductor substrate, a semiconductor layer whose resistivity is higher than a resistivity of the semiconductor substrate, and a separation layer provided between the semiconductor substrate and the semiconductor layer; and
separating the semiconductor layer from the semiconductor substrate at the separation layer by heating the first member by induction heating.
26. A method according to claim 25, further comprising a step of bonding or attracting a second member which is hardly heated by induction heating, onto the semiconductor layer of the first member, before heating the first member by induction heating.
27. A method according to claim 25, further comprising a step of bonding or attracting a second member whose resistivity is higher than a resistivity of the first member, onto the semiconductor layer of the first member, before heating the first member by induction heating.
28. A method according to claim 25, wherein the resistivity of the semiconductor layer is at least 10 times the resistivity of the semiconductor substrate.
29. A method according to claim 25, wherein the resistivity of the semiconductor layer is at least 1 Ω.cm, and the resistivity of the semiconductor substrate is equal to or less than 0.1 Ω.cm.
30. A method according to claim 25, wherein said step for preparing the first member comprises a step of forming a porous silicon layer, serving as a separation layer, by anodizing a surface of a p+-type nonporous silicon substrate, and a step of forming a p-type nonporous silicon layer on the porous silicon layer according to epitaxial growth.
31. A method according to claim 25, wherein said step for preparing the first member comprises a step of forming a p-type silicon layer on a p+-type silicon substrate according to epitaxial growth, and forming an ion-implanted layer, serving as a separation layer, except for a p-type silicon layer where ions are not implanted on a surface thereof, by implanting at least one type of ions selected from hydrogen, nitrogen and helium to a predetermined depth from a surface of the p-type silicon layer.
32. A method according to claim 31, wherein said step of preparing the first member further comprises a step of forming a protective film on the surface of the p-type silicon layer before implanting the ions.
33. A method according to claim 25, wherein said step of heating the semiconductor substrate by induction heating comprises a step of mounting the first member on an induction-heating mount around which a coil is wound, and causing a current to flow in the semiconductor substrate by supplying the coil with a high-frequency current.
34. A method according to claim 25, further comprising a step of forming slits in the separation layer before heating the first member by induction heating.
35. A method according to claim 25, wherein, in said step of heating the first member by induction heating, a tensile force, a compressive force or a shearing force is simultaneously applied to the separation layer.
36. A method according to claim 25, wherein, in said step of heating the first member by induction heating, a pressure or a hydrostatic pressure by a fluid is simultaneously applied to the separation layer.
37. A method according to claim 25, further comprising a step of removing a residue of the separation layer remaining on the semiconductor layer according to etching, after separating the semiconductor layer.
38. A method according to claim 25, further comprising a step of reutilizing a remaining semiconductor substrate for preparing another first member, after separating the semiconductor layer.
39. A method according to claim 38, further comprising a step of removing a residue of the separation layer remaining on the semiconductor substrate according to etching, before reutilizing the semiconductor substrate.
40. A method for manufacturing a solar cell comprising the steps of:
forming a porous silicon layer by anodizing a surface of a p+-type nonporous silicon substrate;
sequentially forming a p-type nonporous silicon layer and an n+-type nonporous silicon layer on the porous silicon layer according to epitaxial growth;
attracting an attraction mount which is hardly heated by induction heating, on the n+-type nonporous silicon layer;
separating the p-type and n+-type nonporous silicon layers from the p+-type nonporous silicon substrate at the porous silicon layer by heating the p+-type nonporous silicon substrate by induction heating; and
forming electrodes on the separated p-type and n+-type nonporous silicon layers.
41. A method according to claim 40, wherein said step of heating the p+-type nonporous silicon substrate by induction heating comprises a step of mounting the p+-type nonporous silicon substrate attracted on the attraction mount on an induction-heating mount around which a coil is wound, and causing a current to flow in the p+-type nonporous silicon substrate by supplying the coil with a high-frequency current.
42. A method according to claim 41, wherein, in said step of heating the p+-type nonporous silicon substrate by induction heating, the attraction mount is simultaneously cooled.
43. A method according to claim 40, further comprising a step of removing a residue of the porous silicon layer remaining on the pnonporous silicon layer, before forming electrodes after separating the p-type and n+-type nonporous silicon layers from the p+-type nonporous silicon substrate.
44. A method according to claim 40, wherein said step of forming the electrodes comprises a step of performing heat welding of a surface of the p-type nonporous silicon layer onto an aluminum plate and simultaneously forming a p+-type nonporous silicon layer by diffusing aluminum into the p-type nonporous silicon layer, and a step of forming collecting electrodes on the surface of the n+-type nonporous silicon layer.
45. A method according to claim 44, further comprising a step of forming an antireflection layer on the n+-type nonporous silicon layer on which the collecting electrodes are formed.
46. A method according to claim 40, wherein the p-type and n+-type nonporous silicon layers are formed according to liquid deposition.
47. A method according to claim 40, further comprising a step of reutilizing a remaining p+-type nonporous silicon substrate for manufacturing another solar cell, after separating the p-type and n+-type nonporous silicon layers.
48. A method according to claim 47, further comprising a step of removing a residue of the porous silicon layer remaining on the p+-type nonporous silicon substrate, before reutilizing the p+-type nonporous silicon substrate.
49. A method for manufacturing an SOI (silicon-on-insulator) substrate comprising the steps of:
forming a porous silicon layer by anodizing a surface of a p+-type nonporous silicon substrate;
forming a p-type nonporous silicon layer on the porous silicon layer according to epitaxial growth;
forming a silicon-oxide layer on the surface of the p-type nonporous silicon layer;
forming a multilayer structure by bonding another nonporous silicon substrate on a surface of the silicon-oxide layer; and
separating the p-type nonporous silicon layer from the p+-type nonporous silicon substrate at the porous silicon layer by heating the multilayer structure by induction heating.
50. A method according to claim 49, further comprising a step of attracting an attraction mount which is hardly heated by induction heating onto the multilayer structure, before heating the multilayer structure by induction heating.
51. A method according to claim 50, wherein, in said step of heating the multilayer structure by induction heating, the attraction mount is simultaneously cooled.
52. A method according to claim 49, wherein said step of heating the multilayer structure by induction heating comprises a step of mounting the multilayer structure on an induction-heating mount around which a coil is wound, and causing a current to flow in the p+-type nonporous silicon substrate by supplying the coil with a high-frequency current.
53. A method according to claim 49, further comprising a step of removing a residue of the porous silicon layer remaining on the p-type nonporous silicon layer by etching, after separating the p+-type nonporous silicon layer from the p+-type nonporous silicon substrate.
54. A method according to claim 53, further comprising a step of smoothing the surface of the p-type nonporous silicon layer by performing annealing in a reductive-gas atmosphere after removing the residue of the porous silicon layer.
55. A method according to claim 49, further comprising a step of performing thermal oxidation of inner walls of the porous silicon layer before forming the p-type nonporous silicon layer on the porous silicon layer according to epitaxial growth, and a step of smoothing the surface of the porous silicon layer by performing heat treatment in a hydrogen atmosphere.
56. A method according to claim 49, wherein the p-type nonporous silicon layer is formed according to chemical vapor deposition (CVD).
57. A method according to claim 49, further comprising a step of reutilizing a remaining p+-type nonporous silicon substrate for manufacturing another SOI substrate, after separating the p-type nonporous silicon layer.
58. A method according to claim 57, further comprising a step of removing a residue of the porous silicon layer remaining on the p+-type nonporous silicon substrate, before reutilizing the p+-type nonporous silicon substrate.
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090117680A1 (en) * 2007-11-01 2009-05-07 Shunpei Yamazaki Method for manufacturing photoelectric conversion device
US20090181492A1 (en) * 2008-01-11 2009-07-16 Peter Nunan Nano-cleave a thin-film of silicon for solar cell fabrication
KR101113503B1 (en) 2009-10-30 2012-02-29 고려대학교 산학협력단 Method for fabricating silicon solar cell using induced current apparatus
US20170162388A1 (en) * 2015-12-02 2017-06-08 Ananda H. Kumar Structure and method for high performance large-grain-poly silicon backplane for oled applications

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005210062A (en) * 2003-12-26 2005-08-04 Canon Inc Semiconductor member, manufacturing method therefor, and semiconductor device
JP2006173327A (en) * 2004-12-15 2006-06-29 Canon Inc Thin film transistor, and manufacturing method and apparatus therefor
JP4604889B2 (en) * 2005-05-25 2011-01-05 株式会社Sumco Silicon wafer manufacturing method and silicon single crystal growing method
JP2007173354A (en) * 2005-12-20 2007-07-05 Shin Etsu Chem Co Ltd Soi substrate and its manufacturing method
CN101657907B (en) * 2007-04-13 2012-12-26 株式会社半导体能源研究所 Photovoltaic device and method for manufacturing the same
US20090162970A1 (en) * 2007-12-20 2009-06-25 Yang Michael X Material modification in solar cell fabrication with ion doping
EP2088633A3 (en) * 2008-02-05 2011-03-23 Twin Creeks Technologies, Inc. Method to form a photovoltaic cell comprising a thin lamina
US8481845B2 (en) * 2008-02-05 2013-07-09 Gtat Corporation Method to form a photovoltaic cell comprising a thin lamina
US8129613B2 (en) * 2008-02-05 2012-03-06 Twin Creeks Technologies, Inc. Photovoltaic cell comprising a thin lamina having low base resistivity and method of making
US8563352B2 (en) * 2008-02-05 2013-10-22 Gtat Corporation Creation and translation of low-relief texture for a photovoltaic cell
JP4998340B2 (en) * 2008-03-14 2012-08-15 信越半導体株式会社 Method for manufacturing thin film semiconductor substrate
US8349626B2 (en) * 2010-03-23 2013-01-08 Gtat Corporation Creation of low-relief texture for a photovoltaic cell
KR20120064364A (en) * 2010-12-09 2012-06-19 삼성전자주식회사 Method for manufacturing the solar cell
KR20130037275A (en) * 2011-10-06 2013-04-16 주식회사 엔씰텍 Method of fabricating an electronic device having a flexible device
DE102014111781B4 (en) * 2013-08-19 2022-08-11 Korea Atomic Energy Research Institute Process for the electrochemical production of a silicon layer
CN103681486B (en) * 2013-12-06 2018-07-17 京东方科技集团股份有限公司 A kind of manufacturing method of flexible display substrates

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5526768A (en) * 1994-02-03 1996-06-18 Harris Corporation Method for providing a silicon and diamond substrate having a carbon to silicon transition layer and apparatus thereof
US5856229A (en) * 1994-03-10 1999-01-05 Canon Kabushiki Kaisha Process for production of semiconductor substrate
US6033974A (en) * 1997-05-12 2000-03-07 Silicon Genesis Corporation Method for controlled cleaving process
US6054363A (en) * 1996-11-15 2000-04-25 Canon Kabushiki Kaisha Method of manufacturing semiconductor article
US6222167B1 (en) * 1997-12-05 2001-04-24 Mitsubishi Heavy Industries, Ltd. Impedance matching apparatus for induction heating type galvanized steel sheet alloying system and method
US6258702B1 (en) * 1997-11-12 2001-07-10 Canon Kabushiki Kaisha Method for the formation of a cuprous oxide film and process for the production of a semiconductor device using said method
US6274937B1 (en) * 1999-02-01 2001-08-14 Micron Technology, Inc. Silicon multi-chip module packaging with integrated passive components and method of making
US6448155B1 (en) * 1999-06-17 2002-09-10 Canon Kabushiki Kaisha Production method of semiconductor base material and production method of solar cell
US6486008B1 (en) * 2000-02-25 2002-11-26 John Wolf International, Inc. Manufacturing method of a thin film on a substrate
US6548382B1 (en) * 1997-07-18 2003-04-15 Silicon Genesis Corporation Gettering technique for wafers made using a controlled cleaving process

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6221209A (en) * 1985-07-19 1987-01-29 Nec Corp High-frequency annealing method
JPH01120815A (en) * 1987-11-05 1989-05-12 Fujitsu Ltd Heating of semiconductor wafer
JPH0434888A (en) * 1990-05-30 1992-02-05 Nec Corp Induction heating method
JP3181105B2 (en) * 1992-08-25 2001-07-03 ティーディーケイ株式会社 Method for manufacturing thin film transistor
JPH1070130A (en) * 1996-08-26 1998-03-10 Sanyo Electric Co Ltd Heat-treating conductive thin film using a-c magnetic field
JP2000349264A (en) * 1998-12-04 2000-12-15 Canon Inc Method for manufacturing, use and utilizing method of semiconductor wafer
JP2001015721A (en) * 1999-04-30 2001-01-19 Canon Inc Separation method of composite member and manufacture of thin film

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5526768A (en) * 1994-02-03 1996-06-18 Harris Corporation Method for providing a silicon and diamond substrate having a carbon to silicon transition layer and apparatus thereof
US5856229A (en) * 1994-03-10 1999-01-05 Canon Kabushiki Kaisha Process for production of semiconductor substrate
US6054363A (en) * 1996-11-15 2000-04-25 Canon Kabushiki Kaisha Method of manufacturing semiconductor article
US6033974A (en) * 1997-05-12 2000-03-07 Silicon Genesis Corporation Method for controlled cleaving process
US6548382B1 (en) * 1997-07-18 2003-04-15 Silicon Genesis Corporation Gettering technique for wafers made using a controlled cleaving process
US6258702B1 (en) * 1997-11-12 2001-07-10 Canon Kabushiki Kaisha Method for the formation of a cuprous oxide film and process for the production of a semiconductor device using said method
US6222167B1 (en) * 1997-12-05 2001-04-24 Mitsubishi Heavy Industries, Ltd. Impedance matching apparatus for induction heating type galvanized steel sheet alloying system and method
US6274937B1 (en) * 1999-02-01 2001-08-14 Micron Technology, Inc. Silicon multi-chip module packaging with integrated passive components and method of making
US6448155B1 (en) * 1999-06-17 2002-09-10 Canon Kabushiki Kaisha Production method of semiconductor base material and production method of solar cell
US6486008B1 (en) * 2000-02-25 2002-11-26 John Wolf International, Inc. Manufacturing method of a thin film on a substrate

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090117680A1 (en) * 2007-11-01 2009-05-07 Shunpei Yamazaki Method for manufacturing photoelectric conversion device
US7964429B2 (en) 2007-11-01 2011-06-21 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing photoelectric conversion device
US20090181492A1 (en) * 2008-01-11 2009-07-16 Peter Nunan Nano-cleave a thin-film of silicon for solar cell fabrication
KR101113503B1 (en) 2009-10-30 2012-02-29 고려대학교 산학협력단 Method for fabricating silicon solar cell using induced current apparatus
US20170162388A1 (en) * 2015-12-02 2017-06-08 Ananda H. Kumar Structure and method for high performance large-grain-poly silicon backplane for oled applications
US9881800B2 (en) * 2015-12-02 2018-01-30 Ananda H. Kumar Structure and method for high performance large-grain-poly silicon backplane for OLED applications

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