US20040194885A1

US20040194885A1 - Degas chamber particle shield

Info

Publication number: US20040194885A1
Application number: US10/407,694
Authority: US
Inventors: David Stacey; Jonathan Allinger; Zachary Prather
Original assignee: LSI Logic Corp
Current assignee: LSI Corp
Priority date: 2003-04-04
Filing date: 2003-04-04
Publication date: 2004-10-07

Abstract

A substrate processing chamber of the type adapted for processing a substrate having edges and a surface at a reduced pressure and elevated temperature relative to ambient. Typically, a combination of the elevated temperature and the reduced pressure tends to produce spallation of the substrate near the edges, which spallation produces chips that are redeposited across the surface of the substrate. Such chips inhibit proper operation of subsequent processing of the substrate. The improvement is a shield disposed in proximity to the surface of the substrate, but not touching the substrate. The shield forms a perimeter barrier at a circumference of the substrate that is interior to the edges of the substrate where the spallation occurs, and the shield prohibits the chips from redepositing across portions of the surface of the substrate that are interior to the perimeter barrier.

Description

FIELD

This invention relates to the field of integrated circuit fabrication. More particularly, this invention relates to reducing the detrimental effects of particle generation on process yield.

BACKGROUND

Consumers continually pressure integrated circuit manufacturers to provide devices that are smaller and faster, so that more operations can be performed in a given amount of time, using fewer devices that occupy a reduced amount of space and generate less heat. For many years, the integrated circuit fabrication industry has been able to provide smaller and faster devices, which tend to double in capacity every eighteen months or so.

However, as integrated circuits become smaller, the challenges of fabricating the devices tend to become greater. Fabrication processes and device configurations that didn't present any problems at a larger device size tend to resolve into new problems to be overcome as the device size is reduced. For example, in the past, when device sizes were much larger than they are today, the materials that formed the various layers of an integrated circuit could generally be deposited in thicker layers, because the overall geometry of each device on the integrated circuit was larger. Even though the layers were very thin in comparison to other technologies, the relative thickness of the layers as compared to the device geometries tended to provide the layers with a certain degree of structural strength and rigidity. As a result of this condition, and the relatively large amount of surface area between layers, the layers tended to remain laminated one to another quite well.

However, as device geometries have been reduced, not only is there less surface area between layers for them to adhere one to another, but the thicknesses of the layers has also generally been reduced. Thus, the layers themselves tend to have less mechanical strength and rigidity. These and other conditions tend to increase the occurrence of delamination between layers. Additionally, new materials, such as low k materials which tend to absorb and retain a relatively high degree of moisture, and which have reduced surface area due to their porosity, also tend to reduce the adhesion between layers, and thus increase the incidence of delamination between layers.

One solution to the delamination problem has been to bake the substrates at an elevated temperature prior to depositing an overlying layer. In this manner, materials that have adsorbed on the surface of the substrate tend to be volatized and provided with sufficient energy to escape the surface of the substrate. By drawing a vacuum on the substrate during the baking process, these volatized components can be withdrawn from the substrate. This process is generally referred to as a degas process. By degassing the substrate prior to deposition of the overlying layer, the overlying layer tends to adhere better over time to the underlying layer, and thus the degree and frequency of delamination is reduced. In addition, the degree of electrical resistance between layers, such as between adjacent electrically conductive layers, also tends to be reduced.

Unfortunately, the degas process tends to introduce new problems of its own. For example, in order for the degas to be effective, it is desirable to bake the substrate at a temperature of about 270 centigrade, and to reduce the pressure to no more than about the low millitorr range. At this temperature and pressure, the substrate tends to experience some degree of physical damage. For example, portions of the substrate, such as layers that have been previously deposited, tend to come loose from the substrate as relatively small chips or flakes. This tends to occur primarily at the edges of the substrate where die yield may be relatively low regardless of the flaking problem.

However, the spalling flakes tend to land back on the surface of the substrate. Because degas tends to be a process prior to the actual deposition, the flakes prohibit adequate formation of the deposited layer wherever they have landed, thus causing defects in all such devices on the substrate, and dramatically reducing the process yield.

What is needed, therefore, is a system by which the yield losses due to spallation and other particle generation during degassing can be reduced.

SUMMARY

The above and other needs are met by an improvement to a substrate processing chamber of the type adapted for processing a substrate having edges and a surface at a reduced pressure and elevated temperature relative to ambient. Typically, a combination of the elevated temperature and the reduced pressure tends to produce spallation of the substrate near the edges, which spallation produces chips that are redeposited across the surface of the substrate. Such chips inhibit proper operation of subsequent processing of the substrate. The improvement is a shield disposed in proximity to the surface of the substrate, but not touching the substrate. The shield forms a perimeter barrier at a circumference of the substrate that is interior to the edges of the substrate where the spallation occurs, and the shield prohibits the chips from redepositing across portions of the surface of the substrate that are interior to the perimeter barrier.

In this manner, the chips that are produced during the thermal processing do not redeposit on devices on the substrate that are otherwise good devices. Thus, the spallation of chips does not reduce the yield of otherwise good devices.

In various preferred embodiments, the processing chamber is a degas chamber. The shield is preferably disposed at a distance of between about zero millimeters and about five millimeters from the substrate. Preferably, the shield is formed of at least one of stainless steel, titanium, molybdenum, and quartz. The shield preferably has a thickness of between about one-half millimeter and about one and one-half millimeters. In one preferred embodiment, the shield is held at an absolute bias voltage relative to the substrate of between about zero volts and about five thousand volts. In this embodiment, the shield is preferably electrically insulated from the processing chamber at a location where the shield is physically attached to the processing chamber.

The shield is preferably adjustable as to the circumference of the substrate, and may also be adjustable as to the proximity to the substrate. In the preferred embodiment, the substrate is a semiconducting substrate, and is most preferably formed of at least one of silicon, germanium, and a III-V compound such as gallium arsenide. The reduced pressure is preferably less than about one millitorr, and the elevated temperature is preferably at least about two hundred centigrade. Preferably, the shield is formed in a cylinder. The shield may be formed of a solid sheet, or in alternate embodiments the shield is formed of a mesh sheet. Further yet, the shield in some embodiments is formed of a ceramic material having a vitreous surface. Preferably, the shield is formed of a material having a thermal expansion that is less than that of the substrate.

BRIEF DESCRIPTION OF THE DRAWINGS

Further advantages of the invention are apparent by reference to the detailed description when considered in conjunction with the figures, which are not to scale so as to more clearly show the details, wherein like reference numbers indicate like elements throughout the several views, and wherein: [0013]
FIG. 1 is a cross sectional representation of a processing chamber incorporating a particle shield according to an embodiment of the invention, and [0014]
FIG. 2 is a top plan view of a particle shield according to an embodiment of the invention.[0015]

DETAILED DESCRIPTION

With reference now to FIG. 1, there is depicted a cross sectional representation of a [0016] processing chamber 10 incorporating a particle shield 24 according to an embodiment of the invention. It is appreciated that the construction of the processing chamber 10 as depicted in FIG. 1 is representative only, and that in actual implementation the particle shield 24 could be incorporated into processing chambers 10 of many different configurations, based on the principles as described herein.
In the example depicted in FIG. 1, the [0017] processing chamber 10 is preferably a degas chamber. Thus, the chamber 10 preferably has a processing environment 12, into which a substrate 14 is introduced and processed. In the present example of a degas chamber, the substrate 12 is preferably heated, such as by thermal energy source 16, and a vacuum is preferably drawn within the processing environment 12, so as to draw away any materials that are volatized either by the reduced pressure or the elevated temperature of the processing environment 12.
As mentioned above, such an [0018] environment 12 as described herein, and other processing environments as well, have a tendency to cause the substrate 14 to spall near the circumferential edges 18 of the substrate 14. Thus, the particle shield 24 is preferably so disposed within the chamber 10 as to create a relatively closed sub-environment 30 within the processing environment 12. As flakes, chips, or other particle forms are expelled from the circumferential edges 18 of the substrate 14, they are substantially trapped within the sub-environment 30 by the particle shield 24, and thus prohibited in substantial measure from redepositing on the interior portions 20 of the substrate 14. Thus, the particles generated at the circumferential edges 18 of the substrate 14 do not create further yield problems with the devices located on the interior portions 20 of the substrate 14.
The [0019] substrate 14 is preferably retained against a support 28, such as by gravity. The support may also provide other functions, such as elevating the substrate 14 within the processing chamber 10, and bringing it up into the processing environment 12. The support 28 also preferably brings the substrate 14 in to the desired proximity with the particle shield 24.
The [0020] particle shield 24 is preferably retained within the processing chamber 10 such as by a mount 26. In the example as depicted, the mount 26 is affixed to the collimator 22 of the degas chamber. However, in other embodiments the mount 26 could be affixed to other elements within the processing chamber 10, or the particle shield could be mounted directly to one or more elements within the processing chamber 10, without the benefit of an intermediate mount 26. However, in the preferred embodiment of a degas chamber, there is a collimator present to which the mount 26 can be affixed, and there are some benefits to doing so, and to having an intermediary mount 26 between the collimator 22 and the particle shield 24, as described in more detail elsewhere herein.
In one preferred embodiment, the [0021] particle shield 24 is held at an absolute bias voltage relative to the substrate 14 of between about zero volts and about five thousand volts. In other words, the bias of the particle shield 24 may be positive or negative in regard to the bias of the substrate 14, but with a voltage differential within the limits as given above. In this embodiment, the particle shield 24 is preferably electrically insulated from the processing chamber 10 at a location where the particle shield 24 is physically attached to the processing chamber 10. In this embodiment, it is particularly convenient and preferred to electrically insulate the collimator 22 from the chamber body 10, which thus provides the electrical insulation between the particle shield 24 and the other elements of the processing chamber 10.
The benefit of the potential bias is that it tends to attract the particles that are generated at the circumferential edges of the [0022] substrate 14 to the particle shield 24, and thus tends to help retain the clean environment 12 within the processing chamber 10. In such an embodiment, the particle shield 24 may even be formed of a mesh sheet, as the voltage bias may be sufficient to adequately prohibit particles from leaving the sub-environment 30 and entering the main environment 12 of the processing chamber 10 at the interior 20 of the substrate 14.
The [0023] particle shield 24 is preferably disposed at a distance of between about zero millimeters and about five millimeters from the substrate 14. Thus, the particle shield 24 preferably does not actually touch the substrate 14, but is close enough to the surface of the substrate 14 that spalling material from the circumferential edges 18 of the substrate 14 cannot easily traverse the small gap between the particle shield 24 and the surface of the substrate 14, and redeposit on the interior portions 20 of the substrate 14. Preferably, the particle shield 24 is formed of at least one of stainless steel, molybdenum, titanium, and quartz. The particle shield 24 preferably has a thickness of between about one-half millimeter and about one and one-half millimeters.
The [0024] particle shield 24 may adjustable as to the circumference of the substrate 14, and may also be adjustable as to the proximity to the substrate 14. In other embodiments, the particle shield 24 may be replaceable, with various particle shields 24 having standardized fittings to attach to the mount 26, but having interior diameters of different values to accommodate substrates 14 of different sizes. Preferably, the particle shield 24 is substantially formed in a cylinder, as depicted in FIG. 2, which is a top plan view of the particle shield 24. The particle shield 24 is preferably formed of a solid sheet of material. Alternately, the particle shield 24 is in some embodiments formed of a ceramic material having a vitreous surface. Preferably, the particle shield 24 is formed of a material having a thermal capacitance that is less than that of the substrate 14, so as to not disrupt the thermal processing within the degas chamber 10.
The [0025] particle shield 24 may have a gap 32 in it, as depicted in FIG. 2. The gap 32 allows for several purposes, as may be desirable in different configurations of the processing chamber 10. For example, the gap 32 in the particle shield 24 allows the particle shield 24 to be squeezed in on itself, reducing the overall diameter of the particle shield 24 and allowing it to be removed from the mount 26 in the configuration as depicted in FIG. 1. Further, the gap 32 provides for a line of sight through a view port in the outer wall of the processing chamber 10. The gap 32 may also provide room for other elements of necessity or convenience within the processing chamber 10. Most preferably, the gap 32 is as small as necessary to accomplish the purposes for which it may be present, so as to provide as complete a barrier to the particles as possible.
The foregoing description of preferred embodiments for this invention have been presented for purposes of illustration and description. They are not intended to be exhaustive or to limit the invention to the precise form disclosed. Obvious modifications or variations are possible in light of the above teachings. The embodiments are chosen and described in an effort to provide the best illustrations of the principles of the invention and its practical application, and to thereby enable one of ordinary skill in the art to utilize the invention in various embodiments and with various modifications as are suited to the particular use contemplated. All such modifications and variations are within the scope of the invention as determined by the appended claims when interpreted in accordance with the breadth to which they are fairly, legally, and equitably entitled. [0026]

Claims

What is claimed is:

1. In a substrate processing chamber of the type adapted for processing a substrate having edges and a surface at a reduced pressure and elevated temperature relative to ambient, where a combination of the elevated temperature and the reduced pressure tends to produce spallation of the substrate near the edges, which spallation produces chips that are redeposited across the surface of the substrate, and which chips inhibit proper operation of subsequent processing of the substrate, the improvement comprising a shield disposed in proximity to the surface of the substrate, and not touching the substrate, the shield forming a perimeter barrier at a circumference of the substrate that is interior to the edges of the substrate where the spallation occurs, the shield prohibiting the chips from redepositing across portions of the surface of the substrate that are interior to the perimeter barrier.

2. The processing chamber of claim 1, wherein the processing chamber is a degas chamber.

3. The processing chamber of claim 1, wherein the shield is disposed at a distance of between about zero millimeters and about five millimeters from the substrate.

4. The processing chamber of claim 1, wherein the shield is formed of at least one of stainless steel, titanium, molybdenum, and quartz.

5. The processing chamber of claim 1, wherein the shield has a thickness of between about one-half millimeter and about one and one-half millimeters.

6. The processing chamber of claim 1, wherein the shield is held at an absolute bias voltage relative to the substrate of between about zero volts and about five thousand volts.

7. The processing chamber of claim 1, wherein the shield is electrically insulated from the processing chamber at a location where the shield is electrically attached to the processing chamber.

8. The processing chamber of claim 1, wherein the shield is adjustable as to the circumference of the substrate.

9. The processing chamber of claim 1, wherein the shield is adjustable as to the proximity to the substrate.

10. The processing chamber of claim 1, wherein the substrate is a semiconducting substrate.

11. The processing chamber of claim 1, wherein the substrate is formed of at least one of silicon, germanium, and a III-V compound such as gallium arsenide.

12. The processing chamber of claim 1, wherein the reduced pressure is less than about one millitorr.

13. The processing chamber of claim 1, wherein the elevated temperature is at least about two hundred centigrade.

14. The processing chamber of claim 1, wherein the shield is formed in a cylinder.

15. The processing chamber of claim 1, wherein the shield is formed of a solid sheet.

16. The processing chamber of claim 1, wherein the shield is formed of a mesh sheet.

17. The processing chamber of claim 1, wherein the shield is formed of a ceramic material having a vitreous surface.

18. The processing chamber of claim 1, wherein the shield is formed of a material having a thermal expansion that is less than that of the substrate.

19. In a substrate processing chamber of the type adapted for processing a substrate having edges and a surface at a reduced pressure and elevated temperature relative to ambient, where a combination of the elevated temperature and the reduced pressure tends to produce spallation of the substrate near the edges, which spallation produces chips that are redeposited across the surface of the substrate, and which chips inhibit proper operation of subsequent processing of the substrate, the improvement comprising a shield disposed in proximity to the surface of the substrate, and not touching the substrate, the shield forming a perimeter barrier at a circumference of the substrate that is interior to the edges of the substrate where the spallation occurs, the shield disposed at a distance of between about zero millimeters and about five millimeters from the substrate, the shield formed of at least one of stainless steel, titanium, molybdenum, and quartz, and the shield prohibiting the chips from redepositing across portions of the surface of the substrate that are interior to the perimeter barrier.

20. In a substrate processing chamber of the type adapted for processing a substrate having edges and a surface at a reduced pressure and elevated temperature relative to ambient, where a combination of the elevated temperature and the reduced pressure tends to produce spallation of the substrate near the edges, which spallation produces chips that are redeposited across the surface of the substrate, and which chips inhibit proper operation of subsequent processing of the substrate, the improvement comprising a shield disposed in proximity to the surface of the substrate, and not touching the substrate, the shield forming a perimeter barrier at a circumference of the substrate that is interior to the edges of the substrate where the spallation occurs, the shield held at an absolute bias voltage relative to the substrate of between about zero volts and about five thousand volts, the shield electrically insulated from the processing chamber at a location where the shield is electrically attached to the processing chamber, and the shield prohibiting the chips from redepositing across portions of the surface of the substrate that are interior to the perimeter barrier.