US20060015678A1 - Virtual memory device including a bridge circuit - Google Patents

Virtual memory device including a bridge circuit Download PDF

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Publication number
US20060015678A1
US20060015678A1 US11/179,006 US17900605A US2006015678A1 US 20060015678 A1 US20060015678 A1 US 20060015678A1 US 17900605 A US17900605 A US 17900605A US 2006015678 A1 US2006015678 A1 US 2006015678A1
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Prior art keywords
memory
bridge circuit
random access
xip
volatile
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Abandoned
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US11/179,006
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Chung-Chuan Wang
Chun-Ta Huang
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Winity Tech Inc
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Winity Tech Inc
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Priority to US11/179,006 priority Critical patent/US20060015678A1/en
Assigned to WINITY TECHNOLOGY INC. reassignment WINITY TECHNOLOGY INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: HUANG, CHUN-TA, WANG, CHUNG-CHUAN
Publication of US20060015678A1 publication Critical patent/US20060015678A1/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4234Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
    • G06F13/4243Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus with synchronous protocol
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/445Program loading or initiating
    • G06F9/44521Dynamic linking or loading; Link editing at or after load time, e.g. Java class loading
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04MTELEPHONIC COMMUNICATION
    • H04M1/00Substation equipment, e.g. for use by subscribers
    • H04M1/72Mobile telephones; Cordless telephones, i.e. devices for establishing wireless links to base stations without route selection
    • H04M1/724User interfaces specially adapted for cordless or mobile telephones
    • H04M1/72403User interfaces specially adapted for cordless or mobile telephones with means for local support of applications that increase the functionality
    • H04M1/72406User interfaces specially adapted for cordless or mobile telephones with means for local support of applications that increase the functionality by software upgrading or downloading

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Stored Programmes (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Telephone Function (AREA)
  • Memory System (AREA)

Abstract

A virtual memory device includes a bridge circuit wherein in an integrated SOC device, a bridge circuit with less than 10% die size and a non-volatile XIP random access memory is used to connect to a high efficiency memory bridge circuit, so as to facilitate an improvement of boot-up speed and MMI initialization of a portable mobile device, and performance of network searching and network protocol of a wireless station, as well as a reduction of cost of the entire memory, upon applying inside the portable wireless mobile device. The invention includes an integrated SOC application system interface, incorporating a NAND flash memory, an XIP non-volatile random access memory, a programmable MIF bridge, and a volatile XIP random access memory, is used to perform a virtual memory without an MCU system control interface being a new architecture of MCU system control interface, by means of software simulation.

Description

    BACKGROUND OF THE INVENTION
  • (a) Field of the Invention
  • The present invention relates to a virtual memory device including a bridge circuit, and more particularly to a virtual memory device wherein a bridge circuit with less than 10% die size and a non-volatile XIP (Execute In Place) random access memory is used in an integrated SOC (System-On-Chip) device to connect to a high efficiency memory bridge circuit, thereby constituting a new architecture of virtual memory device.
  • (b) Description of the Prior Art
  • As the continuous advancement of existing personal digital products, their functions are also becoming more versatile. Therefore, a memory device of portable application architecture is also becoming more sophisticated under a restriction of size. However, storage space in a virtual memory is becoming to fail in meeting requirements. The major reason is that the virtual memory with higher efficiency requires the memory with higher storage space for storing program codes, but should satisfy the requirements of low cost and small area at the same time. Therefore, if portable application architecture with a small size and high price is used, a better solution to the storage space in its virtual memory is still not available.
  • Accordingly, how to provide a flash, memory device with a higher efficiency and a lower cost is a motivation of invention of the present inventor.
  • SUMMARY OF THE INVENTION
  • The present invention is to provide a virtual memory device including a bridge circuit, wherein a bridge circuit with less than 10% die size and a non-volatile XIP random access memory is used in an integrated SOC device to connect to a high efficiency memory bridge circuit, so as to facilitate an improvement of boot-up speed and MMI (Man-Machine Interface) initialization of a portable mobile device, and performance of network searching and network protocol of a wireless station, as well as a reduction of cost of the entire memory, upon applying the new architecture of virtual memory device inside the portable mobile device.
  • To enable a further understanding of the said objectives and the technological methods of the invention herein, the brief description of the drawings below is followed by the detailed description of the preferred embodiments.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 shows a system block diagram of the present invention.
  • FIG. 2 shows a schematic view of an implementation of the present invention.
  • FIG. 3 shows a schematic view of a second implementation of the present invention.
  • FIG. 4 shows a schematic view of a third implementation of the present invention.
  • DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
  • Referring to FIG. 1, the present invention is to provide a virtual memory device including a bridge circuit, which is an integrated SOC device A comprising a NAND flash memory B, an XIP non-volatile random access memory C, a programmable MIF (Memory Interface) bridge D, and a volatile XIP random access memory E. By a setting of software simulation, the integrated SOC device A enables a virtual memory device L without an MCU (Main Control Unit) system control interface F to contain the MCU system control interface F.
  • The new architecture of virtual memory device L uses a minimum size of the XIP non-volatile random access memory interface C, the programmable MIF bridge D, and the NAND flash memory B, such that a bridge circuit with less than 10% die size and a non-volatile XIP random access memory H to be used inside the virtual memory device L to connect to a high efficiency virtual memory interface, thereby configuring the new architecture of virtual memory device L into the integrated SOC device with a small size, high density, and low cost A.
  • The NAND flash memory B comprises a function of page fault mechanism address mapping B1, and a function of page fault free management, such that when a program code I of a portable mobile device is loaded into the NAND flash memory B, a memory space of a maximum density can be available inside the integrated SOC device A.
  • The XIP non-volatile random access memory C and the programmable MIF bridge D, are virtual memory interfaces with small sizes, and are integrally bridged into the integrated SOC device A. Moreover, by a setting of software simulation, the XIP non-volatile random access memory C can be integrated with a virtual memory having an SDRAM (Synchronous Dynamic Random Access Memory) memory, a DDR (Double Data Rate) memory, a NOR memory, and an MRAM (Magnetic Random Access Memory) memory.
  • The programmable MIF bridge D can use a means of hardware simulation to enable the integrated SOC device A to integrate the NAND flash memory C therein, so as to provide a dual mode virtual memory interface to the integrated SOC device A, and to configure the new architecture of virtual memory interface into a virtual memory interface of static random access memory and dynamic random access memory.
  • The virtual memory device L is provided with a RISC (Reduced Instruction Set Computer) portable program or a data file J, and the volatile XIP random access memory E is also provided with some executable programs E1. Therefore, when power of a portable device is insufficient, using system software will not cause a loss of the RISC portable program or data file J.
  • The essential consideration of the aforementioned hardware architecture lies in how to integrate the integrated SOC device A into a dual mode virtual memory device L associated with a high efficiency virtual memory interface, thereby improving a boot-up speed K and an MMI initialization K1 of a portable mobile device, and performance of network searching K2 and network protocol K3 of a wireless station, as well as reducing a cost of the entire memory.
  • Referring to FIG. 2, it shows a schematic view of an implementation of the present invention. An integrated SOC device A comprising a NAND flash memory B, an XIP non-volatile random access memory C, a programmable MIF bridge D, and a volatile XIP random access memory, is mainly used to enable a virtual memory interface without an MCU system control interface F to be a new architecture of virtual memory interface containing the MCU system control interface F, by a setting of software simulation.
  • A file system of the NAND flash memory B, which is integrated in the integrated SOC device A, comprises a function of page fault mechanism address mapping B1, and a function of internal page fault free management B2, such that when a program code I of a portable mobile device is loaded into the NAND flash memory B, a memory space of a maximum density can be available inside the integrated SOC device A. Moreover, a PSRAM (Pseudo-Static Random Access Memory) enhanced virtual memory E can configure this volatile XIP random access memory E into a software or hardware system architecture based on different fraction occupied by the internal memory space, thereby constituting a virtual memory system with a lower cost, a higher performance, and lower power consumption.
  • Referring to FIG. 3, an integrated SOC device M can further use a means of hardware bridging or a setting of software simulation to integrate a NAND flash memory M1, a NOR memory M2, and a programmable MIF bridge M3 into the integrated SOC device M, by bridging with a bridge circuit with less than 10% die size and a non-volatile XIP random access memory N. In addition, a PSRAM enhanced virtual memory M4 can configure this volatile XIP random access memory M4 into software or hardware system architecture based on different fraction occupied by the internal memory space, thereby constituting a virtual memory system with a lower cost, a higher performance, and lower power consumption.
  • Referring to FIG. 4, the present invention can further use a setting of software simulation to integrate a NAND flash memory O1, an XIP non-volatile random access memory O2, and a programmable MIF bridge O3 into a dual mode integrated SOC device O, by bridging with a bridge circuit with less than 10% die size and a non-volatile XIP random access memory P; so as to provide a virtual memory system with a lower cost, a higher performance, and lower power consumption, upon applying the integrated SOC device O in a portable mobile device. In addition, the virtual memory system can be configured into software or hardware system architecture.
  • To further manifest the advancement and practicability of the present invention, the advantages of the present invention are listed below:
      • (1) The integrated SOC device can be associated with a virtual memory interface with a small size.
      • (2) It is provided with a new architecture of MCU system control interface by software simulation.
      • (3) It is provided with a virtual memory system with a lower cost, a higher performance, and lower power consumption.
      • (4) The integrated SOC device comprises a bridge circuit with less than 10% die size and a non-volatile XIP random access memory.
      • (5) It is provided with architecture of virtual memory interface by a setting of software simulation.
      • (6) It has advancement, practicability, and convenience.
      • (7) It can improve an industrial competitiveness.
  • It is of course to be understood that the embodiments described herein is merely illustrative of the principles of the invention and that a wide variety of modifications thereto may be effected by persons skilled in the art without departing from the spirit and scope of the invention as set forth in the following claims.

Claims (7)

1. A virtual memory device including a bridge circuit, wherein in an integrated SOC device, a bridge circuit with less than 10% die size and a non-volatile XIP random access memory is used to connect to a high efficiency memory bridge circuit, so as to enable the new architecture of virtual memory device to facilitate an improvement of boot-up speed and MMI initialization of a portable mobile device, and performance of network searching and network protocol of a wireless station, as well as a reduction of a cost of the entire memory, upon applying inside the portable mobile device; the new architecture of virtual memory device comprising an integrated SOC application system interface, which incorporates a NAND flash memory, an XIP non-volatile random access memory, a programmable MIF bridge, and a volatile XIP random access memory, mainly used to enable a virtual memory without an MCU system control interface to be a new architecture of MCU system control interface with a best system performance, by a means of software simulation; a file system of the NAND flash memory including a function of page fault mechanism address mapping, and a function of internal page fault free management, such that when a program code of a portable mobile device is loaded into an application program of the NAND flash memory, a memory space of highest density can be available inside the integrated SOC device; the integrated SOC device containing a RSIC portable program or data file, and the volatile XIP random access memory also containing some executable programs, such that a loss of portable file format will not be occurred when a power of portable mobile device is insufficient.
2. The virtual memory device including a bridge circuit according to claim 1, wherein the programmable MIF bridge and the XIP non-volatile random access memory can be further configured into an MRAM memory, a DDR memory, a NAND flash memory, a NOR memory, and a related high density system simulation memory interface, by a setting of software simulation.
3. The virtual memory device including a bridge circuit according to claim 1, wherein the programmable MIF bridge can further provide a register to configure a memory equipment and a memory type of a system memory interface.
4. The virtual memory device including a bridge circuit according to claim 1, wherein the programmable MIF bridge can further provide a register to configure a start-up of operating system of a NAND flash memory or an XIP non-volatile random access memory.
5. The virtual memory device including a bridge circuit according to claim 1, wherein the programmable MIF bridge can combine the bridge circuit with less than 10% die size and a non-volatile XIP random access memory, and use a MRAM memory and file system management technique to further provide a high reliable operating system start-up of a NAND flash memory, so as to prevent a start-up file of operating system of the file system and a file system control table from damage due to a characteristics of the NAND flash memory, and to prolong a lifetime of entire system.
6. The virtual memory device including a bridge circuit according to claim 1, wherein the bridge circuit with a non-volatile XIP random access memory can use a characteristics of MRAM memory, a file W/R (Write/Read) count, an EDC (Error Detecting Code) count, and a residual storage space of entire memory, to further provide an estimated aging constant of data storage device of the NAND flash memory, provide a file system with a capability of controlling a lifetime of the NAND flash memory storage system and optimizing a lifetime of most essential data of the entire system, and to provide a user with information of a residual storage space of the storage system and a lifetime of the memory system.
7. The virtual memory device including a bridge circuit according to claim 1, wherein the bridge circuit with a non-volatile XIP random access memory can be also converted into an embedded ASIC (Application-Specific Integrated Circuit) for applying to MCU, so as to combine with an MCU of a portable mobile device, thereby developing a same function, and reducing a system cost of the portable wireless mobile device.
US11/179,006 2004-07-01 2005-06-27 Virtual memory device including a bridge circuit Abandoned US20060015678A1 (en)

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US20050228929A1 (en) * 2004-04-02 2005-10-13 Arm Limited Bridge circuit
US20070067151A1 (en) * 2005-08-31 2007-03-22 Advanced Micro Devices, Inc. Memory access to virtual target device
US20070168642A1 (en) * 2006-01-13 2007-07-19 Broadcom Corporation Virtual on-chip memory
CN103853557A (en) * 2014-03-05 2014-06-11 中南大学 Method for starting WinCE by utilizing Uboot network
US20140281308A1 (en) * 2013-03-15 2014-09-18 Bracket Computing, Inc. Storage unit selection for virtualized storage units
US9733867B2 (en) 2013-03-15 2017-08-15 Bracket Computing, Inc. Multi-layered storage administration for flexible placement of data

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US7730015B1 (en) * 2004-10-15 2010-06-01 Oracle America, Inc. Stackable storage access mechanism for file systems
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CN104536799A (en) * 2015-01-16 2015-04-22 浪潮电子信息产业股份有限公司 C/C++ application migration tool from HP-UX platform to K-UX platform
CN110990018B (en) * 2019-10-29 2023-03-24 北京全路通信信号研究设计院集团有限公司 Compiling method and compiling system of embedded system

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US7085874B2 (en) * 2004-04-02 2006-08-01 Arm Limited Synchronous/asynchronous bridge circuit for improved transfer of data between two circuits
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US20140281308A1 (en) * 2013-03-15 2014-09-18 Bracket Computing, Inc. Storage unit selection for virtualized storage units
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US9733867B2 (en) 2013-03-15 2017-08-15 Bracket Computing, Inc. Multi-layered storage administration for flexible placement of data
CN103853557A (en) * 2014-03-05 2014-06-11 中南大学 Method for starting WinCE by utilizing Uboot network

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TWI279718B (en) 2007-04-21
TW200619931A (en) 2006-06-16
US7562354B2 (en) 2009-07-14
TW200620109A (en) 2006-06-16
US20060015838A1 (en) 2006-01-19
TWI273397B (en) 2007-02-11

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Owner name: WINITY TECHNOLOGY INC., TAIWAN

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Effective date: 20050613

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