US20070170453A1 - Package for mounting an optical element and a method of manufacturing the same - Google Patents

Package for mounting an optical element and a method of manufacturing the same Download PDF

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Publication number
US20070170453A1
US20070170453A1 US11/695,213 US69521307A US2007170453A1 US 20070170453 A1 US20070170453 A1 US 20070170453A1 US 69521307 A US69521307 A US 69521307A US 2007170453 A1 US2007170453 A1 US 2007170453A1
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Prior art keywords
frame
package
optical element
window
input
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Abandoned
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US11/695,213
Inventor
Hideaki Takemori
Satoshi Higashiyama
Kazuhiro Hirose
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Hitachi Ltd
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Hitachi Ltd
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Publication of US20070170453A1 publication Critical patent/US20070170453A1/en
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/483—Containers
    • H01L33/486—Containers adapted for surface mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12042—LASER
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12043—Photo diode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H01L33/46—Reflective coating, e.g. dielectric Bragg reflector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/483—Containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Definitions

  • the present invention relates to a package for mounting an optical element and a method of manufacturing the same.
  • Japanese patent laid-open Hll-265957 discloses a method which comprises: stacking a frame provided with cavities formed by punching a green sheet and a bottom plate made of a green sheet provided with through-holes and a metalizing film, pressing the frame and the bottom plate and sintering them in a reducing atmosphere. Then, the stacking is cut into a predetermined size.
  • Japanese patent laid-open 2000-138305 discloses a method of manufacturing a package wherein a frame made of epoxy resin is molded by a transfer molding and the frame is bonded with a ceramic substrate by an epoxy adhesive.
  • the present invention relates to a package for mounting an optical element, a module, a package array, a module array and a method of manufacturing them.
  • the bonding reliability between the insulating substrate and the frame, heat dissipation performance, surface conditions and dimension accuracy are improved.
  • the method using the green sheet disclosed in the patent document No. 1 comprises a sintering step, it has such problems as surface roughing of the frame and the bottom plate, decrease in reliability of metalizing due to thermal history, fluctuation of dimensions due to thermal shrinkage, etc.
  • the surface roughing brings about decrease in a contact area between an optical element and the bottom plate. This phenomenon leads to difficulty in dissipation of a lot of heat generated during performance of the optical element so that error performance, thermal destroy, etc of the optical elements would occur.
  • the thermal history due to sintering not only lowers the reliability of metalizing, but also the thin film solder, low temperature metal material such as aluminum are melted; thus, there is a limitation of construction of the package.
  • the input/output terminals are arranged within an area of the window of the frame so that the optical element mounted on the window is in optical relation with the input/output terminal.
  • This structure is basically the same as the case where a metalizing film formed on the side face and the top and the rare face is used.
  • FIGS. 1 a and 1 b show a structure of a package according to one embodiment of the present invention.
  • FIGS. 2 a and 2 b show a structure of a package according to one embodiment of the present invention.
  • FIGS. 3 a and 3 b show a structure of a package according to one embodiment of the present invention.
  • FIGS. 4 a and 4 b show a structure of a package according to one embodiment wherein the silicon frame is prepared from one surface.
  • FIGS. 5 a and 5 b show a structure of a package wherein electrical conduction between the both faces of the insulating substrate is secured by metalizing on side faces.
  • FIG. 6 is a flow chart of a method for processing the insulating substrate.
  • FIG. 7 is a flow chart of a method for processing the silicon frame.
  • FIG. 8 is a flow chart of a process after bonding the silicon wafer with through-holes and the ceramic substrate with the through-holes.
  • FIG. 9 is a package structure provided with a light emitting diode, a photodiode, a phosphor and a lens.
  • FIG. 10 is a structure of one embodiment according to the present invention wherein a great number of optical elements are mounted.
  • the present invention is characterized in that a silicon frame is mounted on an insulating substrate.
  • silicon means a single crystal.
  • the frame and the insulating substrate should have linear thermal expansion coefficients close to each other.
  • the coefficient of one of the frame or the substrate should be within a range of 1 to 5 times, particularly within a range of 1 to 3 times that of the other.
  • the package includes a device comprising at least one frame made of the single crystal silicon having a window for mounting an optical element therein.
  • the window and the input/output terminal are arranged in optical relation so that light emitted from the light emitting diode is received by the lens.
  • An optical module means a device comprising the optical element mounted on the frame and at least one function element such as light emitting diode, photodiode.
  • the optical element such as a lens and the function element are arranged in optical relation and the function elements are electrically connected.
  • a package array means an assembly comprising a number of packages arranged in a predetermined pattern each comprising the silicon frame, an insulating substrate, an input/output terminal, an input/output pad electrically connected with the input/output terminal.
  • Each of the oblique faces outwardly spreads with respect to the center axis of the window.
  • a module array means an assembly comprising a number of the modules each comprising the package and an optical element mounted on the silicon frame and the function element mounted on the input/output terminal.
  • the present invention it is possible to provide a package for mounting an optical element with bonding reliability between the insulating substrate and the frame, heat dissipation property, surface condition and dimension accuracy and a method for manufacturing the same.
  • Packages for mounting optical elements that generate heat such as light emitting diodes, laser diodes should suppress characteristic damage of the elements due to temperature rise.
  • a package structure and a method of manufacturing the same in considering the heat generating elements.
  • a frame made of silicon is placed on and bonded to an insulating substrate thereby to achieve bonding reliability, surface conditions, dimension accuracy and various layer structures.
  • FIG. 1 ( a ) is a diagrammatic cross sectional view of a package according to the embodiment and FIG. 1 ( b ) is a plane view of the package.
  • the optical element mounting package has a structure wherein a silicon frame 1 prepared by wet etching from the rear face is mounted on an insulating substrate 2 .
  • the silicon frame 1 is mounted on the substrate 2 for mounting an optical element.
  • Input/output terminals 3 a , 3 b are formed on the top surface of the insulating substrate 2 and input/output pads 4 a , 4 b are formed on the bottom surface of the insulating substrate 2 . These are electrically connected by means of conductors or metalizing films formed in through-holes 7 .
  • the input/output terminal 3 a and the input/output pad 4 a are electrically connected by means of the through-hole 7 and the input/output terminal 3 b and the input/output pad 4 b are electrically connected by means of a conductor in the through-hole 7 .
  • the bonding of the silicon frame 1 and the insulating substrate 2 is carried out at a temperature lower than the melting point of a thin film solder 6 in the package to form the thin film solder 9 .
  • An optical element such as a lens is mounted on a window 20 of the frame 1 .
  • the insulating substrate 2 made of a ceramic substrate such as SiC, AlN, alumina, etc is used, high precision patterning of the input/output terminals 3 a , 3 b , the input/output pads 4 a , 4 b and the thin film solder 6 can be carried out.
  • the silicon frame 1 is formed by wet etching a silicon wafer of a crystal plane ( 100 ) in the rear surface thereof; the oblique face of the frame is ( 111 ), that is, the angle constituted by the horizontal surface and the oblique face is 54.74 degrees in crystallography.
  • an aluminum thin film 5 is formed by vacuum evaporation on the oblique face to improve light reflection property. Instead of the aluminum film, films of Au, Ag, etc can be used. Since the silicon frame 1 and the insulating substrate 2 are bonded after the Al thin film 5 is formed on the oblique face, the Al thin film 5 on the oblique face never touches the insulating substrate 2 .
  • bonding of the insulating substrate 2 and the frame 1 is conducted at the temperature lower than that of the thin film solder 9 in the package.
  • an Au thin film for solid bonding or an adhesive such as glass, resins, brazing materials can be used.
  • a SiC substrate having been subjected to mirror polishing was prepared.
  • Input/output terminals 3 a , 3 b were formed on the top surface of the SiC substrate 11 ′ and input/output pads 4 a , 4 b were formed on the bottom surface.
  • a thin film solder 9 for bonding the SiC substrate 11 ′ and a silicon wafer and a thin film solder 6 in the package were formed on the top face of the SiC substrate 11 ′ with the through-holes.
  • the thin film solder 9 should have a melting point lower than that of the thin film solder 9 .
  • FIG. 7 is a flow chart of processing the silicon wafer.
  • a silicon wafer 12 was prepared.
  • the silicon wafer 12 was immersed in an alkaline aqueous solution such as a potassium hydroxide aqueous solution to form through-holes.
  • an alkaline aqueous solution such as a potassium hydroxide aqueous solution
  • a metalizing film 13 was formed on the bottom face of the silicon wafer 12 ′ with through-holes.
  • the metalizing film 13 was formed for the purpose of bonding with the thin film.
  • a reflecting thin film of aluminum was formed on the oblique face of the silicon frame 12 ′ with the through-holes.
  • the film was formed by using a mask to form it only on the oblique faces or on the whole surface of the silicon wafer.
  • a bonding method of processing after bonding between the silicon wafer 12 ′ with the through-holes and the SiC substrate 11 ′ with the through-holes is explained by reference to FIG. 8 .
  • the SiC substrate 11 ′ with the through-holes and the silicon wafer 12 ′ with the through-holes were bonded by means of the thin film solder 9 .
  • the SiC substrate 11 ′ and the silicon wafer 12 ′ were placed on a heater whose temperature was set to 20 to 50° C. higher than the melting point of the thin film solder 9 to carry out the bonding.
  • FIG. 9 shows a cross sectional view of one embodiment of a module comprising a light emitting diode 14 , a photodiode 15 , a phosphor 16 for guiding light to the lens 17 or from the lens to the diodes, silicon f ramel, SiC insulating substrate 2 having through-holes 7 , thin film solder 9 , input/output terminal 3 a , 3 b and input/output pads 4 a , 4 b .
  • Heat from the light emitting diode 14 is effectively dissipated from the SiC insulating substrate 2 .
  • the emitted light is effectively reflected by the aluminum film with excellent reflection property on the oblique faces.
  • the module and package manufactured in the above-described method have the following advantages compared with the conventional ones using green sheets and epoxy resin frame and ceramic substrates.
  • FIG. 2 ( a ) is a diagrammatic cross sectional view of a package of the embodiment of the present invention and FIG. 2 ( b ) is its plane view.
  • the package of embodiment 1 is further downsized, wherein the frame made of silicon wafer 12 ′ shown in FIG. 7 was prepared, then a further etching process was carried out in the both faces.
  • the top portions formed by the oblique faces of 54.74 degrees were etched to a desired extent.
  • FIG. 3 ( a ) is a diagrammatic cross sectional view of a package of the embodiment and FIG. 3 ( b ) is a plane view,
  • the package shown in FIG. 2 is further downsized.
  • an additional wet etching was applied to further process the wafer to completely remove the oblique potions constituted by oblique faces.
  • the structure could be prepared by a dry etching applied to the silicon wafer to form through-holes.
  • the frame 1 ′ made of silicon was formed by a wet etching from both surfaces or by a dry etching.
  • FIG. 4 ( a ) is a diagrammatic cross sectional view of a package according to the embodiment and FIG. 4 ( b ) is its plane view.
  • a photolithographic process was applied to one face of the silicon wafer 12 ′.
  • the size of this embodiment was larger than that of the embodiment 1, the reflection efficiency was higher than the embodiment 1 because of its broader area of the oblique faces.
  • the Si frame 1 ′′′ is prepared by a wet etching from one surface.
  • FIG. 5 ( a ) is a diagrammatic cross sectional view of a package according to the embodiment and FIG. 5 ( b ) is its plane view.
  • the package of this embodiment is provided with a metalizing film 8 on the side face, instead of the through-holes in the embodiment 4 to secure the electric conduction between the front and rare faces of the package.
  • the metalizing for conduction on the side face can be applied to embodiments 1, 2 and 3.
  • the metalizing film 8 functions as input/output terminals 3 a ′, 3 b ′′ and input/output pads 4 a ′, 4 b ′ as shown in FIG. 5 .

Abstract

The optical mounting package of the present invention is featured by mounting a silicon frame on an insulating substrate for mounting the optical element. The package of the present invention is also featured by that the frame mounted on the insulating substrate for mounting the optical element is made of silicon. A method of manufacturing the package of the present invention is featured by mounting the silicon wafer on the insulating substrate.

Description

    CROSS REFERENCE TO RELATED APPLICATION:
  • This application is a division of U.S. patent application Ser. No. 10/988,521 filed Nov. 16, 2004 which claims priority from Japanese Application Ser. No. 2003-420285 filed on Dec. 18, 2003, the entirety of both are incorporated herein by reference.
    • DESCRIPTION OF THE INVENTION
  • 1. Field of the Invention
  • The present invention relates to a package for mounting an optical element and a method of manufacturing the same.
  • 2. Related Art
  • As a package for mounting an optical element, there is disclosed in Japanese patent laid-open Hll-265957 (patent document No.1) a method which comprises: stacking a frame provided with cavities formed by punching a green sheet and a bottom plate made of a green sheet provided with through-holes and a metalizing film, pressing the frame and the bottom plate and sintering them in a reducing atmosphere. Then, the stacking is cut into a predetermined size. Japanese patent laid-open 2000-138305 (Patent document No 2) discloses a method of manufacturing a package wherein a frame made of epoxy resin is molded by a transfer molding and the frame is bonded with a ceramic substrate by an epoxy adhesive.
    • (Patent document No. 1) Japanese patent laid-open Hll-265957
    • (Patent document No. 2) Japanese patent laid-open 2000-138305
    SUMMARY OF THE INVENTION
  • The present invention relates to a package for mounting an optical element, a module, a package array, a module array and a method of manufacturing them. The bonding reliability between the insulating substrate and the frame, heat dissipation performance, surface conditions and dimension accuracy are improved.
  • Since the method using the green sheet disclosed in the patent document No. 1 comprises a sintering step, it has such problems as surface roughing of the frame and the bottom plate, decrease in reliability of metalizing due to thermal history, fluctuation of dimensions due to thermal shrinkage, etc. The surface roughing brings about decrease in a contact area between an optical element and the bottom plate. This phenomenon leads to difficulty in dissipation of a lot of heat generated during performance of the optical element so that error performance, thermal destroy, etc of the optical elements would occur. The thermal history due to sintering not only lowers the reliability of metalizing, but also the thin film solder, low temperature metal material such as aluminum are melted; thus, there is a limitation of construction of the package. The input/output terminals are arranged within an area of the window of the frame so that the optical element mounted on the window is in optical relation with the input/output terminal. This structure is basically the same as the case where a metalizing film formed on the side face and the top and the rare face is used.
  • Since the method disclosed in patent document No. 2, which uses the frame made of epoxy resin utilizes a molding method for manufacturing the frame, the molds must be prepared in accordance with changing of the shapes of the molds, which leads to fluctuation of dimension of the molds. There may be a possibility of peeling off or cracks due to thermal stress; moreover, heat resistance and thermal conductivity of the epoxy resin are low.
    • BRIEF DESCRIPTION OF DRAWINGS:
  • FIGS. 1 a and 1 b show a structure of a package according to one embodiment of the present invention.
  • FIGS. 2 a and 2 b show a structure of a package according to one embodiment of the present invention.
  • FIGS. 3 a and 3 b show a structure of a package according to one embodiment of the present invention.
  • FIGS. 4 a and 4 b show a structure of a package according to one embodiment wherein the silicon frame is prepared from one surface.
  • FIGS. 5 a and 5 b show a structure of a package wherein electrical conduction between the both faces of the insulating substrate is secured by metalizing on side faces.
  • FIG. 6 is a flow chart of a method for processing the insulating substrate.
  • FIG. 7 is a flow chart of a method for processing the silicon frame.
  • FIG. 8 is a flow chart of a process after bonding the silicon wafer with through-holes and the ceramic substrate with the through-holes.
  • FIG. 9 is a package structure provided with a light emitting diode, a photodiode, a phosphor and a lens.
  • FIG. 10 is a structure of one embodiment according to the present invention wherein a great number of optical elements are mounted.
    • DETAILED DESCRIPTION OF THE INVENTION:
  • It is an object of the present invention to provide a package for mounting an optical element with high bonding reliability between the insulating substrate and the frame, heat dissipation property, surface conditions and dimension accuracy and a method for manufacturing the same.
  • The present invention is characterized in that a silicon frame is mounted on an insulating substrate. In the specification, silicon means a single crystal. The frame and the insulating substrate should have linear thermal expansion coefficients close to each other. The coefficient of one of the frame or the substrate should be within a range of 1 to 5 times, particularly within a range of 1 to 3 times that of the other.
  • The package includes a device comprising at least one frame made of the single crystal silicon having a window for mounting an optical element therein. The window and the input/output terminal are arranged in optical relation so that light emitted from the light emitting diode is received by the lens.
  • An optical module means a device comprising the optical element mounted on the frame and at least one function element such as light emitting diode, photodiode. The optical element such as a lens and the function element are arranged in optical relation and the function elements are electrically connected.
  • A package array means an assembly comprising a number of packages arranged in a predetermined pattern each comprising the silicon frame, an insulating substrate, an input/output terminal, an input/output pad electrically connected with the input/output terminal. Each of the oblique faces outwardly spreads with respect to the center axis of the window.
  • A module array means an assembly comprising a number of the modules each comprising the package and an optical element mounted on the silicon frame and the function element mounted on the input/output terminal.
  • According to the present invention, it is possible to provide a package for mounting an optical element with bonding reliability between the insulating substrate and the frame, heat dissipation property, surface condition and dimension accuracy and a method for manufacturing the same.
    • PREFERRED EMBODIMENTS OF THE INVENTION
  • Packages for mounting optical elements that generate heat such as light emitting diodes, laser diodes should suppress characteristic damage of the elements due to temperature rise. In the embodiments of the present invention, a package structure and a method of manufacturing the same in considering the heat generating elements.
  • In the embodiments of the present invention, a frame made of silicon is placed on and bonded to an insulating substrate thereby to achieve bonding reliability, surface conditions, dimension accuracy and various layer structures.
    • Embodiment 1
  • In the following, the embodiment of the present invention will be explained by reference to drawings. FIG. 1(a) is a diagrammatic cross sectional view of a package according to the embodiment and FIG. 1(b) is a plane view of the package.
  • As shown in FIGS. 1(a) and 1(b), the optical element mounting package has a structure wherein a silicon frame 1 prepared by wet etching from the rear face is mounted on an insulating substrate 2. The silicon frame 1 is mounted on the substrate 2 for mounting an optical element. Input/ output terminals 3 a, 3 b are formed on the top surface of the insulating substrate 2 and input/ output pads 4 a, 4 b are formed on the bottom surface of the insulating substrate 2. These are electrically connected by means of conductors or metalizing films formed in through-holes 7. The input/output terminal 3 a and the input/output pad 4 a are electrically connected by means of the through-hole 7 and the input/output terminal 3 b and the input/output pad 4 b are electrically connected by means of a conductor in the through-hole 7.
  • The bonding of the silicon frame 1 and the insulating substrate 2 is carried out at a temperature lower than the melting point of a thin film solder 6 in the package to form the thin film solder 9. An optical element such as a lens is mounted on a window 20 of the frame 1.
  • When the insulating substrate 2 made of a ceramic substrate such as SiC, AlN, alumina, etc is used, high precision patterning of the input/ output terminals 3 a, 3 b, the input/ output pads 4 a, 4 b and the thin film solder 6 can be carried out.
  • The silicon frame 1 is formed by wet etching a silicon wafer of a crystal plane (100) in the rear surface thereof; the oblique face of the frame is (111), that is, the angle constituted by the horizontal surface and the oblique face is 54.74 degrees in crystallography. The surface condition of the oblique face is Ra=0.02 to 0.06 μm and the surface condition is much smoother than that of sintered bodies (Ra=about 0.2 μm). Further, an aluminum thin film 5 is formed by vacuum evaporation on the oblique face to improve light reflection property. Instead of the aluminum film, films of Au, Ag, etc can be used. Since the silicon frame 1 and the insulating substrate 2 are bonded after the Al thin film 5 is formed on the oblique face, the Al thin film 5 on the oblique face never touches the insulating substrate 2.
  • In the structure of FIGS. 1(a) and 1(b), bonding of the insulating substrate 2 and the frame 1 is conducted at the temperature lower than that of the thin film solder 9 in the package. Instead of the thin film solder 9, an Au thin film for solid bonding or an adhesive such as glass, resins, brazing materials can be used.
  • Then, a method of manufacturing the package will be explained by reference to FIGS. 6, 7 and 8.
  • At first, a processing step of the insulating substrate is explained by reference to FIG. 6.
  • (1) A SiC substrate having been subjected to mirror polishing was prepared.
  • (2) Through-holes 7 wee formed in the SiC substrate 11 and the inner faces of the through-holes were metalized.
  • (3) Input/ output terminals 3 a, 3 b were formed on the top surface of the SiC substrate 11′ and input/ output pads 4 a, 4 b were formed on the bottom surface.
  • (4) A thin film solder 9 for bonding the SiC substrate 11′ and a silicon wafer and a thin film solder 6 in the package were formed on the top face of the SiC substrate 11′ with the through-holes. The thin film solder 9 should have a melting point lower than that of the thin film solder 9.
  • A method of processing the silicon frame is explained by reference to FIG. 7, which is a flow chart of processing the silicon wafer.
  • (1) A silicon wafer 12 was prepared.
  • (2) After the photolithographic process of the both faces of the silicon wafer 12, the silicon wafer 12 was immersed in an alkaline aqueous solution such as a potassium hydroxide aqueous solution to form through-holes.
  • (3) A metalizing film 13 was formed on the bottom face of the silicon wafer 12′ with through-holes. The metalizing film 13 was formed for the purpose of bonding with the thin film.
  • (4) A reflecting thin film of aluminum was formed on the oblique face of the silicon frame 12′ with the through-holes. The film was formed by using a mask to form it only on the oblique faces or on the whole surface of the silicon wafer.
  • A bonding method of processing after bonding between the silicon wafer 12′ with the through-holes and the SiC substrate 11′ with the through-holes is explained by reference to FIG. 8.
  • (1) The SiC substrate 11′ with the through-holes and the silicon wafer 12′ with the through-holes were bonded by means of the thin film solder 9. The SiC substrate 11′ and the silicon wafer 12′ were placed on a heater whose temperature was set to 20 to 50° C. higher than the melting point of the thin film solder 9 to carry out the bonding.
  • (2) The stacked member of the SiC substrate 11′ and the silicon wafer 12′ was cut into frames of a desired outer size to obtain a desired package.
  • FIG. 9 shows a cross sectional view of one embodiment of a module comprising a light emitting diode 14, a photodiode 15, a phosphor 16 for guiding light to the lens 17 or from the lens to the diodes, silicon f ramel, SiC insulating substrate 2 having through-holes 7, thin film solder 9, input/ output terminal 3 a, 3 b and input/ output pads 4 a, 4 b. Heat from the light emitting diode 14 is effectively dissipated from the SiC insulating substrate 2. The emitted light is effectively reflected by the aluminum film with excellent reflection property on the oblique faces.
  • The module and package manufactured in the above-described method have the following advantages compared with the conventional ones using green sheets and epoxy resin frame and ceramic substrates.
  • (1) Since the linear expansion coefficient of single crystal silicon is 3.5×10−6/K and that of SiC insulating substrate is 3.2×10−6/K, they are almost the same. The bonding reliability with respect to the thermal history is remarkably good. Accordingly, not only the small size package shown in FIG. 1 but the wafer size package shown in FIG. 10 consisting of several hundreds to several thousands optical elements can be easily manufactured.
  • (2) Since the thermal conductivity of SiC is 300 W/m·K and that of silicon is 145 W/m·K, both being quite large, it is easy to dissipate heat from the optical element so that the degradation of performance of the optical element can be prevented.
  • (3) Since the SiC substrate and the silicon frame are processed in the form of plates, rocesses for semiconductors such as photolithography can be applied as they are; the packages can be manufactured economically. Since the method does not comprise sintering step, which may bring about thermal shrinkage by sintering, so that the accuracy of the final package product was high.
    • Embodiment 2
  • FIG. 2(a) is a diagrammatic cross sectional view of a package of the embodiment of the present invention and FIG. 2(b) is its plane view.
  • In the embodiment, the package of embodiment 1 is further downsized, wherein the frame made of silicon wafer 12′ shown in FIG. 7 was prepared, then a further etching process was carried out in the both faces. The top portions formed by the oblique faces of 54.74 degrees were etched to a desired extent.
    • Embodiment 3
  • FIG. 3(a) is a diagrammatic cross sectional view of a package of the embodiment and FIG. 3(b) is a plane view,
  • In this embodiment, the package shown in FIG. 2 is further downsized. After the frame of the silicon wafer 12′ shown in FIG. 7 was prepared, an additional wet etching was applied to further process the wafer to completely remove the oblique potions constituted by oblique faces. The structure could be prepared by a dry etching applied to the silicon wafer to form through-holes. The frame 1′ made of silicon was formed by a wet etching from both surfaces or by a dry etching.
    • Embodiment 4
  • FIG. 4(a) is a diagrammatic cross sectional view of a package according to the embodiment and FIG. 4(b) is its plane view.
  • In this embodiment, a photolithographic process was applied to one face of the silicon wafer 12′. Although the size of this embodiment was larger than that of the embodiment 1, the reflection efficiency was higher than the embodiment 1 because of its broader area of the oblique faces. The Si frame 1′″ is prepared by a wet etching from one surface.
    • Embodiment 5
  • FIG. 5(a) is a diagrammatic cross sectional view of a package according to the embodiment and FIG. 5(b) is its plane view.
  • The package of this embodiment is provided with a metalizing film 8 on the side face, instead of the through-holes in the embodiment 4 to secure the electric conduction between the front and rare faces of the package. The metalizing for conduction on the side face can be applied to embodiments 1, 2 and 3. The metalizing film 8 functions as input/output terminals 3 a′, 3 b″ and input/output pads 4 a′, 4 b′ as shown in FIG. 5.

Claims (7)

1. A package for mounting an optical element comprising a frame made of single crystal silicon and having a window for mounting the optical element thereon and an insulating substrate being bonded to the frame and having a linear thermal expansion coefficient close to that of the frame, wherein the insulating substrate has an input/output terminal on one face and an input/output pad on the other face, the terminal and the pad being electrically connected by means of a conductor formed in a through-hole in the insulating substrate and the input/output terminal being arranged within an area of the window.
2. A package for mounting an optical element comprising a frame made of single crystal silicon and having a window for mounting the optical element thereon and an insulating substrate being bonded to the frame and having a linear thermal expansion coefficient close to that of the frame, wherein the insulating substrate has a metalizing film on both faces and side face of the substrate, the metalizing film electrically connecting the input/output terminals formed on one face of the substrate and input/output pads formed on the other face of the substrate and the input/output terminal being arranged within an area of the window.
3. The package according to claim 1, wherein the window of the frame has oblique faces where the optical element is mounted, each of the oblique faces outwardly spreading with respect to the center axis of the window.
4. The package according to claim 2, wherein the window of the frame has oblique faces where the optical element is mounted, each of the oblique faces outwardly spreading with respect to the center axis of the window.
5. A module comprising a frame of silicon single crystal having a window, an insulating substrate bonded to the frame and having a linear thermal expansion coefficient close to that of the frame, a light emitting diode, a photodiode, input/output terminals each being connected to each of the diodes, input/output pads each being connected to each of the diodes and an optical element mounted on the window, the element being located in optical relation with the diodes.
6. A package array constituted by a number of packages each being defined in claim 1.
7. A module array constituted by a number of modules each being defined in claim 4.
US11/695,213 2003-12-18 2007-04-02 Package for mounting an optical element and a method of manufacturing the same Abandoned US20070170453A1 (en)

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US10/988,521 US8008675B2 (en) 2003-12-18 2004-11-16 Package for mounting an optical element and a method of manufacturing the same
US11/695,213 US20070170453A1 (en) 2003-12-18 2007-04-02 Package for mounting an optical element and a method of manufacturing the same

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CN1630069A (en) 2005-06-22
CN1630069B (en) 2010-05-05
JP2005183558A (en) 2005-07-07
EP1544912A3 (en) 2012-05-02
US8008675B2 (en) 2011-08-30
EP1544912A2 (en) 2005-06-22
US20050132747A1 (en) 2005-06-23
TW200522290A (en) 2005-07-01
JP4258367B2 (en) 2009-04-30
TWI270184B (en) 2007-01-01

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