US20070279836A1 - Monolithic capacitor and mounting structure thereof - Google Patents
Monolithic capacitor and mounting structure thereof Download PDFInfo
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- US20070279836A1 US20070279836A1 US11/780,620 US78062007A US2007279836A1 US 20070279836 A1 US20070279836 A1 US 20070279836A1 US 78062007 A US78062007 A US 78062007A US 2007279836 A1 US2007279836 A1 US 2007279836A1
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- external terminal
- multilayer body
- conductor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/018—Dielectrics
- H01G4/06—Solid dielectrics
- H01G4/08—Inorganic dielectrics
- H01G4/12—Ceramic dielectrics
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/30—Stacked capacitors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/38—Multiple capacitors, i.e. structural combinations of fixed capacitors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/38—Multiple capacitors, i.e. structural combinations of fixed capacitors
- H01G4/385—Single unit multiple capacitors, e.g. dual capacitor in one coil
Definitions
- the present invention relates to monolithic capacitors and mounting structures of the monolithic capacitors. More specifically, the present invention relates to a monolithic capacitor that is used in a high-frequency circuit and to a mounting structure of the monolithic capacitor.
- a decoupling capacitor that is used in a power supply circuit for an MPU (Micro Processing Unit) in a high frequency range on the order of several GHz
- a monolithic capacitor having a structure described in Japanese Unexamined Patent Application Publication No. 11-144996 (Patent Document 1) is known.
- the monolithic capacitor a plurality of terminals is provided such that adjacent terminals have opposite polarities.
- the length of paths of currents from positive terminals to negative terminals is relatively short, and currents flow in various ways.
- currents are caused to flow in opposite directions so that magnetic fluxes are canceled, thereby decreasing ESL (Equivalent Series Inductance).
- Patent Document 2 for each internal electrode that is provided in a main capacitor unit to define a capacitor, only one lead-out portion extends out to the outer surface of the main capacitor unit and is electrically connected to an external terminal electrode, thereby increasing ESR of the monolithic capacitor.
- preferred embodiments of the present invention provide a monolithic capacitor in which ESL is decreased and ESR is increased at the same time, and a mounting structure of the monolithic capacitor which enables the low ESL characteristics of the monolithic capacitor in which ESL is decreased to be sufficiently exhibited.
- a monolithic capacitor according to a preferred embodiment of the present invention includes a main capacitor unit having a monolithic structure including a lamination of a plurality of dielectric layers. According to the present invention, in order to solve the technical problems described above, the monolithic capacitor is configured as described below.
- the main capacitor unit included in the monolithic capacitor includes first and second capacitor portions.
- the first capacitor portion includes at least one pair of first and second internal electrodes opposing each other via a predetermined one of the dielectric layers so as to define a capacitance.
- the first internal electrode includes a plurality of first lead-out portions extending out to an outer surface of the main capacitor unit, and the second internal electrode includes a plurality of second lead-out portions extending out to the outer surface of the main capacitor unit.
- the second capacitor portion includes at least one pair of third and fourth internal electrodes opposing each other via a predetermined one of the dielectric layers so as to define a capacitance, the third internal electrode includes at least one third lead-out portion extending out to the outer surface of the main capacitor unit, and the fourth internal electrode includes at least one fourth lead-out portion extending out to the outer surface of the main capacitor unit.
- first, second, third, and fourth external terminal electrodes electrically connected individually to the first, second, third, and fourth lead-out portions are provided.
- the number of pairs of the third and fourth lead-out portions for one pair of the third and fourth internal electrodes is less than the number of pairs of the first and second lead-out portions for one pair of the first and second internal electrodes.
- At least one of the number of third lead-out portions for the third internal electrode and the number of fourth lead-out portions for the fourth internal electrode is less than the number of the first lead-out portions for the first internal electrode and the number of the second lead-out portions for the second internal electrode.
- either the third internal electrode or the fourth internal electrode may have the same pattern as either the first internal electrode or the second internal electrode.
- the number of third lead-out portions for the third internal electrode and the number of fourth lead-out portions for the fourth internal electrode are less than the number of first lead-out portions for the first internal electrode and the number of second lead-out portions for the second internal electrode.
- a resonant frequency of the first capacitor portion is greater than a resonant frequency of the second capacitor portion, and an equivalent series resistance per layer provided by one pair of the third and fourth internal electrodes and an intervening one of the dielectric layers included in the second capacitor portion is greater than an equivalent series resistance per layer provided by one pair of the first and second internal electrodes and an intervening one of the dielectric layers included in the first capacitor portion.
- either the third internal electrode or the fourth internal electrode may have the same pattern as the first internal electrode or the second internal electrode.
- At least one of the first and second external terminal electrodes may define at least one of the third and fourth external terminal electrodes.
- the first and second external terminal electrodes are arranged alternately.
- the first capacitor portion and the second capacitor portion are arrayed in a direction of lamination, and the first capacitor portion is located on at least one end in the direction of lamination.
- the second capacitor portion is sandwiched by two first capacitor portions in the direction of lamination.
- Preferred embodiments of the present invention are also directed to a mounting structure of a monolithic capacitor, wherein a monolithic capacitor according to a preferred embodiment described above is mounted on a predetermined mounting surface.
- the monolithic capacitor is mounted with the main capacitor unit arranged so that the first capacitor portion is located closer to the mounting surface.
- the main capacitor unit is divided into the first and second capacitor portions, and the number of pairs of the third and fourth lead-out portions for one pair of the third and fourth internal electrodes in the first capacitor portion is less than the number of pairs of the first and second lead-out portions for one pair of the first and second internal electrodes in the second capacitor portion.
- ESL is further decreased in the first capacitor portion, so that it is possible to make the resonant frequency of the first capacitor portion greater than the resonant frequency of the second capacitor portion.
- the first capacitor portion affects frequency characteristics in a higher frequency range in the combined characteristics of the main capacitor unit. Therefore, the ESL characteristics of the first capacitor portion are reflected, so that the ESL of the main capacitor unit is decreased.
- the ESR of the main capacitor unit is determined according to the combined characteristics of the ESR of the first capacitor portion and the ESR of the second capacitor portion. Since the number of pairs of the third and fourth lead-out portions for one pair of the third and fourth internal electrodes in the first capacitor portion is less than the number of pairs of the first and second lead-out portions for one pair of the first and second internal electrodes in the second capacitor portion as described above, ESR is further increased in the second capacitor portion. Thus, the second capacitor portion causes an increase in the ESR of the main capacitor unit.
- the monolithic capacitor according to the first preferred embodiment of the present invention in order to make the number of pairs of the third and fourth lead-out portions less than the number of pairs of the first and second lead-out portions as described above, by making the number of third lead-out portions for the third internal electrode and the number of fourth lead-out portions for the fourth internal electrode less than the number of first lead-out portions for the first internal electrode and the number of fourth lead-out portions for the second internal electrodes, the decrease in ESL due to the first capacitor portion and the increase in ESR due to the second capacitor portion are reliably achieved.
- the main capacitor unit is divided into the first and second capacitor portions, and the resonant frequency of the first capacitor portion is greater than the resonant frequency of the second capacitor portion. Accordingly, the first capacitor portion affects frequency characteristics in a higher frequency range in the combined characteristics of the main capacitor unit. Therefore, the ESL characteristics of the first capacitor portion are reflected, so that the ESL of the main capacitor unit is decreased.
- the ESR of the main capacitor unit is determined by the combined characteristics of the ESR of the first capacitor portion and the ESR of the second capacitor portion. This causes an increase in the ESR.
- a monolithic capacitor that achieves both a low ESL and a high ESR.
- the main capacitor unit when the first capacitor portion and the second capacitor portion are arrayed in a direction of lamination, and the first capacitor portion is located on at least one end in the direction of lamination, and the monolithic capacitor is mounted with the main capacitor unit arranged so that the first capacitor portion is located closer to the mounting surface, paths of currents that flow from positive external terminal electrodes to negative external terminal electrodes through internal electrodes are further shortened.
- ESL is decreased in the mounting structure. Accordingly, the low ESL characteristics of the monolithic capacitor in which ESL is decreased are sufficiently produced.
- FIG. 1 is a perspective view showing the appearance of a monolithic capacitor according to a first preferred embodiment of the present invention.
- FIG. 2 is a sectional view showing the monolithic capacitor shown in FIG. 1 as mounted, in which the monolithic capacitor is shown in section taken along lines II-II in FIGS. 3A to 4 B.
- FIGS. 3A and 3B are plan views showing the internal structure of a first capacitor portion shown in FIG. 2 , in which FIG. 3A shows a cross-section of a first internal electrode, and FIG. 3B shows a cross-section of a second internal electrode.
- FIGS. 4A and 4B are plan views showing the internal structure of a second capacitor portion shown in FIG. 2 , in which FIG. 4A shows a cross-section of a third internal electrode and FIG. 1B shows a cross-section of a fourth internal electrode.
- FIG. 5 is a diagram schematically showing an equivalent circuit of the monolithic capacitor shown in FIG. 1 .
- FIG. 6 is a diagram showing the circuit configuration of an MPU in which the monolithic capacitor shown in FIG. 1 is used as a decoupling capacitor.
- FIGS. 7A and 7B are diagrams for explaining a monolithic capacitor according to a second preferred embodiment of the present invention, corresponding to FIGS. 4A and 4B .
- FIGS. 8A and 8B are diagrams for explaining a monolithic capacitor according to a third preferred embodiment of the present invention, corresponding to FIGS. 4A and 4B .
- FIGS. 9A to 9 D explain a monolithic capacitor according to a fourth preferred embodiment of the present invention, in which FIGS. 9A and 9B correspond to FIGS. 3A and 3B , respectively, and FIGS. 9C and 9D correspond to FIGS. 4A and 4B , respectively.
- FIGS. 10A to 10 D explain a monolithic capacitor according to a fifth preferred embodiment of the present invention, in which FIGS. 10A and 10B correspond to FIGS. 3A and 3B , respectively, and FIGS. 10C and 10D correspond to FIGS. 4A and 4B , respectively.
- FIGS. 11A and 11B are diagrams for explaining a monolithic capacitor according to a sixth preferred embodiment of the present invention, corresponding to FIGS. 3A and 3B .
- FIGS. 12A and 12B are diagrams for explaining a monolithic capacitor according to a seventh preferred embodiment of the present invention, corresponding to FIGS. 4A and 4B .
- FIG. 13 is a plan view of a dielectric layer for explaining a monolithic capacitor according to an eighth preferred embodiment of the present invention.
- FIGS. 14A to 14 C are diagrams for explaining a monolithic capacitor according to a ninth preferred embodiment of the present invention, corresponding to FIGS. 3A and 3B .
- FIGS. 15A to 15 C are diagrams for explaining a monolithic capacitor according to a tenth preferred embodiment of the present invention, corresponding to FIGS. 4A and 4B .
- FIGS. 16A to 16 C are diagrams for explaining a monolithic capacitor according to an eleventh preferred embodiment of the present invention, corresponding to FIGS. 3A and 3B .
- FIGS. 17A to 17 C are diagrams for explaining a monolithic capacitor according to a twelfth preferred embodiment of the present invention, corresponding to FIGS. 4A and 4B .
- FIG. 18 is a perspective view showing the appearance of a monolithic capacitor according to a thirteenth preferred embodiment of the present invention.
- FIG. 19 is a side view illustrating how first and second capacitor portions are arranged in the monolithic capacitor shown in FIG. 18 .
- FIGS. 20A and 20B are plan views of dielectric layers, showing the internal structure of the first capacitor portion shown in FIG. 19 , in which FIG. 20A shows across-section of a first internal electrode and FIG. 20B shows a cross-section of a second internal electrode.
- FIGS. 21A and 21B are plan views of dielectric layers, showing the internal structure of the second capacitor portion shown in FIG. 19 , in which FIG. 21A shows a cross-section of a third internal electrode and FIG. 21B shows a cross-section of a fourth internal electrode.
- FIG. 22 is a diagram for explaining a monolithic capacitor according to a fourteenth preferred embodiment of the present invention, corresponding to FIG. 19 .
- FIG. 23 is a diagram for explaining a monolithic capacitor according to a fifteenth preferred embodiment of the present invention, corresponding to FIG. 19 .
- FIG. 24 is a diagram illustrating some examples of how first and second capacitor portions are laminated and arranged in first and second experiments performed to confirm the advantages of the present invention.
- FIGS. 25A and 25B are plan views showing patterns of internal electrodes in the first capacitor portion of sample 11 manufactured in the first experiment.
- FIGS. 26A and 26B are plan views showing patterns of internal electrodes in the second capacitor portion of sample 11 manufactured in the first experiment.
- FIG. 27 shows plan views showing patterns of internal electrodes in the first capacitor portion of sample 12 manufactured in the first experiment.
- FIG. 28 shows plan views showing patterns of internal electrodes in the second capacitor portion of sample 12 manufactured in the first experiment.
- FIG. 29 shows plan views showing patterns of internal electrodes in the second capacitor portion in samples 13 and 29 manufactured in the first and second experiments, respectively.
- FIG. 30 is a diagram showing frequency-impedance characteristics of samples 21 , 25 , and 29 produced in experiment 2 .
- FIGS. 1 to 4 B show a monolithic capacitor according to a first preferred embodiment of the present invention.
- FIG. 1 is a perspective view showing the appearance of the monolithic capacitor 1
- FIG. 2 is a sectional view showing a mounting structure of the monolithic capacitor 1 .
- the monolithic capacitor 1 is shown in cross-section taken along lines II-II in FIGS. 3A, 3B , 4 A and 4 B described later.
- the monolithic capacitor 1 preferably includes a substantially rectangular main capacitor unit 8 having two opposing principal surfaces 2 and 3 and four side surfaces 4 , 5 , 6 , and 7 connecting the principal surfaces 2 and 3 .
- the main capacitor unit 8 has a monolithic structure including a lamination of a plurality of dielectric layers 9 parallel to the principal surfaces 2 and 3 , and composed of, for example, a dielectric ceramic material.
- the main capacitor unit 8 includes first capacitor portions 11 and a second capacitor portion 12 .
- the first capacitor portions 11 and the second capacitor portion 12 are arrayed in the direction of lamination, and the second capacitor portion 12 is sandwiched by the two first capacitor portions 11 in the direction of lamination.
- the first capacitor portions 11 are located towards either end in the direction of lamination of the main capacitor unit 8 .
- Each of the first capacitor portions 11 includes at least one pair of first and second internal electrodes 13 and 14 opposing each other via a predetermined dielectric layer 9 so as to define a capacitor.
- the second capacitor portion 12 includes at least one pair of third and fourth internal electrodes 15 and 16 opposing each other via a predetermined dielectric layer 9 so as to define a capacitor.
- At least two pairs of the first and second internal electrodes 13 and 14 and two pairs of the third and fourth internal electrodes 15 and 16 are provided.
- FIGS. 3A and 3B are plan views of the internal structure of the first capacitor portion 11 , in which FIG. 3A shows a cross-section of the first internal electrode 13 and FIG. 3B shows a cross-section of the second internal electrode 14 .
- the first internal electrode 13 includes a plurality of, e.g., seven, first lead-out portions 17 extending out to the outer surface of the main capacitor unit 8 , i.e., to the side surfaces 4 to 7 .
- the second internal electrode 14 includes a plurality of, e.g., seven, second lead-out portions 18 extending out to the outer surface of the main capacitor unit 8 , i.e., to the side surfaces 4 to 7 .
- seven pairs of the first and second lead-out portions 17 and 18 are provided for one pair of the first and second internal electrodes 13 and 14 .
- first external terminal electrodes 19 electrically connected individually to the first lead-out portions 17
- second external terminal electrodes 20 electrically connected individually to the second lead-out portions 18
- the first and second external terminal electrodes 19 and 20 are arranged to extend from the side surfaces 4 to 7 onto portions of the principal surfaces 2 and 3 , as shown in FIGS. 1 and 2 .
- the locations on the side surfaces 4 to 7 to which the individual first lead-out portions 17 extend differ from the locations to which the individual second lead-out portions 18 extend.
- the locations of the individual first external terminal electrodes 19 provided on the side surfaces 4 to 7 differ from the locations of the individual second external terminal electrodes 20 .
- the first external terminal electrodes 19 and the second external terminal electrodes 20 are alternately arranged on the side surfaces 4 to 7 .
- FIGS. 4A and 4B are plan views of the internal structure of the second capacitor portion 12 , in which FIG. 4A shows across-section of the third internal electrode 15 and FIG. 4B shows a cross-section of the fourth internal electrode 16 .
- the third internal electrode 15 includes at least one, e.g., two, third lead-out portion 21 extending out to the outer surface of the main capacitor unit 8 , i.e., to the side surfaces 5 and 7 .
- the fourth internal electrode 16 includes at least one, e.g., two, fourth lead-out portion 22 extending out to the outer surface of the main capacitor unit 8 , i.e., to the side surfaces 5 and 7 .
- two pairs of the third and fourth lead-out portions 21 and 22 are provided for one pair of the third and fourth internal electrodes 15 and 16 .
- the third lead-out portions 21 are electrically connected to the first external terminal electrodes 19 described earlier, and the fourth lead-out portions 22 are electrically connected to the second external terminal electrodes 20 described earlier. That is, some of the first external terminal electrodes 19 are defined by the third external terminal electrodes that are to be electrically connected to the third lead-out portions 21 , and some of the second external terminal electrodes 20 are defined by the fourth external terminal electrodes that are to be electrically connected to the fourth lead-out portions 22 .
- the first capacitor portions 11 and the second capacitor portion 12 are connected in parallel within the monolithic capacitor 1 .
- third and fourth external terminal electrodes that are to be connected to the third and fourth lead-out portions 21 and 22 may be provided separately from the first and second external terminal electrodes.
- the number of pairs of the third and fourth lead-out portions 21 and 22 for one pair of the third and fourth internal electrodes 15 and 16 is less than the number of pairs of the first and second lead-out portions 17 and 18 for one pair of the first and second internal electrodes 13 and 14 . More specifically, two pairs of the third and fourth lead-out portions 21 and 22 are provided for one pair of the third and fourth internal electrodes 15 and 16 , and seven pairs of the first and second lead-out portions 17 and 18 are provided for one pair of the first and second internal electrodes 13 and 14 the former number is two and the latter number is seven.
- the number of the third lead-out portions 21 for each of the third internal electrodes 15 and the number of the fourth lead-out portions 22 for each of the fourth internal electrodes 16 are less than the number of the first lead-out portions 17 for each of the first internal electrodes 13 and the number of the second lead-out portions 18 for each of the second internal electrodes 14 . More specifically, two of the third lead-out portions 21 are provided for each of the third internal electrodes 15 , two of the fourth lead-out portions 22 are provided for each of the fourth internal electrodes 16 , seven of the first lead-out portions 17 are provided for each of the first internal electrodes 13 , and seven of the second lead-out portions 18 for each of the second internal electrodes 14 .
- the ESL of the first capacitor portion 11 is less than the ESL of the second capacitor portion 12 .
- the number of the third lead-out portions 21 for each of the third internal electrodes 15 and the number of the fourth lead-out portions 22 for each of the fourth internal electrodes 16 are less than the number of the first lead-out portions 17 for each of the first internal electrodes 13 and the number of the second lead-out portions 18 for each of the second internal electrodes 14 .
- the ESR of the second capacitor portion 12 is greater than the ESR of the first capacitor portion 11 .
- the number of the third lead-out portions 21 for each of the third internal electrodes 15 and the number of the fourth lead-out portions 22 for each of the fourth internal electrodes 16 are less than the number of the first lead-out portions 17 for each of the first internal electrodes 13 and the number of the second lead-out portions 18 for each of the second internal electrodes 14 .
- the ESL of the first capacitor portion 11 is less than the ESL of the second capacitor portion 12 . Accordingly, the resonant frequency of the first capacitor portion 11 is greater than the resonant frequency of the second capacitor portion 12 .
- the ESR per layer provided by one pair of the third and fourth internal electrodes 15 and 16 and the intervening dielectric layer 9 included in the second capacitor portion 12 is greater than the ESR per layer provided by one pair of the first and second internal electrodes 13 and 14 and the intervening dielectric layer 9 included in the first capacitor portion 11 .
- the low ESL characteristics due to the first capacitor portions 11 are effectively provided, and high ESR characteristics are provided due to the ESR characteristics of the first capacitor portions 11 and the ESR characteristics of the second capacitor portion 12 .
- both low ESL and high ESR are achieved with the monolithic capacitor 1 .
- FIG. 2 shows a structure in which the monolithic capacitor 1 is mounted on a mounting surface 25 of a circuit board 24 .
- conductive lands 26 and 27 are provided, and the first and second external terminal electrodes 19 and 20 are electrically connected respectively to the conductive lands 26 and 27 , for example, by soldering (not shown).
- the monolithic capacitor 1 is mounted with the main capacitor unit 8 arranged such that one of the first capacitor portions 11 is located closer to the mounting surface 25 than the second capacitor portion 12 .
- FIG. 5 schematically shows an equivalent circuit of the monolithic capacitor 1 described above.
- elements corresponding to those shown in FIGS. 1 to 4 B are designated by the same reference signs.
- one internal electrode is indicated by one line.
- the first capacitor portion 11 two pairs of the first and second internal electrodes 13 and 14 are shown, and by showing a dotted line between the two pairs of the first and second internal electrodes 13 and 14 , it is indicated that a greater number of the first and second internal electrodes 13 and 14 may be provided.
- the second capacitor portion 12 two pairs of the third and fourth internal electrodes 15 and 16 are shown, and by showing a dotted line between the two pairs of the third and fourth internal electrodes 15 and 16 , it is indicated that a greater number of the third and fourth internal electrodes 15 and 16 may be provided.
- FIG. 5 When FIG. 5 is compared to FIG. 2 described earlier, the number of the first and second internal electrodes 13 and 14 in the first capacitor portion 11 does not coincide. It is to be understood that this is because only representative ones of the first and second internal electrodes 13 and 14 are shown in FIG. 2 .
- an ESR 29 and an ESL 30 are produced.
- FIG. 6 is a diagram which explains a preferable application of the monolithic capacitor 1 according to the present preferred embodiment. More specifically, FIG. 6 is a diagram showing the circuit configuration of an MPU in which the monolithic capacitor 1 is used as a decoupling capacitor.
- the MPU includes an MPU chip 101 and a memory 102 .
- a power source 103 supplies electric power to the MPU chip 101 .
- the monolithic capacitor 1 is connected so as to function as a decoupling capacitor. Furthermore, on the side of the memory 102 with respect to the MPU chip 101 , although not shown, a signal circuit is provided.
- the monolithic capacitor 1 used as a decoupling capacitor in the MPU described above functions as a quick power supply as well as to absorb noise or smooth variation in power supply.
- ESL should be minimized.
- the monolithic capacitor according to this preferred embodiment can be advantageously used as a decoupling capacitor.
- FIGS. 7A and 7B are diagrams for explaining a monolithic capacitor 1 a according to a second preferred embodiment of the present invention, corresponding to FIGS. 4A and 4B .
- elements corresponding to those shown in FIGS. 4A and 4B are designated by the same reference signs, and the description thereof is omitted.
- the third internal electrode 15 includes only one third lead-out portion 21
- the fourth internal electrode 16 includes one fourth lead-out portion 22 .
- the configuration is otherwise preferably the same as that in the first preferred embodiment.
- the ESR in the second capacitor portion 12 is further increased as compared to the first preferred embodiment.
- FIGS. 8A and 8B are diagrams for explaining a monolithic capacitor 1 b according to a third preferred embodiment of the present invention, corresponding to FIGS. 4A and 4B .
- elements corresponding to those shown in FIGS. 4A and 4B are designated by the same reference signs, and the description thereof is omitted.
- one of the third internal electrode 15 and the fourth internal electrode 16 has the same pattern as either the first internal electrode 13 or the second internal electrode 14 shown in FIGS. 3A and 3B . More specifically, as shown in FIG. 8B , the fourth internal electrode 16 has the same pattern as the second internal electrode 14 shown in FIG. 3B . Thus, the fourth internal electrode 16 includes seven fourth lead-out portions 22 . The configuration is otherwise substantially the same as that in the first preferred embodiment.
- one fourth internal electrode 16 includes seven fourth lead-out portions 22 .
- one third internal electrode 15 includes only two third lead-out portions 21 .
- the number of pairs of the third and fourth lead-out portions 21 and 22 is two, which is less than the number of pairs of the first and second lead-out portions 17 and 18 , i.e., seven. Therefore, the ESR of the second capacitor portion 12 is greater than the ESR of the first capacitor portion 11 .
- the third preferred embodiment satisfies the condition that at least one of the number of the third lead-out portions 21 for each of the third internal electrodes 15 and the number of the fourth lead-out portions 22 for each of the fourth internal electrodes 16 is less than the number of the first lead-out portions 17 for each of the first internal electrodes 13 and the number of the second lead-out portions 18 for each of the second internal electrodes 14 .
- the ESR per layer provided by one pair of the third and fourth internal electrodes 15 and 16 and the intervening dielectric layer 9 included in the second capacitor portion 12 is less than that in the first preferred embodiment, the ESR per layer is greater than the ESR per layer given by one pair of the first and second internal electrodes 13 and 14 and the intervening dielectric layer 9 included in the first capacitor portion 11 .
- FIGS. 9A to 9 D explain a monolithic capacitor 1 c according to a fourth preferred embodiment of the present invention.
- FIGS. 9A and 9A correspond to FIGS. 3A and 3B , respectively
- FIGS. 9C and 9C correspond to FIGS. 4A and 4B , respectively.
- elements corresponding to those shown in FIGS. 3A to 4 B are designated by the same reference signs, and the description thereof is omitted.
- third and fourth external terminal electrodes 31 and 32 are separately provided. More specifically, external terminal electrodes provided on the shorter side surfaces 5 and 7 of the main capacitor unit 8 are the third and fourth external terminal electrodes 31 and 32 instead of the first and second external terminal electrodes 19 and 20 . As shown in FIGS. 9C and 9D , the third lead-out portions 21 of the third internal electrode 15 and the fourth lead-out portions 22 of the fourth internal electrode 16 are electrically connected to the third and fourth external terminal electrodes 31 and 32 , respectively.
- the first internal electrode 13 includes only five first lead-out portions 17 , and these first lead-out portions 17 extend out only to the longer side surfaces 4 and 6 of the main capacitor unit 8 and are electrically connected to the first external terminal electrodes 19 .
- the second internal electrode 14 includes only five second lead-out portions 18 , and these second lead-out portions 18 extend out only to the longer side surfaces 4 and 6 of the main capacitor unit 8 and are electrically connected to the second external terminal electrodes 20 .
- the configuration is otherwise substantially the same as that in the first preferred embodiment.
- the resonant frequency of the first capacitor portion 11 is further reduced. Furthermore, the ESL of the first capacitor portion 11 is further increased.
- FIGS. 10A to 10 D explain a monolithic capacitor 1 d according to a fifth preferred embodiment of the present invention.
- FIGS. 10A and 10B correspond to FIGS. 3A and 3B , respectively
- FIGS. 10C and 10D correspond to FIGS. 4A and 4B , respectively.
- elements corresponding to those shown in FIGS. 3A to 4 B are designated by the same reference signs, and the description thereof is omitted.
- no external terminal electrodes are provided on the shorter side surfaces 5 and 7 of the main capacitor unit 8 . That is, the first and second external terminal electrodes 19 and 20 are provided on only the longer side surfaces 4 and 6 of the main capacitor unit 8 .
- the third internal electrode 15 includes one third lead-out portion 21 , and the third lead-out portion 21 is electrically connected to one of the first external terminal electrodes 19 .
- the fourth internal electrode 16 includes one fourth lead-out portion 22 , and the fourth lead-out portion 22 is electrically connected to one of the second external terminal electrodes 20 .
- the configuration is otherwise substantially the same as that in the first preferred embodiment.
- the fifth preferred embodiment has the significance of clarifying that the present invention is applicable to the monolithic capacitor 1 d , in which external terminal electrodes are not provided on the shorter side surfaces 5 and 7 of the main capacitor unit 8 .
- FIGS. 11A and 11B are diagrams for explaining a monolithic capacitor 1 e according to a sixth preferred embodiment of the present invention, corresponding to FIGS. 3A and 3B .
- elements corresponding to those shown in FIGS. 3A and 3B are designated by the same reference signs, and the description thereof is omitted.
- dummy lead-out portions 38 are provided on a dielectric layer 9 in which the first internal electrode 13 is provided. Furthermore, as shown in FIG. 11B , dummy lead-out portions 39 are provided on a dielectric layer 9 in which the second internal electrode 14 is provided.
- the dummy lead-out portions 38 and 39 are located in the periphery of the dielectric layers 9 .
- the dummy lead-out portions 38 are located between a plurality of the first lead-out portions 17 and are electrically connected to the second external terminal electrodes 20 .
- the dummy lead-out portions 39 are located between a plurality of the second lead-out portions 18 and are electrically connected to the first external terminal electrodes 19 .
- FIGS. 12A and 12B are diagrams for explaining a monolithic capacitor 1 f according to a seventh preferred embodiment of the present invention, corresponding to FIGS. 4A and 4B .
- elements corresponding to those shown in FIGS. 4A and 4B are designated by the same reference signs, and the description thereof is omitted.
- dummy lead-out portions 40 are provided on a dielectric layer 9 in which the third internal electrode 15 is provided. Furthermore, as shown in FIG. 12B , dummy lead-out portions 41 are provided on a dielectric layer 9 in which the fourth internal electrode 16 is provided.
- the dummy lead-out portions 40 and 41 are located along the shorter sides of the dielectric layers 9 .
- the dummy lead-out portions 40 are electrically connected to the second external terminal electrodes 20 provided on the shorter side surfaces 5 and 7 of the main capacitor unit 8 .
- the dummy lead-out portions 41 are electrically connected to the first external terminal electrodes 19 provided on the shorter side surface 5 and 7 of the main capacitor unit 8 .
- the dummy lead-out portions 40 and 41 described above exhibit substantially the same operation and advantages as the dummy lead-out portions 38 and 39 described earlier and shown in FIGS. 11A and 11B .
- dummy lead-out portions may further be provided along the longer sides of the dielectric layers 9 . Also in this case, the dummy lead-out portions are electrically connected individually to the first and second external terminal electrodes 19 and 20 provided on the longer side surfaces 4 and 6 of the main capacitor unit 8 .
- FIG. 13 is a diagram for explaining a monolithic capacitor 1 g according to an eighth preferred embodiment of the present invention.
- FIG. 13 many elements that are similar to those shown in FIGS. 3A and 3B or FIGS. 4A and 4B are shown.
- elements corresponding to those shown in FIGS. 3A and 3B or FIGS. 4A and 4B are designated by the same reference signs, and the description thereof is omitted.
- FIG. 13 shows a dielectric layer 9 in which no internal electrode is provided among the dielectric layers 9 included in the main capacitor unit 8 .
- Such a dielectric layer 9 in which no internal electrode is provided is located at an end of the main capacitor unit 8 in the direction of lamination or at a boundary of the first capacitor portion 11 and the second capacitor portion 12 .
- a plurality of dummy lead-out portions 42 are provided along the periphery of the dielectric layer 9 in which no internal electrode is provided.
- the dummy lead-out portions 42 are electrically connected to the external terminal electrodes 19 or 20 .
- the dimensions of the dummy lead-out portions 42 are substantially the same as the dummy lead-out portions 38 to 41 described earlier, and are preferably arranged so as not to overlap the main portions of the internal electrodes 13 to 16 .
- the dummy lead-out portions 42 also provide substantially the same operation and advantages as the dummy lead-out portions 38 to 41 described earlier.
- the sixth to eighth preferred embodiments including dummy lead-out portions, described above, may be used individually. However, preferably, two or more of the preferred embodiments are used in combination, and most preferably, the three preferred embodiments are implemented in combination.
- FIGS. 14A to 14 C are diagrams for explaining a monolithic capacitor 1 h according to a ninth preferred embodiment of the present invention, corresponding to FIGS. 3A and 3B .
- elements corresponding to those shown in FIGS. 3A and 3B are designated by the same reference signs, and the description thereof is omitted.
- FIGS. 14A and 14B show the first and second internal electrodes 13 and 14 shown in FIGS. 3A and 3B , respectively.
- FIG. 14C shows a dummy internal electrode 45 .
- the dummy internal electrode 45 has the same pattern as the second internal electrode 14 shown in FIG. 14B . That is, the dummy internal electrode 45 includes lead-out portions 46 extended out to the side surfaces 4 to 7 of the main capacitor unit 8 , and the lead-out portions 46 are electrically connected to the second external terminal electrodes 20 .
- the first internal electrode 13 shown in FIG. 14A and the second internal electrode shown in FIG. 14B are laminated so as to oppose each other.
- at least one dummy internal electrode 45 is laminated adjacent to the second internal electrode 14 at an end and/or in the middle in the direction of lamination.
- this preferred embodiment is advantageous in a case where a large capacitance is not needed but the bonding strength of the external terminal electrodes 20 is ensured while allowing lamination of a certain number of dielectric layers 9 .
- a dummy internal electrode having the same pattern as the first internal electrode 13 may be provided.
- FIGS. 15A to 15 C are diagrams for explaining a monolithic capacitor 1 i according to a tenth preferred embodiment of the present invention.
- elements corresponding to those shown in FIGS. 4A and 4B are designated by the same reference signs, and the description thereof is omitted.
- FIGS. 15A and 15B show the third and fourth internal electrodes 15 and 16 shown in FIGS. 4A and 4B , respectively.
- FIG. 15C shows a dummy internal electrode 49 .
- the dummy internal electrode 49 has the same pattern as the fourth internal electrode 16 shown in FIG. 15B . That is, the dummy internal electrode 49 has lead-out portions 50 extended out to the shorter side surfaces 5 and 7 of the main capacitor unit 8 , and the lead-out portions 50 are electrically connected to the second external terminal electrodes 20 .
- the third internal electrode 15 shown in FIG. 15A and the fourth internal electrode 16 shown in FIG. 15B are laminated so as to oppose each other to define the second capacitor portion 12 (refer to FIG. 2 )
- at least one dummy internal electrode 49 is laminated adjacent to the fourth internal electrode 16 in the monolithic structure at an end and/or in the middle in the direction of lamination.
- the dummy internal electrode 49 described above produces substantially the same operation and advantages as the dummy internal electrode 45 shown in FIG. 14C .
- a dummy internal electrode having the same pattern as the third internal electrode 15 may be provided.
- FIGS. 16A to 16 C are diagrams for explaining a monolithic capacitor 1 j according to an eleventh preferred embodiment of the present invention, corresponding to FIGS. 3A and 3B .
- elements corresponding to those shown in FIGS. 3A and 3B are designated by the same reference signs, and the description thereof is omitted.
- FIGS. 16A and 16B show the first and second internal electrodes 13 and 14 shown in FIGS. 3A and 3B , respectively.
- FIG. 16C shows a dummy internal electrode 53 .
- the dummy internal electrode 53 preferably has the same pattern as the fourth internal electrode shown in FIG. 4B . That is, the dummy internal electrode 53 includes lead-out portions 54 extended out to the shorter side surfaces 5 and 7 of the main capacitor unit 8 , and the lead-out portions 54 are electrically connected to the second external terminal electrodes 20 .
- At least one dummy internal electrode 53 is laminated adjacent to the second internal electrode 14 in the monolithic structure at an end and/or in the middle in the direction of lamination.
- the dummy internal electrode 53 described above produces substantially the same operation and advantages as the dummy internal electrodes 45 and 49 shown in FIGS. 14A to 15 C, respectively.
- a dummy internal electrode having the same pattern as the third internal electrode 15 shown in FIG. 4A may be provided.
- FIGS. 17A to 17 C are diagrams for explaining a monolithic capacitor 1 k according to a twelfth preferred embodiment of the present invention, corresponding to FIGS. 4A and 4B .
- elements corresponding to those shown in FIGS. 4A and 4B are designated by the same reference signs, and the description thereof is omitted.
- FIGS. 17A and 17B show the third and fourth internal electrodes 15 and 16 shown in FIGS. 4A and 4B , respectively.
- FIG. 17C shows a dummy internal electrode 57 .
- the dummy internal electrode 57 preferably has the same pattern as the second internal electrode 14 shown in FIG. 3B . That is, the dummy internal electrode 57 includes lead-out portions 58 extended out to the side surfaces 4 to 7 of the main capacitor unit 8 , and the lead-out portions 58 are electrically connected to the second external terminal electrodes 20 .
- At least one dummy internal electrode 57 is laminated adjacent to the fourth internal electrode 16 in the monolithic structure at an end and/or in the middle in the direction of lamination.
- the dummy internal electrode 57 described above produces substantially the same operation and advantages as the dummy internal electrodes 45 , 49 , and 53 shown in FIGS. 14A to 16 C, respectively.
- a dummy internal electrode preferably having substantially the same pattern as the first internal electrode 13 shown in FIG. 3B may be provided.
- the ninth to twelfth preferred embodiments described above can be used in combination as appropriate. More specifically, since the ninth and eleventh preferred embodiments relate to the first capacitor portion 11 and the tenth and twelfth preferred embodiments relate to the second capacitor portion 12 , each of the ninth and eleventh preferred embodiments can be used in arbitrary combination with each of the tenth and twelfth preferred embodiments.
- FIGS. 18 to 21 B show a monolithic capacitor 61 according to a thirteenth preferred embodiment of the present invention.
- FIG. 18 shows a perspective view showing the appearance of the monolithic capacitor 61
- FIG. 19 shows a side view illustrating how first and second capacitor portions 62 and 63 are arranged in the monolithic capacitor 61
- a mounting surface 64 is shown. When mounted, the monolithic capacitor 61 has a direction of lamination that is parallel to the mounting surface 64 .
- the monolithic capacitor 61 includes a substantially rectangular main capacitor unit 71 having two opposing principal surfaces 65 and 66 and four side surfaces 67 , 68 , 69 , and 70 connecting the principal surfaces 65 and 66 .
- the main capacitor unit 71 has a monolithic structure including a lamination of a plurality of dielectric layers 72 (refer to FIGS. 20A, 20B , 21 A, and 21 B) substantially parallel to the principal surfaces 65 and 66 , and composed of, for example, a dielectric ceramic material.
- the capacitor main unit 71 includes first capacitor portions 62 and a second capacitor portion 63 .
- the first capacitor portions 62 and the second capacitor portion 63 are arrayed in the direction of lamination, which is substantially parallel to the mounting surface 64 , with the second capacitor portion 63 sandwiched by the two first capacitor portions 62 .
- the first capacitor portions 62 are located at end portions of the capacitor main unit 71 .
- FIGS. 20A and 20B are plan views of the dielectric layers 72 , showing the internal structure of the first capacitor portion 62 , in which FIG. 20A shows a cross-section of a first internal electrode 73 and FIG. 20B shows a cross-section of a second internal electrode 74 .
- FIGS. 21A and 21B are plan views of the dielectric layers 72 , showing the internal structure of the second capacitor portion 63 , in which FIG. 21A shows a cross-section of a third internal electrode 75 and FIG. 21B shows a cross-section of a fourth internal electrode 76 .
- the first capacitor portion 62 at least one pair of the first and second internal electrodes 73 and 74 oppose each other via a predetermined dielectric layer 72 so as to define a capacitor. Furthermore, as shown in FIGS. 21A and 21B , in the second capacitor portion 63 , at least one pair of the third and fourth internal electrodes 75 and 76 oppose each other via a predetermined dielectric layer 72 so as to define a capacitor.
- the first internal electrode 73 includes two first lead-out portions 77 extended out respectively to the two opposing side surfaces 67 and 69 of the main capacitor unit 71 .
- the second internal electrode 74 includes two second lead-out portions 78 extended out respectively to the opposing side surfaces 67 and 69 of the main capacitor unit 71 .
- first external terminal electrodes 79 electrically connected individually to the first lead-out portions 77 and two second external terminal electrodes 80 electrically connected individually to the second lead-out portions 78 are provided.
- the first and second external terminal electrodes 79 and 80 extend from the side surfaces 67 and 69 onto portions of the principal surfaces 65 and 66 . Furthermore, the first external terminal electrodes 79 and the second external terminal electrodes 80 are alternately arranged on the side surfaces 67 and 69 .
- the third internal electrode 75 includes third lead-out portions 81 extended out to the opposing side surfaces 67 and 69 of the main capacitor unit 71 , one for each of the side surfaces 67 and 69 .
- the fourth internal electrode 76 includes fourth lead-out portions 82 extended out from the opposing side surfaces 67 and 69 of the main capacitor unit 71 , one for each of the side surfaces 67 and 69 .
- the third lead-out portions 81 are electrically connected to the first external terminal electrodes 79 described earlier, and the fourth lead-out portions 82 are electrically connected to the second external terminal electrodes 80 described earlier.
- the number of pairs of the third and fourth lead-out portions 81 and 82 for one pair of the third and fourth internal electrodes 75 and 76 is less than the number of pairs of the first and second lead-out portions 77 and 78 for one pair of the first and second internal electrodes 73 and 74 . More specifically, two pairs of the third and fourth lead-out portions 81 and 82 are provided for one pair of the third and fourth internal electrodes 75 and 76 , and four pairs of the first and second lead-out portions 77 and 78 are provided for one pair of the first and second internal electrodes 73 and 74 .
- the number of the third lead-out portions 81 for each of the third internal electrodes 75 and the number of the fourth lead-out portions 82 for each of the fourth internal electrodes 76 are less than the number of the first lead-out portions 77 for each of the first internal electrodes 73 and the number of the second lead-out portions 78 for each of the second internal electrodes 74 .
- the ESL of the first capacitor portion 62 is less than the ESL of the second capacitor portion 63 .
- the ESR of the second capacitor portion 63 is greater than the ESR of the first capacitor portion 62 .
- the number of the third lead-out portions 81 for each of the third internal electrodes 75 and the number of the fourth lead-out portions 82 for each of the fourth internal electrodes 76 are less than the number of the first lead-out portions 77 for each of the first internal electrodes 73 and the number of the second lead-out portions 78 for each of the second internal electrodes 74 .
- the ESL of the first capacitor portion 62 is less than the ESL of the second capacitor portion 63 .
- the resonant frequency of the first capacitor portion 62 is greater than the resonant frequency of the second capacitor portion 63 .
- the ESR per layer provided by one pair of the third and fourth internal electrodes 75 and 76 and the intervening dielectric layer 72 included in the second capacitor portion 63 is greater than the ESR per layer provided by one pair of the first and second internal electrodes 73 and 74 and the intervening dielectric layer 72 included in the first capacitor portion 62 .
- the monolithic capacitor 61 produces characteristics in which low ESL characteristics due to the first capacitor portions 62 and high ESR characteristics due to the second capacitor portion 63 are combined. Thus, both low ESL and high ESR are achieved with the monolithic capacitor 61 .
- FIGS. 22 and 23 are diagrams for explaining monolithic capacitors 61 a and 61 b according to fourteenth and fifteenth preferred embodiments of the present invention, corresponding to FIG. 19 .
- elements corresponding to those shown in FIG. 19 are designated by the same reference signs, and repeated description thereof is omitted.
- the dielectric layers 72 and the internal electrodes 73 to 76 is substantially perpendicular to the mounting surface 64 , so that, in contrast to the monolithic capacitor 1 according to the first preferred embodiment, it is not necessary to consider the effects of the distance between the mounting surface 64 and the internal electrodes on ESLs.
- the first and second capacitor portions 62 and 63 may be arranged as shown in FIG. 22 or FIG. 23 instead of as shown in FIG. 19 without causing problems.
- the locations or the number of lead-out portions provided on internal electrodes or the locations or the number of external terminal electrodes may be changed.
- first and second capacitor portions in the main capacitor unit may be arranged in various manners other than those in the preferred embodiments shown in the drawings, as will be understood from experiments described later.
- an internal electrode located at a boundary between the first and second capacitor portions may be provided as an internal electrode for both the first and second capacitor portions, i.e., as an internal electrode that functions commonly as the first or second internal electrode and the third or fourth internal electrode.
- the number of the first lead-out portions 17 and the number of the second lead-out portions 18 are preferably selected to be greater than the number of the third lead-out portions 21 and the number of the fourth lead-out portions 22 (or the number of pairs thereof) so that the resonant frequency of the first capacitor portion 11 is greater than the resonant frequency of the second capacitor portion 12
- the materials or patterns of the internal electrodes 13 to 16 and/or the number of laminated layers may be changed.
- the number of the third lead-out portions 21 and the number of the fourth lead-out portions 22 are preferably selected to be less than the number of the first lead-out portions 17 and the number of the second lead-out portions 18 so that the ESR per layer in the second capacitor portion 12 is greater than the ESR per layer in the first capacitor portion 11
- a material having a greater resistivity may be selected for the third internal electrodes 15 and/or the fourth internal electrodes 16 , the thickness of the third internal electrodes 15 and/or the fourth internal electrodes may be decreased, or the width or thickness of the third lead-out portions 21 and/or the fourth lead-out portions 22 may decreased.
- the dimensions of the main capacitor unit were 2.0 mm ⁇ 1.25 mm ⁇ 0.5 mm, the total number of laminated layers of internal electrodes was 64, the capacitance was 0.68 ⁇ F, and as the preferred embodiment shown in FIG. 1 and other figures, the number of external terminal electrodes was 14. Furthermore, the thickness of the internal electrodes was 1 ⁇ m, the thickness of lead-out portions was 1 ⁇ m, and the width of the lead-out portions was 150 ⁇ m.
- FIGS. 24A to 24 E show how the first and second capacitor portions are arranged in the direction of lamination.
- parts designated by reference signs “ 35 ” indicate external layers on which no internal electrodes are provided.
- bottom surfaces of lamination structures that are shown face the mounting surface.
- FIG. 25 cited in the field of “Internal electrode pattern” in the “First capacitor portion” of sample 11
- FIG. 26 cited in the field of “Internal electrode pattern” in the “Second capacitor portion” of sample 11
- FIG. 27 cited in the field of “Internal electrode pattern” in the “First capacitor portion” of sample 12
- FIG. 28 cited in the field of “Internal electrode pattern” in the “Second capacitor portion” of sample 12
- FIG. 29 cited in the field of “Internal electrode pattern” in the “Second capacitor portion” of sample 13 indicate that internal electrode patterns shown in FIGS. 25, 26 , 27 , 28 , and 29 are used, respectively.
- FIG. 25A shows a first internal electrode 13 having seven first lead-out portions 17
- FIG. 25B shows a second internal electrode 14 having two second lead-out portions 18 .
- FIG. 26A shows a third internal electrode 15 having two third lead-out portions 21
- FIG. 26B shows a fourth internal electrode 16 having seven fourth lead-out portions 22 .
- FIG. 27 shows a first internal electrode 13 having two first lead-out portions 17 and a second internal electrode 14 having two second lead-out portions 18 .
- ( 1 ) to ( 14 ) represent the orders of lamination.
- FIG. 28 shows a third internal electrode 15 having one third lead-out portion 21 and a fourth internal electrode 16 having one fourth lead-out portion 22 .
- ( 1 ) to ( 14 ) represent the orders of lamination.
- FIG. 29 shows a third internal electrode 15 having one third lead-out portion 21 and a fourth internal electrode 16 having one fourth lead-out portion 22 , and external terminal electrodes 31 and 32 electrically connected to the third and fourth lead-out portions 21 and 22 , respectively.
- ( 1 ) to ( 14 ) represent the orders of lamination.
- “Number of laminated layers” represents a total number of laminated layers of the first and second internal electrodes in “First capacitor portion”, and represents a total number of laminated layers of the third and fourth internal electrodes in “Second capacitor portion”.
- the indication of “Upper” and “Lower” in the section of “Number of laminated layers” in “First capacitor portion” correspond to “first capacitor portion (upper)” and “first capacitor portion (lower) in FIG. 24 ( b ), respectively.
- “Number of first lead-out portions”, “Number of second lead-out portions”, and “Number of pairs of lead-out portions” in “First capacitor portion” represent the number of lead-out portions for one first internal electrode, the number of lead-out portions for one second internal electrode, and the number of pairs of the first and second lead-out portions for one pair of the first and second internal electrodes.
- “Number of third lead-out portion”, “Number of fourth lead-out portion”, and “Number of pair of lead-out portions” in “Second capacitor portion” represent the number of lead-out portion for one third internal electrode, the number of lead-out portion for one fourth internal electrode, and the number of pair of the third and fourth lead-out portions for one pair of the first and second internal electrodes.
- Table 2 shows “ESL value” and “ESR value” obtained from each of samples 1 to 13 designed as shown in Table 1.
- ESL value ESR value *1 35 pH 6.8 m ⁇ 2 35 pH 12.3 m ⁇ 3 36 pH 30.1 m ⁇ 4 36 pH 31.1 m ⁇ 5 37 pH 32.3 m ⁇ 6 36 pH 14.7 m ⁇ 7 38 pH 18.7 m ⁇ 8 37 pH 28.1 m ⁇ 9 36 pH 37.2 m ⁇ 10 45 pH 38.1 m ⁇ *11 46 pH 13.3 m ⁇ 12 46 pH 29.1 m ⁇ *13 48 pH 34.4 m ⁇
- sample 1 as a comparative example, as shown in Table 1, the second capacitor portion, which contributes to increasing ESR, is not provided.
- Table 2 although ESL is decreased, it is not possible to increase ESR.
- sample 9 as a comparative example contrasted with sample 1 , as shown in Table 1, the first capacitor portion, which contributes to decreasing ESL, is not provided.
- Table 2 although ESR is increased, it is not possible to decrease ESL.
- the ESL value is substantially the same as that of sample 12 since the number of pairs of lead-out portions in the first capacitor portion and the number of pairs of lead-out portions in the second capacitor portions are two. This is because, although the number of the first lead-out portions is seven, the number of pairs is only two.
- ESR since the number of internal electrodes in the first capacitor portions and the second capacitor portion are increased, the ESR per layer is considerably less than that of sample 13 . Furthermore, by lamination of layers, ESRs are connected in parallel, so that the ESR is further decreased.
- both the first and second capacitor portions are provided, and “Number of pair of lead-out portions” in “Second capacitor portion” is less than “Number of pairs of lead-out portions” in “First capacitor portion”.
- ESL is decreased and ESR is increased at the same time.
- the ESL value is substantially the same as that in sample 1 . This is because, at high frequencies, electric fields concentrate on the side of the mounting surface, and the characteristics regarding the loop indicated by the broken arrow 28 in FIG. 2 are most strongly affected, so that the low ESL value of the first capacitor portion becomes dominant in samples 2 to 9 , in which the first capacitor portion having a greater number of lead-out portions is laminated and arranged on the side of the mounting surface.
- the ESL value is greater as compared to samples 2 to 9 . Even in the configuration of sample 10 , the ESL value is less compared to sample 13 due to the presence of the first capacitor portion.
- samples 2 to 5 in which the number of laminated layers in the first capacitor portion is varied in the same manner of lamination and arrangement, the ESL values are substantially the same. Thus, it is understood that the effect of the number of laminated layers in the first capacitor portion on the ESL value is small. This also applies to samples 6 to 9 having a manner of lamination and arrangement different from that in samples 2 to 5 .
- the ESR value increases as the number of laminated layers in the second capacitor portion increases relative to the total number of laminated layers in the entire monolithic capacitor. Furthermore, from comparison among samples 5 , 9 , 10 , and 12 in which the number of laminated layers in the second capacitor portion is the same, the ESR value is higher in samples 9 , 10 , and 12 , in which the number of the third lead-out portions and the number of the fourth-lead out portions are one, as compared to sample 5 , in which the number of the third lead-out portions and the number of the fourth lead-out portions are two. Furthermore, in samples 9 and 10 , the ESR value is higher compared to sample 13 .
- the ESR values are substantially the same.
- the ESR value has a tendency to remain substantially the same when the number of laminated layers in the second capacitor portion is the same even if the manner of lamination and arrangement differs.
- the dimensions of the main capacitor unit were 2.0 mm ⁇ 1.25 mm ⁇ 0.5 mm, the total number of laminated layers of internal electrodes was 64, the capacitance was 0.68 ⁇ F, and similarly to the embodiment shown in FIG. 1 and other figures, the number of external terminal electrodes was 14. Furthermore, the thickness of the internal electrodes was 1 ⁇ m, the thickness of lead-out portions was 1 ⁇ m, and the width of the lead-out portions was 100 ⁇ m.
- “Number of laminated layers” represents the total Number of laminated layers of the first and second internal electrodes in “First capacitor portion”, and represents a total Number of laminated layers of the third and fourth internal electrodes in “Second capacitor portion”.
- the indication of “Upper” and “Lower” in the section of “Number of lamination” in “First capacitor portion” correspond to “first capacitor portion (upper)” and “first capacitor portion (lower) in FIG. 24B , respectively.
- each of “Number of first lead-out portions”, “Number of second lead-out portions”, “Number of third lead-out portions”, and “Number of fourth lead-out portions” represents the number of lead-out portions for each relevant internal electrode.
- Table 4 shows “ESL value” and “ESR value” obtained from each of samples 21 to 29 designed as shown in FIG. 3 .
- the ESL value is substantially the same as that in sample 21 . This is because, at high frequencies, electric fields concentrate on the side of the mounting surface, and the characteristics regarding the loop indicated by the broken arrow 28 in FIG. 2 are affected most strongly, so that the low ESL value of the first capacitor portion becomes dominant in samples 22 to 27 , in which the first capacitor portion having a greater number of lead-out portions is laminated and arranged on the side of the mounting surface.
- the ESL value is higher as compared to samples 22 to 27 . Even in the configuration of sample 28 , the ESL value is lower compared to sample 29 due to the presence of the first capacitor portion.
- the ESR value increases as the number of laminated layers in the second capacitor portion increases relative to the total number of laminated layers in the entire monolithic capacitor. Furthermore, from comparison among samples 25 , 27 , and 28 in which the number of laminated layers in the second capacitor portion is the same, the ESR value is higher in samples 27 and 28 , in which the number of the third lead-out portions and the number of the fourth-lead out portions are one, compared to sample 25 , in which the number of the third lead-out portions and the number of the fourth lead-out portions are two. Furthermore, in samples 27 and 28 , the ESR value is higher compared to sample 29 .
- the ESR values are substantially the same.
- the ESR value has a tendency of remaining substantially the same when the number of laminated layers in the second capacitor portion is the same, even if the manner of lamination and arrangement differs.
- the resonant frequency tends to decrease as the number of laminated layers in the first and second capacitor portions increases. Furthermore, as will be understood from the resonant frequency of the first capacitor portions in samples 25 , 27 , and 28 , the resonant frequency remains substantially the same when the number of laminated layers is the same, even if the manner of lamination and arrangement differs.
- the resonant frequency of the first capacitor portion is selected to be greater than the resonant frequency of the second capacitor portion.
- the total number of laminated layers is 40 and the resonant frequency is approximately 38 MHz in the first capacitor portion, and the number of laminated layers is 24 and the resonant frequency is approximately 26 MHz in the second capacitor portion.
- the resonant frequency is less than in the first capacitor portion. This is due to the difference in the number of lead-out portions.
- the resonant frequency of the first capacitor portion is preferably chosen to be greater than the resonant frequency of the second capacitor portion.
- FIG. 30 shows frequency-impedance characteristics of sample 25 as a preferred embodiment and samples 21 and 29 as comparative examples, shown in Tables 3 and 4.
- the ESR value decreases as the ESL value decreases, so that the impedance characteristics are steep.
Abstract
A monolithic capacitor includes a main capacitor unit having first capacitor portions and a second capacitor portion arranged in a direction of lamination, with the first capacitor portion located towards at least one end in the direction of lamination, so that the first capacitor portion is located closer to a mounting surface than the second capacitor portion. The number of pairs of third and fourth lead-out portions for third and fourth internal electrodes in the second capacitor portion is less than the number of pairs of first and second lead-out portions for first and second internal electrodes in the first capacitor portion, so that the first capacitor portion contributes to decreasing ESL while the second capacitor portion contributes to increasing ESR.
Description
- This application is a Divisional Application of U.S. patent application Ser. No. 11/616,550 filed Dec. 27, 2006, currently pending.
- 1. Field of the Invention
- The present invention relates to monolithic capacitors and mounting structures of the monolithic capacitors. More specifically, the present invention relates to a monolithic capacitor that is used in a high-frequency circuit and to a mounting structure of the monolithic capacitor.
- 2. Description of the Related Art
- As a decoupling capacitor that is used in a power supply circuit for an MPU (Micro Processing Unit) in a high frequency range on the order of several GHz, for example, a monolithic capacitor having a structure described in Japanese Unexamined Patent Application Publication No. 11-144996 (Patent Document 1) is known. In the monolithic capacitor, a plurality of terminals is provided such that adjacent terminals have opposite polarities. Thus, the length of paths of currents from positive terminals to negative terminals is relatively short, and currents flow in various ways. Furthermore, currents are caused to flow in opposite directions so that magnetic fluxes are canceled, thereby decreasing ESL (Equivalent Series Inductance).
- However, in the monolithic capacitor described in
Patent Document 1, ESR (Equivalent Series Resistance) also decreases as ESL decreases. Therefore, the problem of steep impedance characteristics arises. - As another example, according to Japanese Unexamined Patent Application Publication No. 2001-284170 (Patent Document 2), for each internal electrode that is provided in a main capacitor unit to define a capacitor, only one lead-out portion extends out to the outer surface of the main capacitor unit and is electrically connected to an external terminal electrode, thereby increasing ESR of the monolithic capacitor.
- According to the structure described in
Patent Document 2, however, although ESR is increased, ESL is also increased. This causes the problem of degradation of high-frequency characteristics. - To overcome the problems described above, preferred embodiments of the present invention provide a monolithic capacitor in which ESL is decreased and ESR is increased at the same time, and a mounting structure of the monolithic capacitor which enables the low ESL characteristics of the monolithic capacitor in which ESL is decreased to be sufficiently exhibited.
- A monolithic capacitor according to a preferred embodiment of the present invention includes a main capacitor unit having a monolithic structure including a lamination of a plurality of dielectric layers. According to the present invention, in order to solve the technical problems described above, the monolithic capacitor is configured as described below.
- The main capacitor unit included in the monolithic capacitor includes first and second capacitor portions.
- The first capacitor portion includes at least one pair of first and second internal electrodes opposing each other via a predetermined one of the dielectric layers so as to define a capacitance. The first internal electrode includes a plurality of first lead-out portions extending out to an outer surface of the main capacitor unit, and the second internal electrode includes a plurality of second lead-out portions extending out to the outer surface of the main capacitor unit.
- The second capacitor portion includes at least one pair of third and fourth internal electrodes opposing each other via a predetermined one of the dielectric layers so as to define a capacitance, the third internal electrode includes at least one third lead-out portion extending out to the outer surface of the main capacitor unit, and the fourth internal electrode includes at least one fourth lead-out portion extending out to the outer surface of the main capacitor unit.
- On the outer surface of the main capacitor unit, first, second, third, and fourth external terminal electrodes electrically connected individually to the first, second, third, and fourth lead-out portions are provided.
- According to a first preferred embodiment of the present invention, the number of pairs of the third and fourth lead-out portions for one pair of the third and fourth internal electrodes is less than the number of pairs of the first and second lead-out portions for one pair of the first and second internal electrodes.
- In a monolithic capacitor according to the first preferred embodiment of the present invention, at least one of the number of third lead-out portions for the third internal electrode and the number of fourth lead-out portions for the fourth internal electrode is less than the number of the first lead-out portions for the first internal electrode and the number of the second lead-out portions for the second internal electrode.
- In this case, either the third internal electrode or the fourth internal electrode may have the same pattern as either the first internal electrode or the second internal electrode.
- In the monolithic capacitor according to the first preferred embodiment of the present invention, preferably, the number of third lead-out portions for the third internal electrode and the number of fourth lead-out portions for the fourth internal electrode are less than the number of first lead-out portions for the first internal electrode and the number of second lead-out portions for the second internal electrode.
- According to a second preferred embodiment of the present invention, a resonant frequency of the first capacitor portion is greater than a resonant frequency of the second capacitor portion, and an equivalent series resistance per layer provided by one pair of the third and fourth internal electrodes and an intervening one of the dielectric layers included in the second capacitor portion is greater than an equivalent series resistance per layer provided by one pair of the first and second internal electrodes and an intervening one of the dielectric layers included in the first capacitor portion.
- In the monolithic capacitor according to the second preferred embodiment of the present invention, either the third internal electrode or the fourth internal electrode may have the same pattern as the first internal electrode or the second internal electrode.
- At least one of the first and second external terminal electrodes may define at least one of the third and fourth external terminal electrodes.
- Preferably, the first and second external terminal electrodes are arranged alternately.
- In the main capacitor unit, preferably, the first capacitor portion and the second capacitor portion are arrayed in a direction of lamination, and the first capacitor portion is located on at least one end in the direction of lamination. In this case, more preferably, in the main capacitor unit, the second capacitor portion is sandwiched by two first capacitor portions in the direction of lamination.
- Preferred embodiments of the present invention are also directed to a mounting structure of a monolithic capacitor, wherein a monolithic capacitor according to a preferred embodiment described above is mounted on a predetermined mounting surface. In the mounting structure of a monolithic capacitor according to preferred embodiments of the present invention, the monolithic capacitor is mounted with the main capacitor unit arranged so that the first capacitor portion is located closer to the mounting surface.
- In the monolithic capacitor according to the first preferred embodiment of the present invention, the main capacitor unit is divided into the first and second capacitor portions, and the number of pairs of the third and fourth lead-out portions for one pair of the third and fourth internal electrodes in the first capacitor portion is less than the number of pairs of the first and second lead-out portions for one pair of the first and second internal electrodes in the second capacitor portion. Thus, ESL is further decreased in the first capacitor portion, so that it is possible to make the resonant frequency of the first capacitor portion greater than the resonant frequency of the second capacitor portion. Accordingly, the first capacitor portion affects frequency characteristics in a higher frequency range in the combined characteristics of the main capacitor unit. Therefore, the ESL characteristics of the first capacitor portion are reflected, so that the ESL of the main capacitor unit is decreased.
- Furthermore, since the main capacitor unit is divided into the first and second capacitor portions and the resonant frequency of the first capacitor portion differs from the resonant frequency of the second capacitor portion, the ESR of the main capacitor unit is determined according to the combined characteristics of the ESR of the first capacitor portion and the ESR of the second capacitor portion. Since the number of pairs of the third and fourth lead-out portions for one pair of the third and fourth internal electrodes in the first capacitor portion is less than the number of pairs of the first and second lead-out portions for one pair of the first and second internal electrodes in the second capacitor portion as described above, ESR is further increased in the second capacitor portion. Thus, the second capacitor portion causes an increase in the ESR of the main capacitor unit.
- Accordingly, a monolithic capacitor that satisfies both low ESL and high ESR is obtained.
- In the monolithic capacitor according to the first preferred embodiment of the present invention, in order to make the number of pairs of the third and fourth lead-out portions less than the number of pairs of the first and second lead-out portions as described above, by making the number of third lead-out portions for the third internal electrode and the number of fourth lead-out portions for the fourth internal electrode less than the number of first lead-out portions for the first internal electrode and the number of fourth lead-out portions for the second internal electrodes, the decrease in ESL due to the first capacitor portion and the increase in ESR due to the second capacitor portion are reliably achieved.
- In the monolithic capacitor according to the second preferred embodiment of the present invention, the main capacitor unit is divided into the first and second capacitor portions, and the resonant frequency of the first capacitor portion is greater than the resonant frequency of the second capacitor portion. Accordingly, the first capacitor portion affects frequency characteristics in a higher frequency range in the combined characteristics of the main capacitor unit. Therefore, the ESL characteristics of the first capacitor portion are reflected, so that the ESL of the main capacitor unit is decreased.
- Furthermore, since the main capacitor unit is divided into the first and second capacitor portions and the resonant frequency of the first capacitor portion differs from the resonant frequency of the second capacitor portion, the ESR of the main capacitor unit is determined by the combined characteristics of the ESR of the first capacitor portion and the ESR of the second capacitor portion. This causes an increase in the ESR.
- Accordingly, a monolithic capacitor that achieves both a low ESL and a high ESR.
- In the monolithic capacitor according to preferred embodiments of the present invention, when the first and second external terminal electrodes are arranged alternately, paths of currents from positive terminals to negative terminals are shortened, and magnetic fluxes are canceled more effectively. Thus, the ESL in the first capacitor portion is further decreased.
- In the main capacitor unit, when the first capacitor portion and the second capacitor portion are arrayed in a direction of lamination, and the first capacitor portion is located on at least one end in the direction of lamination, and the monolithic capacitor is mounted with the main capacitor unit arranged so that the first capacitor portion is located closer to the mounting surface, paths of currents that flow from positive external terminal electrodes to negative external terminal electrodes through internal electrodes are further shortened. Thus, ESL is decreased in the mounting structure. Accordingly, the low ESL characteristics of the monolithic capacitor in which ESL is decreased are sufficiently produced.
- When the second capacitor portion is sandwiched by the two first capacitor portions in the direction of lamination in the main capacitor unit, when obtaining a mounting structure in which ESL is decreased as described above, the distinction between the upper side and the lower side of the main capacitor unit is irrelevant.
- Other features, elements, steps, characteristics and advantages of the present invention will become more apparent from the following detailed description of preferred embodiments of the present invention with reference to the attached drawings.
-
FIG. 1 is a perspective view showing the appearance of a monolithic capacitor according to a first preferred embodiment of the present invention. -
FIG. 2 is a sectional view showing the monolithic capacitor shown inFIG. 1 as mounted, in which the monolithic capacitor is shown in section taken along lines II-II inFIGS. 3A to 4B. -
FIGS. 3A and 3B are plan views showing the internal structure of a first capacitor portion shown inFIG. 2 , in whichFIG. 3A shows a cross-section of a first internal electrode, andFIG. 3B shows a cross-section of a second internal electrode. -
FIGS. 4A and 4B are plan views showing the internal structure of a second capacitor portion shown inFIG. 2 , in whichFIG. 4A shows a cross-section of a third internal electrode andFIG. 1B shows a cross-section of a fourth internal electrode. -
FIG. 5 is a diagram schematically showing an equivalent circuit of the monolithic capacitor shown inFIG. 1 . -
FIG. 6 is a diagram showing the circuit configuration of an MPU in which the monolithic capacitor shown inFIG. 1 is used as a decoupling capacitor. -
FIGS. 7A and 7B are diagrams for explaining a monolithic capacitor according to a second preferred embodiment of the present invention, corresponding toFIGS. 4A and 4B . -
FIGS. 8A and 8B are diagrams for explaining a monolithic capacitor according to a third preferred embodiment of the present invention, corresponding toFIGS. 4A and 4B . -
FIGS. 9A to 9D explain a monolithic capacitor according to a fourth preferred embodiment of the present invention, in whichFIGS. 9A and 9B correspond toFIGS. 3A and 3B , respectively, andFIGS. 9C and 9D correspond toFIGS. 4A and 4B , respectively. -
FIGS. 10A to 10D explain a monolithic capacitor according to a fifth preferred embodiment of the present invention, in whichFIGS. 10A and 10B correspond toFIGS. 3A and 3B , respectively, andFIGS. 10C and 10D correspond toFIGS. 4A and 4B , respectively. -
FIGS. 11A and 11B are diagrams for explaining a monolithic capacitor according to a sixth preferred embodiment of the present invention, corresponding toFIGS. 3A and 3B . -
FIGS. 12A and 12B are diagrams for explaining a monolithic capacitor according to a seventh preferred embodiment of the present invention, corresponding toFIGS. 4A and 4B . -
FIG. 13 is a plan view of a dielectric layer for explaining a monolithic capacitor according to an eighth preferred embodiment of the present invention. -
FIGS. 14A to 14C are diagrams for explaining a monolithic capacitor according to a ninth preferred embodiment of the present invention, corresponding toFIGS. 3A and 3B . -
FIGS. 15A to 15C are diagrams for explaining a monolithic capacitor according to a tenth preferred embodiment of the present invention, corresponding toFIGS. 4A and 4B . -
FIGS. 16A to 16C are diagrams for explaining a monolithic capacitor according to an eleventh preferred embodiment of the present invention, corresponding toFIGS. 3A and 3B . -
FIGS. 17A to 17C are diagrams for explaining a monolithic capacitor according to a twelfth preferred embodiment of the present invention, corresponding toFIGS. 4A and 4B . -
FIG. 18 is a perspective view showing the appearance of a monolithic capacitor according to a thirteenth preferred embodiment of the present invention. -
FIG. 19 is a side view illustrating how first and second capacitor portions are arranged in the monolithic capacitor shown inFIG. 18 . -
FIGS. 20A and 20B are plan views of dielectric layers, showing the internal structure of the first capacitor portion shown inFIG. 19 , in whichFIG. 20A shows across-section of a first internal electrode andFIG. 20B shows a cross-section of a second internal electrode. -
FIGS. 21A and 21B are plan views of dielectric layers, showing the internal structure of the second capacitor portion shown inFIG. 19 , in whichFIG. 21A shows a cross-section of a third internal electrode andFIG. 21B shows a cross-section of a fourth internal electrode. -
FIG. 22 is a diagram for explaining a monolithic capacitor according to a fourteenth preferred embodiment of the present invention, corresponding toFIG. 19 . -
FIG. 23 is a diagram for explaining a monolithic capacitor according to a fifteenth preferred embodiment of the present invention, corresponding toFIG. 19 . -
FIG. 24 is a diagram illustrating some examples of how first and second capacitor portions are laminated and arranged in first and second experiments performed to confirm the advantages of the present invention. -
FIGS. 25A and 25B are plan views showing patterns of internal electrodes in the first capacitor portion ofsample 11 manufactured in the first experiment. -
FIGS. 26A and 26B are plan views showing patterns of internal electrodes in the second capacitor portion ofsample 11 manufactured in the first experiment. -
FIG. 27 shows plan views showing patterns of internal electrodes in the first capacitor portion ofsample 12 manufactured in the first experiment. -
FIG. 28 shows plan views showing patterns of internal electrodes in the second capacitor portion ofsample 12 manufactured in the first experiment. -
FIG. 29 shows plan views showing patterns of internal electrodes in the second capacitor portion insamples -
FIG. 30 is a diagram showing frequency-impedance characteristics ofsamples experiment 2. - FIGS. 1 to 4B show a monolithic capacitor according to a first preferred embodiment of the present invention.
FIG. 1 is a perspective view showing the appearance of themonolithic capacitor 1, andFIG. 2 is a sectional view showing a mounting structure of themonolithic capacitor 1. InFIG. 2 , themonolithic capacitor 1 is shown in cross-section taken along lines II-II inFIGS. 3A, 3B , 4A and 4B described later. - The
monolithic capacitor 1 preferably includes a substantially rectangularmain capacitor unit 8 having two opposingprincipal surfaces side surfaces principal surfaces main capacitor unit 8 has a monolithic structure including a lamination of a plurality ofdielectric layers 9 parallel to theprincipal surfaces - As shown in
FIG. 2 , themain capacitor unit 8 includesfirst capacitor portions 11 and asecond capacitor portion 12. In this preferred embodiment, thefirst capacitor portions 11 and thesecond capacitor portion 12 are arrayed in the direction of lamination, and thesecond capacitor portion 12 is sandwiched by the twofirst capacitor portions 11 in the direction of lamination. Thus, thefirst capacitor portions 11 are located towards either end in the direction of lamination of themain capacitor unit 8. - Each of the
first capacitor portions 11 includes at least one pair of first and secondinternal electrodes predetermined dielectric layer 9 so as to define a capacitor. Thesecond capacitor portion 12 includes at least one pair of third and fourthinternal electrodes predetermined dielectric layer 9 so as to define a capacitor. - In this preferred embodiment, in order to achieve a larger capacitance, at least two pairs of the first and second
internal electrodes internal electrodes -
FIGS. 3A and 3B are plan views of the internal structure of thefirst capacitor portion 11, in whichFIG. 3A shows a cross-section of the firstinternal electrode 13 andFIG. 3B shows a cross-section of the secondinternal electrode 14. - As shown in
FIG. 3A , the firstinternal electrode 13 includes a plurality of, e.g., seven, first lead-outportions 17 extending out to the outer surface of themain capacitor unit 8, i.e., to the side surfaces 4 to 7. Furthermore, as shown inFIG. 3N , the secondinternal electrode 14 includes a plurality of, e.g., seven, second lead-outportions 18 extending out to the outer surface of themain capacitor unit 8, i.e., to the side surfaces 4 to 7. Thus, seven pairs of the first and second lead-outportions internal electrodes - On the side surfaces 4 to 7 of the
main capacitor unit 8, a plurality of, e.g., seven, first externalterminal electrodes 19 electrically connected individually to the first lead-outportions 17, and a plurality of, e.g., seven, second externalterminal electrodes 20 electrically connected individually to the second lead-outportions 18 are provided. The first and second externalterminal electrodes principal surfaces FIGS. 1 and 2 . - The locations on the side surfaces 4 to 7 to which the individual first lead-out
portions 17 extend differ from the locations to which the individual second lead-outportions 18 extend. Thus, the locations of the individual first externalterminal electrodes 19 provided on the side surfaces 4 to 7 differ from the locations of the individual second externalterminal electrodes 20. The first externalterminal electrodes 19 and the second externalterminal electrodes 20 are alternately arranged on the side surfaces 4 to 7. -
FIGS. 4A and 4B are plan views of the internal structure of thesecond capacitor portion 12, in whichFIG. 4A shows across-section of the thirdinternal electrode 15 andFIG. 4B shows a cross-section of the fourthinternal electrode 16. - As shown in
FIG. 4A , the thirdinternal electrode 15 includes at least one, e.g., two, third lead-outportion 21 extending out to the outer surface of themain capacitor unit 8, i.e., to the side surfaces 5 and 7. Furthermore, as shown inFIG. 4B , the fourthinternal electrode 16 includes at least one, e.g., two, fourth lead-outportion 22 extending out to the outer surface of themain capacitor unit 8, i.e., to the side surfaces 5 and 7. Thus, two pairs of the third and fourth lead-outportions internal electrodes - In this preferred embodiment, the third lead-out
portions 21 are electrically connected to the first externalterminal electrodes 19 described earlier, and the fourth lead-outportions 22 are electrically connected to the second externalterminal electrodes 20 described earlier. That is, some of the first externalterminal electrodes 19 are defined by the third external terminal electrodes that are to be electrically connected to the third lead-outportions 21, and some of the second externalterminal electrodes 20 are defined by the fourth external terminal electrodes that are to be electrically connected to the fourth lead-outportions 22. - When the third and fourth lead-out
portions terminal electrodes portions first capacitor portions 11 and thesecond capacitor portion 12 are connected in parallel within themonolithic capacitor 1. - Alternatively, as in preferred embodiments described later, third and fourth external terminal electrodes that are to be connected to the third and fourth lead-out
portions - In the first preferred embodiment described above, the number of pairs of the third and fourth lead-out
portions internal electrodes portions internal electrodes portions internal electrodes portions internal electrodes - Particularly, in the first preferred embodiment, the number of the third lead-out
portions 21 for each of the thirdinternal electrodes 15 and the number of the fourth lead-outportions 22 for each of the fourthinternal electrodes 16 are less than the number of the first lead-outportions 17 for each of the firstinternal electrodes 13 and the number of the second lead-outportions 18 for each of the secondinternal electrodes 14. More specifically, two of the third lead-outportions 21 are provided for each of the thirdinternal electrodes 15, two of the fourth lead-outportions 22 are provided for each of the fourthinternal electrodes 16, seven of the first lead-outportions 17 are provided for each of the firstinternal electrodes 13, and seven of the second lead-outportions 18 for each of the secondinternal electrodes 14. - Thus, currents flow in various directions in the first and second
internal electrodes first capacitor portion 11 is less than the ESL of thesecond capacitor portion 12. - On the other hand, in the third and fourth
internal electrodes portions 21 for each of the thirdinternal electrodes 15 and the number of the fourth lead-outportions 22 for each of the fourthinternal electrodes 16 are less than the number of the first lead-outportions 17 for each of the firstinternal electrodes 13 and the number of the second lead-outportions 18 for each of the secondinternal electrodes 14. Thus, assuming that the effects of theinternal electrodes 13 to 16 or the lead-outportions first capacitor portion 11 and thesecond capacitor portion 12, and that other conditions such as the materials of theinternal electrodes 13 to 16 are the same, currents flow in a smaller number of directions in the third and fourthinternal electrodes internal electrodes second capacitor portion 12 is greater than the ESR of thefirst capacitor portion 11. - From another perspective, in the first preferred embodiment, the number of the third lead-out
portions 21 for each of the thirdinternal electrodes 15 and the number of the fourth lead-outportions 22 for each of the fourthinternal electrodes 16 are less than the number of the first lead-outportions 17 for each of the firstinternal electrodes 13 and the number of the second lead-outportions 18 for each of the secondinternal electrodes 14. Thus, assuming that other conditions such as the materials of theinternal electrodes 13 to 16 are the same, the ESL of thefirst capacitor portion 11 is less than the ESL of thesecond capacitor portion 12. Accordingly, the resonant frequency of thefirst capacitor portion 11 is greater than the resonant frequency of thesecond capacitor portion 12. - On the other hand, since the number of the third lead-out
portions 21 and the number of the fourth lead-outportions 22 are less than the number of the first lead-outportions 17 and the number of the second lead-outportions 18, assuming that the effects of theinternal electrodes 13 to 16 or the lead-outportions first capacitor portion 11 and thesecond capacitor portion 12, the ESR per layer provided by one pair of the third and fourthinternal electrodes dielectric layer 9 included in thesecond capacitor portion 12 is greater than the ESR per layer provided by one pair of the first and secondinternal electrodes dielectric layer 9 included in thefirst capacitor portion 11. - In the characteristics of the
monolithic capacitor 1, the low ESL characteristics due to thefirst capacitor portions 11 are effectively provided, and high ESR characteristics are provided due to the ESR characteristics of thefirst capacitor portions 11 and the ESR characteristics of thesecond capacitor portion 12. Thus, both low ESL and high ESR are achieved with themonolithic capacitor 1. -
FIG. 2 shows a structure in which themonolithic capacitor 1 is mounted on a mountingsurface 25 of acircuit board 24. On the mountingsurface 25 of thecircuit board 24,conductive lands terminal electrodes conductive lands - In the mounting structure described above, the
monolithic capacitor 1 is mounted with themain capacitor unit 8 arranged such that one of thefirst capacitor portions 11 is located closer to the mountingsurface 25 than thesecond capacitor portion 12. - In the
monolithic capacitor 1 mounted as described above, when the first external terminal electrode is a positive terminal and the second externalterminal electrode 20 is a negative terminal, considering a loop of the flow of currents that flow from the positive terminal to the negative terminal through theinternal electrodes 13 to 16, currents that flow through the two lowermost internal electrodes 13(a) and 14(a) affect ESL values more significantly as the frequency increases, as indicated by abroken arrow 28 inFIG. 2 . Thus, when thefirst capacitor portion 11 is located closer to the mountingsurface 25 as described above, ESL is further decreased in the mountedmonolithic capacitor 1. - When the
second capacitor portion 12 is sandwiched by the twofirst capacitor portions 11 in the direction of lamination, as in the first preferred embodiment, the distinction between the upper side and the lower side of themain capacitor unit 8 is irrelevant. Thus, whether theprincipal surface 3 faces the mountingsurface 25 as shown inFIG. 2 or theprincipal surface 2 faces the mountingsurface 25, although not shown, ESL is decreased as described above. -
FIG. 5 schematically shows an equivalent circuit of themonolithic capacitor 1 described above. In order to show corresponding relationships between elements shown inFIG. 5 and elements shown in FIGS. 1 to 4B, inFIG. 5 , elements corresponding to those shown in FIGS. 1 to 4B are designated by the same reference signs. - In
FIG. 5 , for each of the first to fourthinternal electrodes 13 to 16, one internal electrode is indicated by one line. In thefirst capacitor portion 11, two pairs of the first and secondinternal electrodes internal electrodes internal electrodes second capacitor portion 12, two pairs of the third and fourthinternal electrodes internal electrodes internal electrodes - When
FIG. 5 is compared toFIG. 2 described earlier, the number of the first and secondinternal electrodes first capacitor portion 11 does not coincide. It is to be understood that this is because only representative ones of the first and secondinternal electrodes FIG. 2 . - As shown in
FIG. 5 , for each of the lead-outportions ESR 29 and anESL 30 are produced. -
FIG. 6 is a diagram which explains a preferable application of themonolithic capacitor 1 according to the present preferred embodiment. More specifically,FIG. 6 is a diagram showing the circuit configuration of an MPU in which themonolithic capacitor 1 is used as a decoupling capacitor. - The MPU includes an
MPU chip 101 and amemory 102. Apower source 103 supplies electric power to theMPU chip 101. On a power supply circuit between thepower source 103 and theMPU chip 101, themonolithic capacitor 1 is connected so as to function as a decoupling capacitor. Furthermore, on the side of thememory 102 with respect to theMPU chip 101, although not shown, a signal circuit is provided. - The
monolithic capacitor 1 used as a decoupling capacitor in the MPU described above functions as a quick power supply as well as to absorb noise or smooth variation in power supply. Thus, in themonolithic capacitor 1 used as a decoupling capacitor, ESL should be minimized. The monolithic capacitor according to this preferred embodiment can be advantageously used as a decoupling capacitor. -
FIGS. 7A and 7B are diagrams for explaining a monolithic capacitor 1 a according to a second preferred embodiment of the present invention, corresponding toFIGS. 4A and 4B . InFIGS. 7A and 7B , elements corresponding to those shown inFIGS. 4A and 4B are designated by the same reference signs, and the description thereof is omitted. - Compared to the first preferred embodiment described above, in the second preferred embodiment, the third
internal electrode 15 includes only one third lead-outportion 21, and the fourthinternal electrode 16 includes one fourth lead-outportion 22. The configuration is otherwise preferably the same as that in the first preferred embodiment. - According to the second preferred embodiment, only one pair of the third and fourth lead-out
portions internal electrodes second capacitor portion 12. Thus, the ESR in thesecond capacitor portion 12 is further increased as compared to the first preferred embodiment. -
FIGS. 8A and 8B are diagrams for explaining a monolithic capacitor 1 b according to a third preferred embodiment of the present invention, corresponding toFIGS. 4A and 4B . InFIGS. 8A and 8B , elements corresponding to those shown inFIGS. 4A and 4B are designated by the same reference signs, and the description thereof is omitted. - In the third preferred embodiment, one of the third
internal electrode 15 and the fourthinternal electrode 16 has the same pattern as either the firstinternal electrode 13 or the secondinternal electrode 14 shown inFIGS. 3A and 3B . More specifically, as shown inFIG. 8B , the fourthinternal electrode 16 has the same pattern as the secondinternal electrode 14 shown inFIG. 3B . Thus, the fourthinternal electrode 16 includes seven fourth lead-outportions 22. The configuration is otherwise substantially the same as that in the first preferred embodiment. - In the third preferred embodiment, one fourth
internal electrode 16 includes seven fourth lead-outportions 22. However, one thirdinternal electrode 15 includes only two third lead-outportions 21. Thus, the number of pairs of the third and fourth lead-outportions portions second capacitor portion 12 is greater than the ESR of thefirst capacitor portion 11. - From another perspective, the third preferred embodiment satisfies the condition that at least one of the number of the third lead-out
portions 21 for each of the thirdinternal electrodes 15 and the number of the fourth lead-outportions 22 for each of the fourthinternal electrodes 16 is less than the number of the first lead-outportions 17 for each of the firstinternal electrodes 13 and the number of the second lead-outportions 18 for each of the secondinternal electrodes 14. Thus, the ESR per layer provided by one pair of the third and fourthinternal electrodes dielectric layer 9 included in thesecond capacitor portion 12 is less than that in the first preferred embodiment, the ESR per layer is greater than the ESR per layer given by one pair of the first and secondinternal electrodes dielectric layer 9 included in thefirst capacitor portion 11. -
FIGS. 9A to 9D explain amonolithic capacitor 1 c according to a fourth preferred embodiment of the present invention.FIGS. 9A and 9A correspond toFIGS. 3A and 3B , respectively, andFIGS. 9C and 9C correspond toFIGS. 4A and 4B , respectively. InFIGS. 9A to 9D, elements corresponding to those shown inFIGS. 3A to 4B are designated by the same reference signs, and the description thereof is omitted. - In the fourth preferred embodiment, third and fourth external
terminal electrodes shorter side surfaces main capacitor unit 8 are the third and fourth externalterminal electrodes terminal electrodes FIGS. 9C and 9D , the third lead-outportions 21 of the thirdinternal electrode 15 and the fourth lead-outportions 22 of the fourthinternal electrode 16 are electrically connected to the third and fourth externalterminal electrodes - On the other hand, as shown in
FIG. 9A , the firstinternal electrode 13 includes only five first lead-outportions 17, and these first lead-outportions 17 extend out only to the longer side surfaces 4 and 6 of themain capacitor unit 8 and are electrically connected to the first externalterminal electrodes 19. Furthermore, as shown inFIG. 9B , the secondinternal electrode 14 includes only five second lead-outportions 18, and these second lead-outportions 18 extend out only to the longer side surfaces 4 and 6 of themain capacitor unit 8 and are electrically connected to the second externalterminal electrodes 20. - The configuration is otherwise substantially the same as that in the first preferred embodiment.
- According to the fourth preferred embodiment, compared to the first preferred embodiment, assuming that conditions other than the number of the first lead-out
portions 17 and the number of the second lead-outportions 18 are the same, the resonant frequency of thefirst capacitor portion 11 is further reduced. Furthermore, the ESL of thefirst capacitor portion 11 is further increased. -
FIGS. 10A to 10D explain amonolithic capacitor 1 d according to a fifth preferred embodiment of the present invention.FIGS. 10A and 10B correspond toFIGS. 3A and 3B , respectively, andFIGS. 10C and 10D correspond toFIGS. 4A and 4B , respectively. InFIGS. 10A to 10D, elements corresponding to those shown inFIGS. 3A to 4B are designated by the same reference signs, and the description thereof is omitted. - In the fifth preferred embodiment, no external terminal electrodes are provided on the
shorter side surfaces main capacitor unit 8. That is, the first and second externalterminal electrodes main capacitor unit 8. - Furthermore, in the fifth preferred embodiment, as shown in
FIG. 10C , the thirdinternal electrode 15 includes one third lead-outportion 21, and the third lead-outportion 21 is electrically connected to one of the first externalterminal electrodes 19. Furthermore, as shown inFIG. 10C , the fourthinternal electrode 16 includes one fourth lead-outportion 22, and the fourth lead-outportion 22 is electrically connected to one of the second externalterminal electrodes 20. - The configuration is otherwise substantially the same as that in the first preferred embodiment.
- The fifth preferred embodiment has the significance of clarifying that the present invention is applicable to the
monolithic capacitor 1 d, in which external terminal electrodes are not provided on theshorter side surfaces main capacitor unit 8. -
FIGS. 11A and 11B are diagrams for explaining amonolithic capacitor 1 e according to a sixth preferred embodiment of the present invention, corresponding toFIGS. 3A and 3B . InFIGS. 11A and 11B , elements corresponding to those shown inFIGS. 3A and 3B are designated by the same reference signs, and the description thereof is omitted. - In the sixth preferred embodiment, as shown in
FIG. 11A , dummy lead-outportions 38 are provided on adielectric layer 9 in which the firstinternal electrode 13 is provided. Furthermore, as shown inFIG. 11B , dummy lead-outportions 39 are provided on adielectric layer 9 in which the secondinternal electrode 14 is provided. - The dummy lead-out
portions portions 38 are located between a plurality of the first lead-outportions 17 and are electrically connected to the second externalterminal electrodes 20. The dummy lead-outportions 39 are located between a plurality of the second lead-outportions 18 and are electrically connected to the first externalterminal electrodes 19. - With the dummy lead-out
portions main capacitor unit 8 due to the thicknesses of theinternal electrodes terminal electrodes main capacitor unit 8. -
FIGS. 12A and 12B are diagrams for explaining a monolithic capacitor 1 f according to a seventh preferred embodiment of the present invention, corresponding toFIGS. 4A and 4B . InFIGS. 12A and 12B , elements corresponding to those shown inFIGS. 4A and 4B are designated by the same reference signs, and the description thereof is omitted. - In the seventh preferred embodiment, as shown in
FIG. 12A , dummy lead-outportions 40 are provided on adielectric layer 9 in which the thirdinternal electrode 15 is provided. Furthermore, as shown inFIG. 12B , dummy lead-outportions 41 are provided on adielectric layer 9 in which the fourthinternal electrode 16 is provided. - The dummy lead-out
portions portions 40 are electrically connected to the second externalterminal electrodes 20 provided on theshorter side surfaces main capacitor unit 8. The dummy lead-outportions 41 are electrically connected to the first externalterminal electrodes 19 provided on theshorter side surface main capacitor unit 8. - The dummy lead-out
portions portions FIGS. 11A and 11B . - As a modification of the seventh preferred embodiment shown in
FIGS. 12A and 12B , dummy lead-out portions may further be provided along the longer sides of the dielectric layers 9. Also in this case, the dummy lead-out portions are electrically connected individually to the first and second externalterminal electrodes main capacitor unit 8. -
FIG. 13 is a diagram for explaining amonolithic capacitor 1 g according to an eighth preferred embodiment of the present invention. InFIG. 13 , many elements that are similar to those shown inFIGS. 3A and 3B orFIGS. 4A and 4B are shown. Thus, inFIG. 13 , elements corresponding to those shown inFIGS. 3A and 3B orFIGS. 4A and 4B are designated by the same reference signs, and the description thereof is omitted. -
FIG. 13 shows adielectric layer 9 in which no internal electrode is provided among thedielectric layers 9 included in themain capacitor unit 8. Such adielectric layer 9 in which no internal electrode is provided is located at an end of themain capacitor unit 8 in the direction of lamination or at a boundary of thefirst capacitor portion 11 and thesecond capacitor portion 12. - In the eighth preferred embodiment, as shown in
FIG. 13 , a plurality of dummy lead-outportions 42 are provided along the periphery of thedielectric layer 9 in which no internal electrode is provided. The dummy lead-outportions 42 are electrically connected to the externalterminal electrodes portions 42 are substantially the same as the dummy lead-outportions 38 to 41 described earlier, and are preferably arranged so as not to overlap the main portions of theinternal electrodes 13 to 16. - The dummy lead-out
portions 42 also provide substantially the same operation and advantages as the dummy lead-outportions 38 to 41 described earlier. - The sixth to eighth preferred embodiments including dummy lead-out portions, described above, may be used individually. However, preferably, two or more of the preferred embodiments are used in combination, and most preferably, the three preferred embodiments are implemented in combination.
-
FIGS. 14A to 14C are diagrams for explaining amonolithic capacitor 1 h according to a ninth preferred embodiment of the present invention, corresponding toFIGS. 3A and 3B . InFIGS. 14A to 14C, elements corresponding to those shown inFIGS. 3A and 3B are designated by the same reference signs, and the description thereof is omitted. -
FIGS. 14A and 14B show the first and secondinternal electrodes FIGS. 3A and 3B , respectively.FIG. 14C shows a dummyinternal electrode 45. In this preferred embodiment, the dummyinternal electrode 45 has the same pattern as the secondinternal electrode 14 shown inFIG. 14B . That is, the dummyinternal electrode 45 includes lead-outportions 46 extended out to the side surfaces 4 to 7 of themain capacitor unit 8, and the lead-outportions 46 are electrically connected to the second externalterminal electrodes 20. - As described earlier, in order to form the first capacitor portion 11 (refer to
FIG. 2 ), the firstinternal electrode 13 shown inFIG. 14A and the second internal electrode shown inFIG. 14B are laminated so as to oppose each other. In this preferred embodiment, in the monolithic structure described above, at least one dummyinternal electrode 45 is laminated adjacent to the secondinternal electrode 14 at an end and/or in the middle in the direction of lamination. - By including the dummy
internal electrode 45 in the monolithic structure as described above, although the capacitance does not increase, the bonding strength of the second externalterminal electrodes 20 with themain capacitor unit 8 can be enhanced. Thus, this preferred embodiment is advantageous in a case where a large capacitance is not needed but the bonding strength of the externalterminal electrodes 20 is ensured while allowing lamination of a certain number ofdielectric layers 9. - As a modification of the ninth preferred embodiment, a dummy internal electrode having the same pattern as the first
internal electrode 13 may be provided. -
FIGS. 15A to 15C are diagrams for explaining a monolithic capacitor 1 i according to a tenth preferred embodiment of the present invention. InFIGS. 15A to 15C, elements corresponding to those shown inFIGS. 4A and 4B are designated by the same reference signs, and the description thereof is omitted. -
FIGS. 15A and 15B show the third and fourthinternal electrodes FIGS. 4A and 4B , respectively.FIG. 15C shows a dummyinternal electrode 49. In this preferred embodiment, the dummyinternal electrode 49 has the same pattern as the fourthinternal electrode 16 shown inFIG. 15B . That is, the dummyinternal electrode 49 has lead-outportions 50 extended out to theshorter side surfaces main capacitor unit 8, and the lead-outportions 50 are electrically connected to the second externalterminal electrodes 20. - As described earlier, when the third
internal electrode 15 shown inFIG. 15A and the fourthinternal electrode 16 shown inFIG. 15B are laminated so as to oppose each other to define the second capacitor portion 12 (refer toFIG. 2 ), at least one dummyinternal electrode 49 is laminated adjacent to the fourthinternal electrode 16 in the monolithic structure at an end and/or in the middle in the direction of lamination. The dummyinternal electrode 49 described above produces substantially the same operation and advantages as the dummyinternal electrode 45 shown inFIG. 14C . - As a modification of the tenth preferred embodiment, a dummy internal electrode having the same pattern as the third
internal electrode 15 may be provided. -
FIGS. 16A to 16C are diagrams for explaining amonolithic capacitor 1 j according to an eleventh preferred embodiment of the present invention, corresponding toFIGS. 3A and 3B . InFIGS. 16A to 16C, elements corresponding to those shown inFIGS. 3A and 3B are designated by the same reference signs, and the description thereof is omitted. -
FIGS. 16A and 16B show the first and secondinternal electrodes FIGS. 3A and 3B , respectively.FIG. 16C shows a dummyinternal electrode 53. In this preferred embodiment, the dummyinternal electrode 53 preferably has the same pattern as the fourth internal electrode shown inFIG. 4B . That is, the dummyinternal electrode 53 includes lead-outportions 54 extended out to theshorter side surfaces main capacitor unit 8, and the lead-outportions 54 are electrically connected to the second externalterminal electrodes 20. - When the first
internal electrode 13 shown inFIG. 16A and the secondinternal electrode 14 shown inFIG. 16B are laminated so as to oppose each other to define the first capacitor section 11 (refer toFIG. 2 ) as described earlier, at least one dummyinternal electrode 53 is laminated adjacent to the secondinternal electrode 14 in the monolithic structure at an end and/or in the middle in the direction of lamination. - The dummy
internal electrode 53 described above produces substantially the same operation and advantages as the dummyinternal electrodes FIGS. 14A to 15C, respectively. - As a modification of the eleventh preferred embodiment, a dummy internal electrode having the same pattern as the third
internal electrode 15 shown inFIG. 4A may be provided. -
FIGS. 17A to 17C are diagrams for explaining amonolithic capacitor 1 k according to a twelfth preferred embodiment of the present invention, corresponding toFIGS. 4A and 4B . InFIGS. 17A to 17C, elements corresponding to those shown inFIGS. 4A and 4B are designated by the same reference signs, and the description thereof is omitted. -
FIGS. 17A and 17B show the third and fourthinternal electrodes FIGS. 4A and 4B , respectively.FIG. 17C shows a dummyinternal electrode 57. The dummyinternal electrode 57 preferably has the same pattern as the secondinternal electrode 14 shown inFIG. 3B . That is, the dummyinternal electrode 57 includes lead-outportions 58 extended out to the side surfaces 4 to 7 of themain capacitor unit 8, and the lead-outportions 58 are electrically connected to the second externalterminal electrodes 20. - When the third
internal electrode 15 shown inFIG. 17A and the fourthinternal electrode 16 shown inFIG. 17B are laminated so as to oppose each other to define the second capacitor portion 12 (refer toFIG. 2 ) as described earlier, at least one dummyinternal electrode 57 is laminated adjacent to the fourthinternal electrode 16 in the monolithic structure at an end and/or in the middle in the direction of lamination. - The dummy
internal electrode 57 described above produces substantially the same operation and advantages as the dummyinternal electrodes FIGS. 14A to 16C, respectively. - As a modification of the twelfth preferred embodiment, a dummy internal electrode preferably having substantially the same pattern as the first
internal electrode 13 shown inFIG. 3B may be provided. - The ninth to twelfth preferred embodiments described above can be used in combination as appropriate. More specifically, since the ninth and eleventh preferred embodiments relate to the
first capacitor portion 11 and the tenth and twelfth preferred embodiments relate to thesecond capacitor portion 12, each of the ninth and eleventh preferred embodiments can be used in arbitrary combination with each of the tenth and twelfth preferred embodiments. - FIGS. 18 to 21B show a
monolithic capacitor 61 according to a thirteenth preferred embodiment of the present invention. -
FIG. 18 shows a perspective view showing the appearance of themonolithic capacitor 61, andFIG. 19 shows a side view illustrating how first andsecond capacitor portions monolithic capacitor 61. InFIGS. 18 and 19 , a mountingsurface 64 is shown. When mounted, themonolithic capacitor 61 has a direction of lamination that is parallel to the mountingsurface 64. - The
monolithic capacitor 61 includes a substantially rectangularmain capacitor unit 71 having two opposingprincipal surfaces side surfaces principal surfaces main capacitor unit 71 has a monolithic structure including a lamination of a plurality of dielectric layers 72 (refer toFIGS. 20A, 20B , 21A, and 21B) substantially parallel to theprincipal surfaces - As shown in
FIG. 19 , the capacitormain unit 71 includesfirst capacitor portions 62 and asecond capacitor portion 63. Thefirst capacitor portions 62 and thesecond capacitor portion 63 are arrayed in the direction of lamination, which is substantially parallel to the mountingsurface 64, with thesecond capacitor portion 63 sandwiched by the twofirst capacitor portions 62. Thus, thefirst capacitor portions 62 are located at end portions of the capacitormain unit 71. -
FIGS. 20A and 20B are plan views of thedielectric layers 72, showing the internal structure of thefirst capacitor portion 62, in whichFIG. 20A shows a cross-section of a firstinternal electrode 73 andFIG. 20B shows a cross-section of a secondinternal electrode 74.FIGS. 21A and 21B are plan views of thedielectric layers 72, showing the internal structure of thesecond capacitor portion 63, in whichFIG. 21A shows a cross-section of a thirdinternal electrode 75 andFIG. 21B shows a cross-section of a fourthinternal electrode 76. - As shown in
FIGS. 20A and 20B , in thefirst capacitor portion 62, at least one pair of the first and secondinternal electrodes predetermined dielectric layer 72 so as to define a capacitor. Furthermore, as shown inFIGS. 21A and 21B , in thesecond capacitor portion 63, at least one pair of the third and fourthinternal electrodes predetermined dielectric layer 72 so as to define a capacitor. - As shown in
FIG. 20A , the firstinternal electrode 73 includes two first lead-outportions 77 extended out respectively to the two opposing side surfaces 67 and 69 of themain capacitor unit 71. Furthermore, as shown inFIG. 20B , the secondinternal electrode 74 includes two second lead-outportions 78 extended out respectively to the opposing side surfaces 67 and 69 of themain capacitor unit 71. - On each of the side surfaces 67 and 69 of the
main capacitor unit 71, two first externalterminal electrodes 79 electrically connected individually to the first lead-outportions 77 and two second externalterminal electrodes 80 electrically connected individually to the second lead-outportions 78 are provided. The first and second externalterminal electrodes principal surfaces terminal electrodes 79 and the second externalterminal electrodes 80 are alternately arranged on the side surfaces 67 and 69. - As shown in
FIG. 21A , the thirdinternal electrode 75 includes third lead-outportions 81 extended out to the opposing side surfaces 67 and 69 of themain capacitor unit 71, one for each of the side surfaces 67 and 69. Also, as shown inFIG. 21B , the fourthinternal electrode 76 includes fourth lead-outportions 82 extended out from the opposing side surfaces 67 and 69 of themain capacitor unit 71, one for each of the side surfaces 67 and 69. - In this preferred embodiment, the third lead-out
portions 81 are electrically connected to the first externalterminal electrodes 79 described earlier, and the fourth lead-outportions 82 are electrically connected to the second externalterminal electrodes 80 described earlier. - In the thirteenth preferred embodiment described above, similar to the first preferred embodiment, the number of pairs of the third and fourth lead-out
portions internal electrodes portions internal electrodes portions internal electrodes portions internal electrodes - Furthermore, in the thirteenth preferred embodiment, the number of the third lead-out
portions 81 for each of the thirdinternal electrodes 75 and the number of the fourth lead-outportions 82 for each of the fourthinternal electrodes 76 are less than the number of the first lead-outportions 77 for each of the firstinternal electrodes 73 and the number of the second lead-outportions 78 for each of the secondinternal electrodes 74. - Thus, currents flow in various directions in the first and second
internal electrodes first capacitor portion 62 is less than the ESL of thesecond capacitor portion 63. On the other hand, in the third and fourthinternal electrodes internal electrodes 73 to 76 are the same, the ESR of thesecond capacitor portion 63 is greater than the ESR of thefirst capacitor portion 62. - From another perspective, also in the thirteenth preferred embodiment, the number of the third lead-out
portions 81 for each of the thirdinternal electrodes 75 and the number of the fourth lead-outportions 82 for each of the fourthinternal electrodes 76 are less than the number of the first lead-outportions 77 for each of the firstinternal electrodes 73 and the number of the second lead-outportions 78 for each of the secondinternal electrodes 74. Thus, assuming that other conditions such as the materials of theinternal electrodes 73 to 76 are the same, the ESL of thefirst capacitor portion 62 is less than the ESL of thesecond capacitor portion 63. Accordingly, the resonant frequency of thefirst capacitor portion 62 is greater than the resonant frequency of thesecond capacitor portion 63. - At the same time, as described earlier, since the number of the third lead-out
portions 81 and the number of the fourth lead-outportions 82 are less than the number of the first lead-outportions 77 and the number of the second lead-outportions 78, assuming that the effects of theinternal electrodes 73 to 76 or the lead-outportions first capacitor portion 62 and thesecond capacitor portion 63, the ESR per layer provided by one pair of the third and fourthinternal electrodes dielectric layer 72 included in thesecond capacitor portion 63 is greater than the ESR per layer provided by one pair of the first and secondinternal electrodes dielectric layer 72 included in thefirst capacitor portion 62. - From what has been described above, similarly to the
monolithic capacitor 1 according to the first preferred embodiment, themonolithic capacitor 61 produces characteristics in which low ESL characteristics due to thefirst capacitor portions 62 and high ESR characteristics due to thesecond capacitor portion 63 are combined. Thus, both low ESL and high ESR are achieved with themonolithic capacitor 61. -
FIGS. 22 and 23 are diagrams for explainingmonolithic capacitors FIG. 19 . InFIGS. 22 and 23 , elements corresponding to those shown inFIG. 19 are designated by the same reference signs, and repeated description thereof is omitted. - In the case of the
monolithic capacitor 61 according to the thirteenth preferred embodiment described above, thedielectric layers 72 and theinternal electrodes 73 to 76 is substantially perpendicular to the mountingsurface 64, so that, in contrast to themonolithic capacitor 1 according to the first preferred embodiment, it is not necessary to consider the effects of the distance between the mountingsurface 64 and the internal electrodes on ESLs. Thus, the first andsecond capacitor portions FIG. 22 orFIG. 23 instead of as shown inFIG. 19 without causing problems. - Although the present invention has been described in the context of the preferred embodiments shown in the drawings, various other modifications are possible within the scope of the present invention.
- For example, the locations or the number of lead-out portions provided on internal electrodes or the locations or the number of external terminal electrodes may be changed.
- Furthermore, the first and second capacitor portions in the main capacitor unit may be arranged in various manners other than those in the preferred embodiments shown in the drawings, as will be understood from experiments described later.
- Furthermore, for example, in the first preferred embodiment, although the first and second
internal electrodes first capacitor portions 11 and the third and fourthinternal electrodes second capacitor portion 12 in the first preferred embodiment, an internal electrode located at a boundary between the first and second capacitor portions may be provided as an internal electrode for both the first and second capacitor portions, i.e., as an internal electrode that functions commonly as the first or second internal electrode and the third or fourth internal electrode. - Furthermore, for example, in the first preferred embodiment, although the number of the first lead-out
portions 17 and the number of the second lead-out portions 18 (or the number of pairs thereof) are preferably selected to be greater than the number of the third lead-outportions 21 and the number of the fourth lead-out portions 22 (or the number of pairs thereof) so that the resonant frequency of thefirst capacitor portion 11 is greater than the resonant frequency of thesecond capacitor portion 12, alternatively or in addition, the materials or patterns of theinternal electrodes 13 to 16 and/or the number of laminated layers may be changed. - Furthermore, for example, in the first preferred embodiment, although the number of the third lead-out
portions 21 and the number of the fourth lead-outportions 22 are preferably selected to be less than the number of the first lead-outportions 17 and the number of the second lead-outportions 18 so that the ESR per layer in thesecond capacitor portion 12 is greater than the ESR per layer in thefirst capacitor portion 11, alternatively or in addition, a material having a greater resistivity may be selected for the thirdinternal electrodes 15 and/or the fourthinternal electrodes 16, the thickness of the thirdinternal electrodes 15 and/or the fourth internal electrodes may be decreased, or the width or thickness of the third lead-outportions 21 and/or the fourth lead-outportions 22 may decreased. - Next, experiments that were performed to confirm the advantages of various preferred embodiments of the present invention will be described.
- 1. First Experiment
- In this experiment, using known techniques, a plurality of ceramic green sheets is prepared, internal electrodes having lead-out portions were formed on specific ceramic green sheets by printing conductive paste, the plurality of ceramic green sheets including the ceramic green sheets having the internal electrodes formed thereon was laminated and the resulting lamination was fired to obtain a main capacitor unit, and external terminal electrodes were formed on the outer surface of the main capacitor unit by baking conductive paste. Through these steps, monolithic capacitors of the samples shown in Table 1 were manufactured.
- In each of the monolithic capacitors of the samples, the dimensions of the main capacitor unit were 2.0 mm×1.25 mm×0.5 mm, the total number of laminated layers of internal electrodes was 64, the capacitance was 0.68 μF, and as the preferred embodiment shown in
FIG. 1 and other figures, the number of external terminal electrodes was 14. Furthermore, the thickness of the internal electrodes was 1 μm, the thickness of lead-out portions was 1 μm, and the width of the lead-out portions was 150 μm.TABLE 1 First capacitor portion Manner of Number Number of Number of lamination Internal Number of of first second pairs of Sample and electrode laminated lead-out lead-out lead-out No. arrangement pattern layers portions portions portions *1 A 64 7 7 7 2 B Upper 20 Lower 207 7 7 3 B Upper 10 Lower 107 7 7 4 B Upper 6 Lower 67 7 7 5 B Upper 4 Lower 47 7 7 6 C 32 7 7 7 7 C 24 7 7 7 8 C 16 7 7 7 9 C 8 7 7 7 10 D 8 7 7 7 *11 C 8 7 2 2 12 C 8 2 2 2 *13 E — — — — — Second capacitor portion Number of Number of Number of Internal Number of third fourth pair of Sample electrode laminated lead-out lead-out lead-out No. pattern layers portion portion portions *1 — — — — — 2 24 2 2 2 3 44 2 2 2 4 52 2 2 2 5 56 2 2 2 6 32 1 1 1 7 40 1 1 1 8 48 1 1 1 9 56 1 1 1 10 56 1 1 1 *11 56 2 7 2 12 56 1 1 1 *13 64 1 1 1 - In Table 1, A to E shown in the section of “Manner of lamination and arrangement” correspond to
FIG. 24 , respectively.FIGS. 24A to 24E show how the first and second capacitor portions are arranged in the direction of lamination. InFIGS. 24A to 24E, parts designated by reference signs “35” indicate external layers on which no internal electrodes are provided. Furthermore, inFIGS. 24A to 24E, bottom surfaces of lamination structures that are shown face the mounting surface. - In the section of “First capacitor portion” in Table 1, “Internal electrode pattern”, “Number of laminated layers”, “Number of first lead-out portions”, “Number of second lead-out portions”, and “Number of pairs of lead-out portions” are shown. In the section of “Second capacitor portion”, “Internal electrode pattern”, “Number of laminated layers”, “Number of third lead-out portion”, “Number of fourth lead-out portion”, and “Number of pair of lead-out portions” are shown.
- In each field of “Internal electrode pattern”, the number of the figure showing the internal electrode pattern adopted in each sample is cited. “
FIG. 25 ” cited in the field of “Internal electrode pattern” in the “First capacitor portion” ofsample 11, “FIG. 26 ” cited in the field of “Internal electrode pattern” in the “Second capacitor portion” ofsample 11, “FIG. 27 ” cited in the field of “Internal electrode pattern” in the “First capacitor portion” ofsample 12, “FIG. 28 ” cited in the field of “Internal electrode pattern” in the “Second capacitor portion” ofsample 12, and “FIG. 29 ” cited in the field of “Internal electrode pattern” in the “Second capacitor portion” ofsample 13 indicate that internal electrode patterns shown inFIGS. 25, 26 , 27, 28, and 29 are used, respectively. -
FIG. 25A shows a firstinternal electrode 13 having seven first lead-outportions 17, andFIG. 25B shows a secondinternal electrode 14 having two second lead-outportions 18. -
FIG. 26A shows a thirdinternal electrode 15 having two third lead-outportions 21, andFIG. 26B shows a fourthinternal electrode 16 having seven fourth lead-outportions 22. -
FIG. 27 shows a firstinternal electrode 13 having two first lead-outportions 17 and a secondinternal electrode 14 having two second lead-outportions 18. InFIG. 27 , (1) to (14) represent the orders of lamination. -
FIG. 28 shows a thirdinternal electrode 15 having one third lead-outportion 21 and a fourthinternal electrode 16 having one fourth lead-outportion 22. InFIG. 28 , (1) to (14) represent the orders of lamination. -
FIG. 29 shows a thirdinternal electrode 15 having one third lead-outportion 21 and a fourthinternal electrode 16 having one fourth lead-outportion 22, and externalterminal electrodes portions FIG. 29 , (1) to (14) represent the orders of lamination. - Referring back to Table 1, “Number of laminated layers” represents a total number of laminated layers of the first and second internal electrodes in “First capacitor portion”, and represents a total number of laminated layers of the third and fourth internal electrodes in “Second capacitor portion”. The indication of “Upper” and “Lower” in the section of “Number of laminated layers” in “First capacitor portion” correspond to “first capacitor portion (upper)” and “first capacitor portion (lower) in
FIG. 24 (b), respectively. - Furthermore, “Number of first lead-out portions”, “Number of second lead-out portions”, and “Number of pairs of lead-out portions” in “First capacitor portion” represent the number of lead-out portions for one first internal electrode, the number of lead-out portions for one second internal electrode, and the number of pairs of the first and second lead-out portions for one pair of the first and second internal electrodes.
- On the other hand, “Number of third lead-out portion”, “Number of fourth lead-out portion”, and “Number of pair of lead-out portions” in “Second capacitor portion” represent the number of lead-out portion for one third internal electrode, the number of lead-out portion for one fourth internal electrode, and the number of pair of the third and fourth lead-out portions for one pair of the first and second internal electrodes.
- Table 2 shows “ESL value” and “ESR value” obtained from each of
samples 1 to 13 designed as shown in Table 1.TABLE 2 Sample No. ESL value ESR value *1 35 pH 6.8 mΩ 2 35 pH 12.3 mΩ 3 36 pH 30.1 mΩ 4 36 pH 31.1 mΩ 5 37 pH 32.3 mΩ 6 36 pH 14.7 mΩ 7 38 pH 18.7 mΩ 8 37 pH 28.1 mΩ 9 36 pH 37.2 mΩ 10 45 pH 38.1 mΩ *11 46 pH 13.3 mΩ 12 46 pH 29.1 mΩ *13 48 pH 34.4 mΩ - In Table 1 and Table 2, sample numbers with * represent comparative examples that are not within the scope of the present invention.
- In
sample 1 as a comparative example, as shown in Table 1, the second capacitor portion, which contributes to increasing ESR, is not provided. Thus, as shown in Table 2, although ESL is decreased, it is not possible to increase ESR. - In
sample 9 as a comparative example contrasted withsample 1, as shown in Table 1, the first capacitor portion, which contributes to decreasing ESL, is not provided. Thus, as shown in Table 2, although ESR is increased, it is not possible to decrease ESL. - In
sample 11 as a comparative example, as shown in Table 1, “Number of pairs of lead-out portions” in “Second capacitor portion” is equal to “Number of pairs of lead-out portions” in “First capacitor portion”, so that the first capacitor portion and the second capacitor portion have the same configuration. Thus, the ESL value is approximately 46 pH, which is substantially the same as that ofsample 12, which has the smallest number of lead-out portions among the preferred embodiments of the present invention, and the ESR value is approximately 13.3 mΩ, which is substantially the same as that ofsample 2 having the lowest ESR value among the preferred embodiments of the present invention. This occurs for the following reasons. - The ESL value is substantially the same as that of
sample 12 since the number of pairs of lead-out portions in the first capacitor portion and the number of pairs of lead-out portions in the second capacitor portions are two. This is because, although the number of the first lead-out portions is seven, the number of pairs is only two. - As for ESR, since the number of internal electrodes in the first capacitor portions and the second capacitor portion are increased, the ESR per layer is considerably less than that of
sample 13. Furthermore, by lamination of layers, ESRs are connected in parallel, so that the ESR is further decreased. - As described above, when the first capacitor portion and the second capacitor portion have the same configuration, it is not possible to effectively increase ESR.
- Furthermore, in addition to the improvement in high-frequency characteristics, in
samples 2 to 10 and 12, as preferred embodiments within the scope of the present invention, as shown in Table 1, both the first and second capacitor portions are provided, and “Number of pair of lead-out portions” in “Second capacitor portion” is less than “Number of pairs of lead-out portions” in “First capacitor portion”. Thus, as shown in Table 2, ESL is decreased and ESR is increased at the same time. - Furthermore, in
samples 2 to 9, the ESL value is substantially the same as that insample 1. This is because, at high frequencies, electric fields concentrate on the side of the mounting surface, and the characteristics regarding the loop indicated by thebroken arrow 28 inFIG. 2 are most strongly affected, so that the low ESL value of the first capacitor portion becomes dominant insamples 2 to 9, in which the first capacitor portion having a greater number of lead-out portions is laminated and arranged on the side of the mounting surface. - In contrast, in
sample 10, in which the second capacitor portion is located on the side of the mounting surface, the ESL value is greater as compared tosamples 2 to 9. Even in the configuration ofsample 10, the ESL value is less compared to sample 13 due to the presence of the first capacitor portion. - In
samples 2 to 5, in which the number of laminated layers in the first capacitor portion is varied in the same manner of lamination and arrangement, the ESL values are substantially the same. Thus, it is understood that the effect of the number of laminated layers in the first capacitor portion on the ESL value is small. This also applies tosamples 6 to 9 having a manner of lamination and arrangement different from that insamples 2 to 5. - As for the ESR value, the ESR value increases as the number of laminated layers in the second capacitor portion increases relative to the total number of laminated layers in the entire monolithic capacitor. Furthermore, from comparison among
samples samples sample 5, in which the number of the third lead-out portions and the number of the fourth lead-out portions are two. Furthermore, insamples sample 13. This is because the ESR value of the first capacitor portion and the ESR value of the second capacitor portion are both higher than insample 13, and as a result, the resonant frequency differs between the first capacitor portion and the second capacitor portion, so that the ESR value of the monolithic capacitor is greater than that insample 13. - When
samples - 2. Second Experiment
- In this experiment, through the same steps as in the first experiment, monolithic capacitors of samples shown in Table 3 were manufactured.
- Similarly to the first experiment, in each of the monolithic capacitors of the samples, the dimensions of the main capacitor unit were 2.0 mm×1.25 mm×0.5 mm, the total number of laminated layers of internal electrodes was 64, the capacitance was 0.68 μF, and similarly to the embodiment shown in
FIG. 1 and other figures, the number of external terminal electrodes was 14. Furthermore, the thickness of the internal electrodes was 1 μm, the thickness of lead-out portions was 1 μm, and the width of the lead-out portions was 100 μm.TABLE 3 Manner of First capacitor portion Second capacitor portion lamination Internal Number of Resonant ESR per Internal Sample and electrode laminated frequency layer electrode No. arrangement pattern layers [MHz] [mΩ] pattern *21 A 64 32.8 164 — 22 B Upper 20 Lower 2038.1 163 23 B Upper 10 Lower 1054.6 170 24 B Upper 6 Lower 671.7 162 25 B Upper 4 Lower 489.9 163 26 C 32 42.7 158 27 C 8 89.9 165 28 D 8 89.5 161 *29 E — — — — FIG. 29 Second capacitor portion Number of Number of Number of Number of Number of Resonant ESR per first second third fourth Sample laminated frequency layer lead-out lead-out lead-out lead-out No. layers [MHz] [mΩ] portions portions portions portions *21 — — — 7 7 — — 22 24 26.9 577 7 7 2 2 23 44 19.7 562 7 7 2 2 24 52 18.1 571 7 7 2 2 25 56 17.4 574 7 7 2 2 26 32 23.2 1140 7 7 1 1 27 56 17.4 1151 7 7 1 1 28 56 16.4 1150 7 7 1 1 *29 64 16 1155 — — 1 1 - In Table 3, A to E shown in the section of “Manner of lamination and arrangement” correspond to
FIGS. 24A to 24E described earlier, respectively. - In each of the sections of “First capacitor portion” and “Second capacitor portion” in Table 3, “Internal electrode pattern”, “Number of laminated layers”, “Resonant frequency”, and “ESR per layer” are shown.
- The ESR of the capacitor can be expressed by the following equation:
ESR of capacitor=R(4N−2)/N 2
where R denotes the resistance per electrode layer and N denotes the number of laminated layers. The resistance R per electrode layer is herein calculated by an inverse calculation using the ESR of the entire first capacitor portion as the ESR of the capacitor, and “ESR per layer” is calculated by assigning the value of R and N=2 (since one layer of capacitor is formed of two opposing internal electrodes) into the above equation. - In each field of “Internal electrode pattern”, the number of the drawing showing the internal electrode pattern adopted in each sample is cited.
- Referring back to Table 3, “Number of laminated layers” represents the total Number of laminated layers of the first and second internal electrodes in “First capacitor portion”, and represents a total Number of laminated layers of the third and fourth internal electrodes in “Second capacitor portion”. The indication of “Upper” and “Lower” in the section of “Number of lamination” in “First capacitor portion” correspond to “first capacitor portion (upper)” and “first capacitor portion (lower) in
FIG. 24B , respectively. - Furthermore, each of “Number of first lead-out portions”, “Number of second lead-out portions”, “Number of third lead-out portions”, and “Number of fourth lead-out portions” represents the number of lead-out portions for each relevant internal electrode.
- Table 4 shows “ESL value” and “ESR value” obtained from each of
samples 21 to 29 designed as shown inFIG. 3 .TABLE 4 Sample No. ESL value ESR value *21 35 pH 6.8 mΩ 22 35 pH 12.3 mΩ 23 36 pH 30.1 mΩ 24 36 pH 31.1 mΩ 25 37 pH 32.3 mΩ 26 36 pH 16.1 mΩ 27 36 pH 37.2 mΩ 28 43 pH 38.1 mΩ *29 48 pH 36.7 mΩ - In Table 3 and Table 4, sample numbers with * represent comparative examples that are not within the scope of the present invention.
- In
sample 21 as a comparative example, as shown in Table 3, the second capacitor portion, which contributes to increasing ESR, is not provided. Thus, as shown in Table 4, although ESL is decreased, it is not possible to increase ESR. - In
sample 29 as another comparative example, as shown in Table 3, the first capacitor portion, which contributes to decreasing the ESL, is not provided. Thus, as shown in Table 4, although ESR is increased, it is not possible to decrease ESL. - In contrast, in
samples 22 to 28 as preferred embodiments that are within the scope of the present invention, as shown in Table 3, both the first and second capacitor portions are provided. Thus, as shown in Table 4, ESL is decreased and ESR is increased at the same time. - As for
samples 22 to 27, the ESL value is substantially the same as that insample 21. This is because, at high frequencies, electric fields concentrate on the side of the mounting surface, and the characteristics regarding the loop indicated by thebroken arrow 28 inFIG. 2 are affected most strongly, so that the low ESL value of the first capacitor portion becomes dominant insamples 22 to 27, in which the first capacitor portion having a greater number of lead-out portions is laminated and arranged on the side of the mounting surface. - In contrast, in
sample 28, in which the second capacitor portion is located on the side of the mounting surface, the ESL value is higher as compared tosamples 22 to 27. Even in the configuration ofsample 28, the ESL value is lower compared to sample 29 due to the presence of the first capacitor portion. - In
samples 22 to 25, in which the number of laminated layers in the first capacitor portion is varied under the same manner of lamination and arrangement, the ESL values are substantially the same. Thus, it is understood that the effect of the number of laminated layers in the first capacitor portion on the ESL value is small. - As for the ESR value, the ESR value increases as the number of laminated layers in the second capacitor portion increases relative to the total number of laminated layers in the entire monolithic capacitor. Furthermore, from comparison among
samples samples sample 25, in which the number of the third lead-out portions and the number of the fourth lead-out portions are two. Furthermore, insamples sample 29. This is because the ESR value of the first capacitor portion and the ESR value of the second capacitor portion are both greater than insample 29, and as a result, the resonant frequency differs between the first capacitor portion and the second capacitor portion, so that the ESR value of the monolithic capacitor is greater than that insample 29. - When
samples - Furthermore, when the
samples 22 to 28 are compared, the resonant frequency tends to decrease as the number of laminated layers in the first and second capacitor portions increases. Furthermore, as will be understood from the resonant frequency of the first capacitor portions insamples - Furthermore, in
samples 22 to 27, the resonant frequency of the first capacitor portion is selected to be greater than the resonant frequency of the second capacitor portion. For example, insample 22, the total number of laminated layers is 40 and the resonant frequency is approximately 38 MHz in the first capacitor portion, and the number of laminated layers is 24 and the resonant frequency is approximately 26 MHz in the second capacitor portion. Even though the number of laminated layers is less in the second capacitor portion, the resonant frequency is less than in the first capacitor portion. This is due to the difference in the number of lead-out portions. When the number of laminated layers in the first capacitor portion is increased and the number of laminated layers in the second capacitor portion is decreased insample 22, the difference between the resonant frequencies of the first and second capacitor portions decreases, and eventually the resonant frequencies become the same. At this time, when the resonant frequencies of the first and second capacitor portions are the same, it is assumed that the ESRs of the first and second capacitor portions are parallel, so that ESR decreases. Thus, it is not possible to achieve a desired high ESR. - From what has been described above, the resonant frequency of the first capacitor portion is preferably chosen to be greater than the resonant frequency of the second capacitor portion.
-
FIG. 30 shows frequency-impedance characteristics ofsample 25 as a preferred embodiment andsamples - Referring to
FIG. 30 , insample 21, as shown in Table 4, the ESR value decreases as the ESL value decreases, so that the impedance characteristics are steep. - In
sample 29, as shown in Table 4, although the ESR value is increased, ESL value also increases, so that the impedance characteristics at high frequencies are degraded. - In contrast, in
sample 25, as shown in Table 4, ESL is decreased and ESR is increased, so that favorable characteristics are obtained, even at high frequencies. - While preferred embodiments of the present invention have been described above, it is to be understood that variations and modifications will be apparent to those skilled in the art without departing the scope and spirit of the present invention. The scope of the present invention, therefore, is to be determined solely by the following claims.
Claims (29)
1-16. (canceled)
17: A multilayer capacitor comprising a multilayer body in which a plurality of dielectric layers and a plurality of inner electrodes are alternately laminated, and a plurality of outer conductors formed on the multilayer body;
wherein the plurality of inner electrodes include a plurality of first inner electrodes and a plurality of second inner electrodes alternately arranged;
wherein the plurality of outer conductors include a first terminal conductor, a second terminal conductor, a first outer connecting conductor electrically connected to the plurality of first inner electrodes, and a second outer connecting conductor electrically connected to the plurality of second inner electrodes;
wherein the first terminal conductor is formed on a first side face of the multilayer body;
wherein the second terminal conductor is formed on the first side face of the multilayer body or a second side face thereof opposing the first side face;
wherein the first outer connecting conductor is formed on the first or second side face of the multilayer body;
wherein the second outer connecting conductor is formed on the first or second side face of the multilayer body;
wherein each of the first inner electrodes is electrically connected to the first outer connecting conductor through a lead conductor;
wherein each of the second inner electrodes is electrically connected to the second outer connecting conductor through a lead conductor;
wherein at least one first inner connecting conductor and at least one second inner connecting conductor are laminated in the multilayer body;
wherein the first inner connecting conductor is electrically connected to the first terminal conductor and the first outer connecting conductor, whereas the second inner connecting conductor is electrically insulated from the first inner connecting conductor but is electrically connected to the second terminal conductor and the second outer connecting conductor;
wherein the first and second inner connecting conductors are laminated in the multilayer body such that the multilayer body includes at least one set of the first and second inner electrodes neighboring each other with the dielectric layer in between; and
wherein an equivalent series resistance is set to a desirable value by adjusting the number of first inner connecting conductors and the number of second inner connecting conductors respectively.
18: A multilayer capacitor according to claim 17 , wherein the first inner connecting conductor includes a region opposing the second inner electrode with the dielectric layer in between.
19: A multilayer capacitor according to claim 17 , wherein the second inner connecting conductor includes a region opposing the first inner electrode with the dielectric layer in between.
20: A multilayer capacitor according to claim 17 , wherein the first terminal conductor and the first outer connecting conductor are formed adjacent to each other on the same side face of the multilayer body.
21: A multilayer capacitor according to claim 17 , wherein the second terminal conductor and the second outer connecting conductor are formed adjacent to each other on the same side face of the multilayer body.
22: A multilayer capacitor according to claim 17 , wherein a plurality of first terminal conductors and a plurality of first outer connecting conductors are provided by the same number;
wherein a plurality of second terminal conductors and a plurality of second outer connecting conductors are provided by the same number;
wherein the plurality of first terminal conductors and the plurality of first outer connecting conductors are formed on the first side face of the multilayer body, whereas the plurality of second terminal conductors and the plurality of second outer connecting conductors are formed on the second side face of the multilayer body;
wherein at least one of both neighboring sides of each first terminal conductor on the first side face is formed with the first outer connecting conductor;
wherein at least one of both neighboring sides of each first outer connecting conductor on the first side face is formed with the first terminal conductor;
wherein at least one of both neighboring sides of each second terminal conductor on the second side face is formed with the second outer connecting conductor; and
wherein at least one of both neighboring sides of each second outer connecting conductor on the second side face is formed with the second terminal conductor.
23: A multilayer capacitor according to claim 17 , wherein at least one each of the first terminal conductor, second terminal conductor, first outer connecting conductor, and second outer connecting conductor are provided;
wherein the first terminal conductor or second terminal conductor is located at a position axisymmetrical to the first terminal conductor about a center axis of the multilayer body passing respective center points of two side faces of the multilayer body orthogonal to the laminating direction of the multilayer body;
wherein the first outer connecting conductor or second outer connecting conductor is located at a position axisymmetrical to the first outer connecting conductor about the center axis of the multilayer body;
wherein the first terminal conductor or second terminal conductor is located at a position axisymmetrical to the second terminal conductor about the center axis of the multilayer body;
wherein the first outer connecting conductor or second outer connecting conductor is located at a position axisymmetrical to the second outer connecting conductor about the center axis of the multilayer body;
wherein the first terminal conductor or second terminal conductor is located at a position opposing the first terminal conductor in a direction along which the first and second side faces of the multilayer body oppose each other;
wherein the first outer connecting conductor or second outer connecting conductor is located at a position opposing the first outer connecting conductor in the opposing direction of the first and second side faces of the multilayer body;
wherein the first terminal conductor or second terminal conductor is located at a position opposing the second terminal conductor in the opposing direction of the first and second side faces of the multilayer body; and
wherein the first outer connecting conductor or second outer connecting conductor is located at a position opposing the second outer connecting conductor in the opposing direction of the first and second side faces of the multilayer body.
24: A multilayer capacitor comprising a multilayer body in which a plurality of dielectric layers and a plurality of inner electrodes are alternately laminated, and a plurality of outer conductors formed on the multilayer body;
wherein the plurality of inner electrodes include a plurality of first inner electrodes and a plurality of second inner electrodes alternately arranged;
wherein the plurality of outer conductors include a first terminal conductor, a second terminal conductor, a first outer connecting conductor electrically connected to the plurality of first inner electrodes, and a second outer connecting conductor electrically connected to the plurality of second inner electrodes;
wherein the first terminal conductor is formed on a first side face of the multilayer body; wherein the second terminal conductor is formed on the first side face of the multilayer body or a second side face thereof opposing the first side face;
wherein the first outer connecting conductor is formed on the first or second side face of the multilayer body; wherein the second outer connecting conductor is formed on the first or second side face of the multilayer body;
wherein each of the first inner electrodes is electrically connected to the first outer connecting conductor through a lead conductor;
wherein each of the second inner electrodes is electrically connected to the second outer connecting conductor through a lead conductor;
wherein at least one first inner connecting conductor and at least one second inner connecting conductor are laminated in the multilayer body;
wherein the first inner connecting conductor is electrically connected to the first terminal conductor and first outer connecting conductor, whereas the second inner connecting conductor is electrically insulated from the first inner connecting conductor but is electrically connected to the second terminal conductor and second outer connecting conductor;
wherein the first and second inner connecting conductors are laminated in the multilayer body such that the multilayer body includes at least one set of the first and second inner electrodes neighboring each other with the dielectric layer in between; and
wherein an equivalent series resistance is set to a desirable value by adjusting a position of the first inner connecting conductor in the multilayer body in the laminating direction and a position of the second inner connecting conductor in the multilayer body in the laminating direction respectively.
25: A multilayer capacitor according to claim 24 , wherein the first inner connecting conductor includes a region opposing the second inner electrode with the dielectric layer in between.
26: A multilayer capacitor according to claim 24 , wherein the second inner connecting conductor includes a region opposing the first inner electrode with the dielectric layer in between.
27: A multilayer capacitor according to claim 24 , wherein the first terminal conductor and the first outer connecting conductor are formed adjacent to each other on the same side face of the multilayer body.
28: A multilayer capacitor according to claim 24 , wherein the second terminal conductor and the second outer connecting conductor are formed adjacent to each other on the same side face of the multilayer body.
29: A multilayer capacitor according to claim 24 , wherein a plurality of first terminal conductors and a plurality of first outer connecting conductors are provided by the same number;
wherein a plurality of second terminal conductors and a plurality of second outer connecting conductors are provided by the same number;
wherein the plurality of first terminal conductors and the plurality of first outer connecting conductors are formed on the first side face of the multilayer body, whereas the plurality of second terminal conductors and the plurality of second outer connecting conductors are formed on the second side face of the multilayer body;
wherein at least one of both neighboring sides of each first terminal conductor on the first side face is formed with the first outer connecting conductor;
wherein at least one of both neighboring sides of each first outer connecting conductor on the first side face is formed with the first terminal conductor;
wherein at least one of both neighboring sides of each second terminal conductor on the second side face is formed with the second outer connecting conductor; and
wherein at least one of both neighboring sides of each second outer connecting conductor on the second side face is formed with the second terminal conductor.
30: A multilayer capacitor according to claim 24 , wherein at least one each of the first terminal conductor, second terminal conductor, first outer connecting conductor, and second outer connecting conductor are provided;
wherein the first terminal conductor or second terminal conductor is located at a position axisymmetrical to the first terminal conductor about a center axis of the multilayer body passing respective center points of two side faces of the multilayer body orthogonal to the laminating direction of the multilayer body;
wherein the first outer connecting conductor or second outer connecting conductor is located at a position axisymmetrical to the first outer connecting conductor about the center axis of the multilayer body;
wherein the first terminal conductor or second terminal conductor is located at a position axisymmetrical to the second terminal conductor about the center axis of the multilayer body;
wherein the first outer connecting conductor or second outer connecting conductor is located at a position axisymmetrical to the second outer connecting conductor about the center axis of the multilayer body;
wherein the first terminal conductor or second terminal conductor is located at a position opposing the first terminal conductor in a direction along which the first and second side faces of the multilayer body oppose each other;
wherein the first outer connecting conductor or second outer connecting conductor is located at a position opposing the first outer connecting conductor in the opposing direction of the first and second side faces of the multilayer body;
wherein the first terminal conductor or second terminal conductor is located at a position opposing the second terminal conductor in the opposing direction of the first and second side faces of the multilayer body; and
wherein the first outer connecting conductor or second outer connecting conductor is located at a position opposing the second outer connecting conductor in the opposing direction of the first and second side faces of the multilayer body.
31: A monolithic capacitor comprising a multilayer body in which a plurality of dielectric layers and a plurality of internal electrodes are alternately laminated, and a plurality of external terminal electrodes formed on the multilayer body;
wherein the plurality of internal electrodes include a plurality of first internal electrodes and a plurality of second internal electrodes alternately arranged;
wherein the plurality of external terminal electrodes include a first external terminal electrode, a second external terminal electrode, a third external terminal electrode electrically connected to the plurality of first internal electrodes, and a fourth external terminal electrode electrically connected to the plurality of second internal electrodes;
wherein the first external terminal electrode is formed on a first side face of the multilayer body;
wherein the second external terminal electrode is formed on the first side face of the multilayer body or a second side face thereof opposing the first side face;
wherein the third external terminal electrode is formed on the first or second side face of the multilayer body;
wherein the fourth external terminal electrode is formed on the first or second side face of the multilayer body;
wherein each of the first internal electrodes is electrically connected to the third external terminal electrode through a lead-out portion;
wherein each of the second internal electrodes is electrically connected to the fourth external terminal electrode through a lead-out portion;
wherein at least one third internal electrode and at least one fourth internal electrode are laminated in the multilayer body;
wherein the third internal electrode is electrically connected to the first external terminal electrode and the third external terminal electrode, whereas the fourth internal electrode is electrically insulated from the third internal electrode but is electrically connected to the second external terminal electrode and the fourth external terminal electrode;
wherein the third and fourth internal electrodes are laminated in the multilayer body such that the multilayer body includes at least one set of the first and second internal electrodes neighboring each other with the dielectric layer in between; and
wherein an equivalent series resistance is set to a desirable value by adjusting the number of third internal electrodes and the number of fourth internal electrodes respectively.
32: A monolithic capacitor according to claim 31 , wherein the third internal electrode includes a region opposing the second internal electrode with the dielectric layer in between.
33: A monolithic capacitor according to claim 31 , wherein the third internal electrode includes a region opposing the first internal electrode with the dielectric layer in between.
34: A monolithic capacitor according to claim 31 , wherein the first external terminal electrode and the third external terminal electrode are formed adjacent to each other on the same side face of the multilayer body.
35: A monolithic capacitor according to claim 31 , wherein the second external terminal electrode and the fourth external terminal electrode are formed adjacent to each other on the same side face of the multilayer body.
36: A monolithic capacitor according to claim 31 , wherein a plurality of first external terminal electrodes and a plurality of third external terminal electrodes are provided by the same number;
wherein a plurality of second external terminal electrodes and a plurality of fourth external terminal electrodes are provided by the same number;
wherein the plurality of first external terminal electrodes and the plurality of third external terminal electrodes are formed on the first side face of the multilayer body, whereas the plurality of second external terminal electrodes and the plurality of fourth external terminal electrodes are formed on the second side face of the multilayer body;
wherein at least one of both neighboring sides of each first external terminal electrode on the first side face is formed with the third external terminal electrode;
wherein at least one of both neighboring sides of each third external terminal electrode on the first side face is formed with the first external terminal electrode;
wherein at least one of both neighboring sides of each second external terminal electrode on the second side face is formed with the fourth external terminal electrode; and
wherein at least one of both neighboring sides of each fourth external terminal electrode on the second side face is formed with the second external terminal electrode.
37: A monolithic capacitor according to claim 31 , wherein at least one each of the first external terminal electrode, second external terminal electrode, third external electrode, and fourth external terminal electrode are provided;
wherein the first external terminal electrode or second external terminal electrode is located at a position axisymmetrical to the first external terminal electrode about a center axis of the multilayer body passing respective center points of two side faces of the multilayer body orthogonal to the laminating direction of the multilayer body;
wherein the third external terminal electrode or fourth external terminal electrode is located at a position axisymmetrical to the third external terminal electrode about the center axis of the multilayer body;
wherein the first external terminal electrode or second external terminal electrode is located at a position axisymmetrical to the second external terminal electrode about the center axis of the multilayer body;
wherein the third external terminal electrode or fourth external terminal electrode is located at a position axisymmetrical to the fourth external terminal electrode about the center axis of the multilayer body;
wherein the first external terminal electrode or second external terminal electrode is located at a position opposing the first external terminal electrode in a direction along which the first and second side faces of the multilayer body oppose each other;
wherein the third external terminal electrode or fourth external terminal electrode is located at a position opposing the third external terminal electrode in the opposing direction of the first and second side faces of the multilayer body;
wherein the first external terminal electrode or second external terminal electrode is located at a position opposing the second external terminal electrode in the opposing direction of the first and second side faces of the multilayer body; and
wherein the third external terminal electrode or fourth external terminal electrode is located at a position opposing the fourth external terminal electrode in the opposing direction of the first and second side faces of the multilayer body.
38: A monolithic capacitor comprising a multilayer body in which a plurality of dielectric layers and a plurality of internal electrodes are alternately laminated, and a plurality of external terminal electrodes formed on the multilayer body;
wherein the plurality of internal electrodes include a plurality of first internal electrodes and a plurality of second internal electrodes alternately arranged;
wherein the plurality of external terminal electrodes include a first external terminal electrode, a second external terminal electrode, a third external terminal electrode electrically connected to the plurality of first internal electrodes, and a fourth external terminal electrode electrically connected to the plurality of second internal electrodes;
wherein the first external terminal electrode is formed on a first side face of the multilayer body;
wherein the second external terminal electrode is formed on the first side face of the multilayer body or a second side face thereof opposing the first side face;
wherein the third external terminal electrode is formed on the first or second side face of the multilayer body;
wherein the fourth external terminal electrode is formed on the first or second side face of the multilayer body;
wherein each of the first internal electrodes is electrically connected to the third external terminal electrode through a lead-out portion;
wherein each of the second internal electrodes is electrically connected to the fourth external terminal electrode through a lead-out portion;
wherein at least one third internal electrode and at least one fourth internal electrode are laminated in the multilayer body;
wherein the third internal electrode is electrically connected to the first external terminal electrode and the third external terminal electrode, whereas the fourth internal electrode is electrically insulated from the third internal electrode but is electrically connected to the second external terminal electrode and the fourth external terminal electrode;
wherein the third and fourth internal electrodes are laminated in the multilayer body such that the multilayer body includes at least one set of the first and second internal electrodes neighboring each other with the dielectric layer in between; and
wherein an equivalent series resistance is set to a desirable value by adjusting a position of the third internal electrode in the multilayer body in the laminating direction and a position of the fourth internal electrode in the multilayer body in the laminating direction respectively.
39: A monolithic capacitor according to claim 38 , wherein the third internal electrode includes a region opposing the second internal electrode with the dielectric layer in between.
40: A monolithic capacitor according to claim 38 , wherein the third internal electrode includes a region opposing the first internal electrode with the dielectric layer in between.
41: A monolithic capacitor according to claim 38 , wherein the first external terminal electrode and the third external terminal electrode are formed adjacent to each other on the same side face of the multilayer body.
42: A monolithic capacitor according to claim 38 , wherein the second external terminal electrode and the fourth external terminal electrode are formed adjacent to each other on the same side face of the multilayer body.
43: A monolithic capacitor according to claim 38 , wherein a plurality of first external terminal electrodes and a plurality of third external terminal electrodes are provided by the same number;
wherein a plurality of second external terminal electrodes and a plurality of fourth external terminal electrodes are provided by the same number;
wherein the plurality of first external terminal electrodes and the plurality of third external terminal electrodes are formed on the first side face of the multilayer body, whereas the plurality of second external terminal electrodes and the plurality of fourth external terminal electrodes are formed on the second side face of the multilayer body;
wherein at least one of both neighboring sides of each first external terminal electrode on the first side face is formed with the third external terminal electrode;
wherein at least one of both neighboring sides of each third external terminal electrode on the first side face is formed with the first external terminal electrode;
wherein at least one of both neighboring sides of each second external terminal electrode on the second side face is formed with the fourth external terminal electrode; and
wherein at least one of both neighboring sides of each fourth external terminal electrode on the second side face is formed with the second external terminal electrode.
44: A monolithic capacitor according to claim 38 , wherein at least one each of the first external terminal electrode, second external terminal electrode, third external electrode, and fourth external terminal electrode are provided;
wherein the first external terminal electrode or second external terminal electrode is located at a position axisymmetrical to the first external terminal electrode about a center axis of the multilayer body passing respective center points of two side faces of the multilayer body orthogonal to the laminating direction of the multilayer body;
wherein the third external terminal electrode or fourth external terminal electrode is located at a position axisymmetrical to the third external terminal electrode about the center axis of the multilayer body;
wherein the first external terminal electrode or second external terminal electrode is located at a position axisymmetrical to the second external terminal electrode about the center axis of the multilayer body;
wherein the third external terminal electrode or fourth external terminal electrode is located at a position axisymmetrical to the fourth external terminal electrode about the center axis of the multilayer body;
wherein the first external terminal electrode or second external terminal electrode is located at a position opposing the first external terminal electrode in a direction along which the first and second side faces of the multilayer body oppose each other;
wherein the third external terminal electrode or fourth external terminal electrode is located at a position opposing the third external terminal electrode in the opposing direction of the first and second side faces of the multilayer body;
wherein the first external terminal electrode or second external terminal electrode is located at a position opposing the second external terminal electrode in the opposing direction of the first and second side faces of the multilayer body; and
wherein the third external terminal electrode or fourth external terminal electrode is located at a position opposing the fourth external terminal electrode in the opposing direction of the first and second side faces of the multilayer body.
Priority Applications (1)
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US11/780,620 US20070279836A1 (en) | 2004-12-24 | 2007-07-20 | Monolithic capacitor and mounting structure thereof |
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JP2004373166 | 2004-12-24 | ||
JP2005329713A JP3832505B2 (en) | 2004-12-24 | 2005-11-15 | Multilayer capacitor and its mounting structure |
JP2005-329713 | 2005-11-15 | ||
JP2005329712A JP3832504B2 (en) | 2004-12-24 | 2005-11-15 | Multilayer capacitor and its mounting structure |
JP2005-329712 | 2005-11-15 | ||
US11/616,550 US7310217B2 (en) | 2004-12-24 | 2006-12-27 | Monolithic capacitor and mounting structure thereof |
US11/780,620 US20070279836A1 (en) | 2004-12-24 | 2007-07-20 | Monolithic capacitor and mounting structure thereof |
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US11/780,620 Abandoned US20070279836A1 (en) | 2004-12-24 | 2007-07-20 | Monolithic capacitor and mounting structure thereof |
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US10622154B2 (en) | 2012-11-09 | 2020-04-14 | Samsung Electro-Mechanics Co., Ltd. | Multilayered ceramic capacitor, mounting structure of circuit board having thereon multilayered ceramic capacitor, packing unit for multilayered ceramic capacitor |
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US11342124B2 (en) | 2012-11-09 | 2022-05-24 | Samsung Electro-Mechanics Co., Ltd. | Multilayered ceramic capacitor, mounting structure of circuit board having thereon multilayered ceramic capacitor, packing unit for multilayered ceramic capacitor |
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US9773615B2 (en) * | 2014-08-14 | 2017-09-26 | Samsung Electro-Mechanics Co., Ltd. | Multilayer ceramic capacitor and board having the same |
US10297386B2 (en) | 2014-08-14 | 2019-05-21 | Samsung Electro-Mechanics Co., Ltd. | Multilayer ceramic capacitor and board having the same |
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US20170207024A1 (en) * | 2016-01-18 | 2017-07-20 | Apple Inc. | Multi-layer ceramic capacitors with bottom or side terminations |
US10104777B2 (en) * | 2016-06-21 | 2018-10-16 | Samsung Electro-Mechanics Co., Ltd. | Multilayer capacitor and board having the same |
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Also Published As
Publication number | Publication date |
---|---|
CN1993783B (en) | 2010-09-01 |
US20070121275A1 (en) | 2007-05-31 |
WO2006067939A1 (en) | 2006-06-29 |
TW200636778A (en) | 2006-10-16 |
EP1830372A1 (en) | 2007-09-05 |
CN1993783A (en) | 2007-07-04 |
US7310217B2 (en) | 2007-12-18 |
TWI284333B (en) | 2007-07-21 |
EP1830372B1 (en) | 2018-01-24 |
KR100884902B1 (en) | 2009-02-19 |
KR20070053800A (en) | 2007-05-25 |
EP1830372A4 (en) | 2011-06-29 |
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