US20080105880A1 - SILICON NITRIDE PASSIVATION WITH AMMONIA PLASMA PRETREAMENT FOR IMPROVING RELIABILITY OF AlGaN/GaN HEMTs - Google Patents

SILICON NITRIDE PASSIVATION WITH AMMONIA PLASMA PRETREAMENT FOR IMPROVING RELIABILITY OF AlGaN/GaN HEMTs Download PDF

Info

Publication number
US20080105880A1
US20080105880A1 US11/962,259 US96225907A US2008105880A1 US 20080105880 A1 US20080105880 A1 US 20080105880A1 US 96225907 A US96225907 A US 96225907A US 2008105880 A1 US2008105880 A1 US 2008105880A1
Authority
US
United States
Prior art keywords
transistor
algan
ammonia plasma
gan
silicon nitride
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US11/962,259
Inventor
Andrew Edwards
Steven Binari
Jeffrey Mittereder
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to US11/962,259 priority Critical patent/US20080105880A1/en
Publication of US20080105880A1 publication Critical patent/US20080105880A1/en
Abandoned legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
    • H01L29/7787Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66446Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003Nitride compounds

Definitions

  • This invention pertains to improving reliability of heterojunction transistors, particularly high electron mobility transistors, with an ammonia plasma pretreatment prior to passivation.
  • AlGaN/GaN high electron mobility transistors have shown exceptional microwave power output densities, with a recently reported continuous wave power density of 30 W/mm and 50% power added efficiency at a frequency of 8 GHz, In addition, a 36-mm gate-width GaN HEMT has been demonstrated with a total power output of 150 W and a power added efficiency of 54%.
  • device reliability remains a major concern for III-N HEMTs. In AlGaN/GaN HEMTs, degradation of the dc, transient, and microwave characteristics are often seen after relatively short periods of normal device operation. Although reliability is improving, microwave power output typically degrades by more than 1 dB in less than 1000 hours of operation.
  • Another object of this invention is to pretreat an AlGaN/GaN transistor with a low-power ammonia plasma prior to silicon nitride deposition for high power applications.
  • Another object of this invention is to improve reliability of an AlGaN/Gan transistor adapted for use in radars and communication equipment.
  • Another object of this invention is to improve reliability of AlGaN/GaN HEMTS characterized by the presence of 2 DEG channel.
  • Another object of this invention is prevention of drain current collapse caused by electron traps.
  • Another object of this invention relates to reduction of surface and bulk traps in high power and high electron mobility AlGaN/GaN heterojunction transistors that can potentially operate at voltages exceeding 100 volts and with electron mobility in excess of 1000 cm 2 /v sec.
  • FIG. 1 is a cross-sectional schematic representation of a high mobility transistor with AlGaN, GaN and doped GaN layers deposited on a silicon carbide substrate.
  • FIGS. 2 ( a ) and ( b ) show induced current collapse of unpassivated HEMT in (a) before stress and after stress and in (b) of passivated HEMT devices with silicon nitride only and with silicon nitride passivation, stressed for 60 hours and 176 hours, respectively.
  • FIG. 3 is a plot of normalized Drain Current versus Time, showing drain current response to pulsed gate voltage, in (a) with no passivation; in (b) for the same device after 64-hour stress; in (c) silicon nitride passivated device after 80-hour stress; and in (d) a device pretreated with ammonia plasma and passivated with silicon nitride, after 176-hour stress.
  • FIG. 4 is a plot of power _P out versus Time showing rf output degradation of (a) passivated device with silicon nitride only and (b) pre-treated with ammonia plasma and coated or pre-treated with silicon nitride wherein stress conditions were 20v, 200 mA/mm operated at 2 GHz at 1 dB compression of the gain.
  • the purpose of this invention is to improve the reliability of aluminum gallium nitride/gallium nitride (AlGaN/GaN) high electron mobility transistors by incorporating an ammonia (NH 3 ) plasma pre-treatment prior to silicon nitride (SiN) passivation of the heterojunction transistors after all other processing has been completed.
  • AlGaN/GaN aluminum gallium nitride/gallium nitride
  • SiN silicon nitride
  • This invention pertains to an electronic device and to a method for making it.
  • the device is a heterojunction transistor, particularly a high electron mobility transistor characterized by the presence of a 2 DEG channel.
  • Transistors of this invention contain an AlGaN barrier and a GaN buffer, with the channel disposed, when present, at the interface of the barrier and the buffer.
  • the method pertains to treatment of the device with ammonia plasma prior to passivation to extend reliability of the device beyond a period of time on the order of 300 hours of operation, the device typically being a 2 DEG AlGaN/GaN high electron mobility transistor with essentially no gate lag and with essentially no rf power output degradation.
  • an in-situ ammonia plasma treatment is used before a silicon nitride deposition on an Al x Ga 1-x N/GaN (where x is 0.20 to 0.30), after all other processing has been completed.
  • the ammonia plasma pretreatment and the silicon nitride deposition can both be performed in a plasma enhanced chemical vapor deposition system.
  • the substrate temperature is maintained at 250° C. for both.
  • a relatively low 35 W power level is typically used.
  • resulting process parameters are 200 mT chamber pressure, 400 sccm N 2 +SiH 4 (95:5) gas flow, 9 sccm ammonia gas flow, 35 W ICP power, and OW RIE power.
  • a silicon nitride film thickness of 750 A is adequate, with an optical index (n) of approximately 2.0, which indicates the approximate composition of the Si 3 N 4 passivation layer.
  • the nitride deposition process was performed after all of the processing steps and was followed by etching openings to the metal contacts and deposition and patterning of a Ti—Au overlay metal.
  • the ammonia plasma pretreatment and the silicon nitride deposition were performed in an inductively coupled plasma (ICP) configured plasma-enhanced chemical vapor deposition system with a bottom electrode diameter of 8 inches.
  • ICP inductively coupled plasma
  • the silicon nitride film, using about 5% by volume SiH 4 in a balance of N 2 was formed using a SiH 4 :NH 3 :N 2 plasma recipe (N 2 +SiH 4 of 300 to 400 sccm; NH 3 of 9 to 16 sccm).
  • the substrate temperature was maintained at 250° C.
  • the silicon nitride film thickness and the refractive index were measured by ellipsometry, and were 740-800 A and 2.03-2.09, respectively, for different device runs.
  • the chamber pressure was 50 mT and the duration was 180 seconds.
  • the ICP power was set to 35 W at 13.56 MHz, while the bottom electrode was set to 0 W.
  • FIG. 1 shows a cross-sectional schematic transistor 10 containing barrier layer 12 disposed on channel 14 , which is followed by channel/buffer layer 16 , which in turn is disposed on buffer layer 17 , and which in turn is disposed on substrate 18 .
  • the substrate supports all of the layers of the transistor.
  • the barrier layer is AlGaN and the buffer/channel layer is GaN with the channel layer being at the interface of the barrier and the buffer/channel layers.
  • the channel has a thickness on the order of 50 A to 100 A. It is the 2 DEG channel layer that characterizes a high electron mobility transistor, with electron mobility being in excess of 1000 cm 2 /V sec.
  • the 2-DEG is formed at the interface of the buffer/channel and the barrier layers.
  • contact 20 which provides electrical connection to source 24 , barrier layer 12 , and buffer/channel layer 16 .
  • contact 22 provides electrical connection to drain 26 , barrier layer 12 , and buffer/channel layer 16 .
  • Source 24 , drain 26 , and gate 28 are disposed in top layer 30 . Purpose of the source is to provide electrons to the transistor device. These electrons flow through the interface 2 DEG between the barrier layer and the buffer/channel layer to the drain. The gate controls the flow of these electrons through the 2 DEG.
  • the source, the drain and the ohmic contacts 20 , 22 , 24 and 26 are typically Ti—Al—Ni—Au and the gate is typically Ni—Au.
  • Typical barrier layer thickness is 200 A 300 A
  • typical channel layer thickness is 50 A to 100 A
  • typical buffer/channel layer thickness is 1 ⁇ m to 3 ⁇ m
  • typical buffer layer thickness is 500 A to 1500 A
  • typical substrate thickness is 1 ⁇ m to 2 ⁇ m.
  • FIGS. 2 ( a ) and ( b ) are the measured drain current for three consecutive sweeps of V DS from 0 to 30V with V GS held at 0 V.
  • the characteristics in FIG. 2 ( a ) are for an AlGaN/GaN HEMT without silicon nitride passivation prior to dc bias stress.
  • the three traces are nearly coincident, as they should be.
  • the second and third traces depart significantly from the first trace.
  • FIGS. 3 ( a - d ) Corresponding results are seen with gate lag measurements as shown in FIGS. 3 ( a - d ).
  • the drain current pulse shown in each figure is normalized to the steady state value of drain current.
  • the ideal response characteristic is for the pulsed current to rise to the steady state value, as shown in FIG. 2 ( d ).
  • Only the ammonia plasma plus silicon nitride processed device shows the ideal characteristic after bias stress. These characteristics again indicate that additional trapping levels are present after dc bias stress and that the ammonia plasma step is effective in suppressing their generation.
  • the radio frequency (rf) degradation rate in dB/hour, is also improved by more than 100 times for the ammonia pretreated sample as compared to devices on the same split wafer with silicon nitride only.
  • FIG. 4 shows the change in Pout, normalized to its initial value, versus hours of rf bias stress.
  • the pre-treated device shows little drop to 70 hours with a Pin of 7 dBm, while the silicon nitride only device is degrading in the first 16 hours at Pin of 5 dBm, then even more rapidly after Pin was increased to 7 dBm.
  • ammonia plasma provides hydrogen (H) atoms at the AlGaN surface. Passivation of surface defects by hydrogen has been used extensively in the past for silicon and gallium arsenide technologies. Hydrogen has been found to penetrate well into the AlGaN and reduce the density of bulk n-AlGaN deep level traps. These traps are thought to play a leading role in the current collapse phenomena.
  • Ammonia plasma ionizes gas into charged particles that cause the surface to be cleaned and/or charged, as is well known.
  • the chamber used herein for ammonia plasma treatment was a typical for semiconductor equipment manufacturers. Treatment duration was 3 minutes, although it can be higher or lower, but is typically in the range of 3-5 minutes. Other parameters that may be used to produce the desired ammonia plasma include power of 10-35 watts, ammonia flow rate of 30 to 70 sccm. Plasma frequency is 13.56 MHz.
  • Rf stress conditions included conditions for dc bias and a microwave signal that goes into the device.
  • the input power of this signal is typically 10-15 dBM at a frequency of 2-12 GHz.
  • the dc stress conditions include drain voltage typically of 20-30 volts and a drain current typically of 100-300 mA/mm.

Abstract

This invention pertains to an electronic device and to a method for making it. The device is a heterojunction transistor, particularly a high electron mobility transistor, characterized by presence of a 2 DEG channel. Transistors of this invention contain an AlGaN barrier and a GaN buffer, with the channel disposed, when present, at the interface of the barrier and the buffer. Surface treated with ammonia plasma resembles untreated surface. The method pertains to treatment of the device with ammonia plasma prior to passivation to extend reliability of the device beyond a period of time on the order of 300 hours of operation, the device typically being a 2 DEG AlGaN/GaN high electron mobility transistor with essentially no gate lag and with essentially no rf power output degradation.

Description

    CROSS-REFERENCE TO RELATED APPLICATIONS
  • This application is a divisional application of U.S. application Ser. No. 11/311,592, filed Dec. 9, 2005.
  • BACKGROUND OF THE INVENTION
  • 1. Field of the Invention
  • This invention pertains to improving reliability of heterojunction transistors, particularly high electron mobility transistors, with an ammonia plasma pretreatment prior to passivation.
  • 2. Description of Related Art
  • Prior methods which have been used to prepare processed AlGaN/GaN high electron mobility transistors (HEMTs) for reliable operation in the past have included using no passivation at all, or direct deposition of a variety of electrically insulating materials intended to passivate surface states. These material films can be deposited by such processes as plasma enhanced chemical vapor deposition. Silicon nitride (SiN) is one of the most commonly used surface passivating films for AlGaN/GaN HEMTs and can be deposited onto the device by the aforementioned method. However, silicon nitride passivation, while an improvement over no passivation at all, still results in a decrease in performance of the device after dc and rf bias stress. This is a significant limitation and disadvantage in the reliability of AlGaN/GaN HEMT electronic devices.
  • AlGaN/GaN high electron mobility transistors have shown exceptional microwave power output densities, with a recently reported continuous wave power density of 30 W/mm and 50% power added efficiency at a frequency of 8 GHz, In addition, a 36-mm gate-width GaN HEMT has been demonstrated with a total power output of 150 W and a power added efficiency of 54%. However, device reliability remains a major concern for III-N HEMTs. In AlGaN/GaN HEMTs, degradation of the dc, transient, and microwave characteristics are often seen after relatively short periods of normal device operation. Although reliability is improving, microwave power output typically degrades by more than 1 dB in less than 1000 hours of operation.
  • OBJECTS AND BRIEF SUMMARY OF THE INVENTION
  • It is an object of this invention to pretreat an AlGaN/GaN heterojunction field effect transistor with ammonia plasma prior to passivation in order to improve reliability thereof.
  • Another object of this invention is to pretreat an AlGaN/GaN transistor with a low-power ammonia plasma prior to silicon nitride deposition for high power applications.
  • Another object of this invention is to improve reliability of an AlGaN/Gan transistor adapted for use in radars and communication equipment.
  • Another object of this invention is to improve reliability of AlGaN/GaN HEMTS characterized by the presence of 2 DEG channel.
  • Another object of this invention is prevention of drain current collapse caused by electron traps.
  • Another object of this invention relates to reduction of surface and bulk traps in high power and high electron mobility AlGaN/GaN heterojunction transistors that can potentially operate at voltages exceeding 100 volts and with electron mobility in excess of 1000 cm2/v sec.
  • These and other objects of this invention can be attained by pretreatment of a 2 DEG AlGaN/GaN heterojunction transistor with a low-power ammonia plasma prior to passivation.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 is a cross-sectional schematic representation of a high mobility transistor with AlGaN, GaN and doped GaN layers deposited on a silicon carbide substrate.
  • FIGS. 2 (a) and (b) show induced current collapse of unpassivated HEMT in (a) before stress and after stress and in (b) of passivated HEMT devices with silicon nitride only and with silicon nitride passivation, stressed for 60 hours and 176 hours, respectively.
  • FIG. 3 is a plot of normalized Drain Current versus Time, showing drain current response to pulsed gate voltage, in (a) with no passivation; in (b) for the same device after 64-hour stress; in (c) silicon nitride passivated device after 80-hour stress; and in (d) a device pretreated with ammonia plasma and passivated with silicon nitride, after 176-hour stress.
  • FIG. 4 is a plot of power _Pout versus Time showing rf output degradation of (a) passivated device with silicon nitride only and (b) pre-treated with ammonia plasma and coated or pre-treated with silicon nitride wherein stress conditions were 20v, 200 mA/mm operated at 2 GHz at 1 dB compression of the gain.
  • DETAILED DESCRIPTION OF THE INVENTION
  • The purpose of this invention, in a preferred embodiment, is to improve the reliability of aluminum gallium nitride/gallium nitride (AlGaN/GaN) high electron mobility transistors by incorporating an ammonia (NH3) plasma pre-treatment prior to silicon nitride (SiN) passivation of the heterojunction transistors after all other processing has been completed.
  • This invention pertains to an electronic device and to a method for making it. The device is a heterojunction transistor, particularly a high electron mobility transistor characterized by the presence of a 2 DEG channel. Transistors of this invention contain an AlGaN barrier and a GaN buffer, with the channel disposed, when present, at the interface of the barrier and the buffer. The method pertains to treatment of the device with ammonia plasma prior to passivation to extend reliability of the device beyond a period of time on the order of 300 hours of operation, the device typically being a 2 DEG AlGaN/GaN high electron mobility transistor with essentially no gate lag and with essentially no rf power output degradation.
  • Pursuant to one embodiment of the method, an in-situ ammonia plasma treatment is used before a silicon nitride deposition on an Alx Ga1-xN/GaN (where x is 0.20 to 0.30), after all other processing has been completed. The ammonia plasma pretreatment and the silicon nitride deposition can both be performed in a plasma enhanced chemical vapor deposition system. The substrate temperature is maintained at 250° C. for both. For the ammonia plasma pretreatment, a relatively low 35 W power level is typically used. An example of resulting process parameters are 200 mT chamber pressure, 400 sccm N2+SiH4 (95:5) gas flow, 9 sccm ammonia gas flow, 35 W ICP power, and OW RIE power. A silicon nitride film thickness of 750 A is adequate, with an optical index (n) of approximately 2.0, which indicates the approximate composition of the Si3N4 passivation layer.
  • The nitride deposition process was performed after all of the processing steps and was followed by etching openings to the metal contacts and deposition and patterning of a Ti—Au overlay metal. The ammonia plasma pretreatment and the silicon nitride deposition were performed in an inductively coupled plasma (ICP) configured plasma-enhanced chemical vapor deposition system with a bottom electrode diameter of 8 inches. The silicon nitride film, using about 5% by volume SiH4 in a balance of N2, was formed using a SiH4:NH3:N2 plasma recipe (N2+SiH4 of 300 to 400 sccm; NH3 of 9 to 16 sccm). The substrate temperature was maintained at 250° C. for both the ammonia plasma pretreatment and the silicon nitride deposition processes. The silicon nitride film thickness and the refractive index were measured by ellipsometry, and were 740-800 A and 2.03-2.09, respectively, for different device runs. For the pretreatment, the chamber pressure was 50 mT and the duration was 180 seconds. The ICP power was set to 35 W at 13.56 MHz, while the bottom electrode was set to 0 W.
  • The invention can be described in connection with FIGS. 1-4 wherein FIG. 1 shows a cross-sectional schematic transistor 10 containing barrier layer 12 disposed on channel 14, which is followed by channel/buffer layer 16, which in turn is disposed on buffer layer 17, and which in turn is disposed on substrate 18. The substrate supports all of the layers of the transistor. The barrier layer is AlGaN and the buffer/channel layer is GaN with the channel layer being at the interface of the barrier and the buffer/channel layers. The channel has a thickness on the order of 50 A to 100 A. It is the 2 DEG channel layer that characterizes a high electron mobility transistor, with electron mobility being in excess of 1000 cm2/V sec. There is a layer of AlN between the buffer/layer and the substrate layers. The 2-DEG is formed at the interface of the buffer/channel and the barrier layers.
  • Completing the schematic transistor of FIG. 1 is contact 20 which provides electrical connection to source 24, barrier layer 12, and buffer/channel layer 16. Likewise, contact 22 provides electrical connection to drain 26, barrier layer 12, and buffer/channel layer 16. Source 24, drain 26, and gate 28 are disposed in top layer 30. Purpose of the source is to provide electrons to the transistor device. These electrons flow through the interface 2 DEG between the barrier layer and the buffer/channel layer to the drain. The gate controls the flow of these electrons through the 2 DEG. The source, the drain and the ohmic contacts 20, 22, 24 and 26 are typically Ti—Al—Ni—Au and the gate is typically Ni—Au. Typical barrier layer thickness is 200 A 300 A, typical channel layer thickness is 50 A to 100 A, typical buffer/channel layer thickness is 1 μm to 3 μm, typical buffer layer thickness is 500 A to 1500 A and typical substrate thickness is 1 μm to 2 μm.
  • Shown in FIGS. 2 (a) and (b) are the measured drain current for three consecutive sweeps of VDS from 0 to 30V with VGS held at 0 V. The characteristics in FIG. 2 (a) are for an AlGaN/GaN HEMT without silicon nitride passivation prior to dc bias stress. For the non-stressed device (solid lines), the three traces are nearly coincident, as they should be. But after dc bias stress for 64 hours with VDS=30V and IDS=200 mA/mm (dashed lines), the second and third traces depart significantly from the first trace. This reduction in drain current for the second and third traces is due to trapped charge in the structure as a result of hot electron injection caused at high drain voltages during the first sweep. This effect is present in the device after stress due to the generation or activation of defects during the 64 hour dc bias stress. It can be see in FIG. 2 (b), that a silicon nitride passivation layer does little to suppress this effect (dashed lines). But the key result, shown in the solid lines, is that an ammonia plasma treatment prior to passivation completely eliminates this effect for at least 176 hours of bias stress.
  • Corresponding results are seen with gate lag measurements as shown in FIGS. 3 (a-d). The gate lag measurements are for VDS=1 V and VGS=VTH−2 V, pulsed to VGS=0 V. The drain current pulse shown in each figure is normalized to the steady state value of drain current. The ideal response characteristic is for the pulsed current to rise to the steady state value, as shown in FIG. 2 (d). Only the ammonia plasma plus silicon nitride processed device shows the ideal characteristic after bias stress. These characteristics again indicate that additional trapping levels are present after dc bias stress and that the ammonia plasma step is effective in suppressing their generation.
  • The radio frequency (rf) degradation rate, in dB/hour, is also improved by more than 100 times for the ammonia pretreated sample as compared to devices on the same split wafer with silicon nitride only. FIG. 4 shows the change in Pout, normalized to its initial value, versus hours of rf bias stress. The pre-treated device shows little drop to 70 hours with a Pin of 7 dBm, while the silicon nitride only device is degrading in the first 16 hours at Pin of 5 dBm, then even more rapidly after Pin was increased to 7 dBm.
  • An added benefit of the invention is believed to be that the ammonia plasma provides hydrogen (H) atoms at the AlGaN surface. Passivation of surface defects by hydrogen has been used extensively in the past for silicon and gallium arsenide technologies. Hydrogen has been found to penetrate well into the AlGaN and reduce the density of bulk n-AlGaN deep level traps. These traps are thought to play a leading role in the current collapse phenomena.
  • Ammonia plasma ionizes gas into charged particles that cause the surface to be cleaned and/or charged, as is well known. The chamber used herein for ammonia plasma treatment was a typical for semiconductor equipment manufacturers. Treatment duration was 3 minutes, although it can be higher or lower, but is typically in the range of 3-5 minutes. Other parameters that may be used to produce the desired ammonia plasma include power of 10-35 watts, ammonia flow rate of 30 to 70 sccm. Plasma frequency is 13.56 MHz.
  • Rf stress conditions included conditions for dc bias and a microwave signal that goes into the device. The input power of this signal is typically 10-15 dBM at a frequency of 2-12 GHz. The dc stress conditions include drain voltage typically of 20-30 volts and a drain current typically of 100-300 mA/mm.
  • In conclusion, reliability of AlGaN—GaN high eletron mobility transistors that exhibit induced trapping effects due to extended dc bias or microwave operation has been improved by the incorporation of an ammonia plasma treatment prior to passivation. This processing step suppresses increases in current collapse and eliminates gate lag reductions after extended dc bias and significantly lessens degradation under microwave operation. It is believed that the interaction of the plasma with the exposed surface and H ions and/or atoms diffusion into the epitaxial layers are responsible for the improved device characteristics after extended dc bias and microwave operation.
  • While presently embodiments of the invention have been shown of the novel transistors and treatment with ammonia plasma, and of the several modifications discussed, persons skilled in this art will readily appreciate that various additional changes and modifications can be made without departing from the spirit of the invention as defined and differentiated by the following claims.

Claims (12)

1. A high electron mobility transistor, comprising:
a substrate;
a GaN buffer layer disposed on the substrate;
an AlGaN barrier layer disposed on the GaN buffer layer such that a 2 DEG channel is disposed at the interface of the AlGaN barrier layer and GaN buffer layer; and
a passivation layer disposed on the AlGaN barrier layer, wherein an upper surface of the AlGaN barrier layer has been pre-treated with an ammonia plasma prior to a deposition of the passivation layer.
2. The transistor of claim 1, wherein the transistor has essentially no measurable drain current collapse for up to about 176 hours of dc bias stress.
3. The transistor of claim 1, wherein the transistor has essentially no measurable gate lag for up to about 176 hours of dc bias stress.
4. The transistor of claim 2, wherein the dc bias stress is characterized by a drain current of 100-300 mA/mm and a drain voltage of about 23-30 volts.
5. The transistor of claim 2, wherein the dc bias stress is provided by a microwave signal having an input power Pin of 5-20 dBm at a frequency of 2-12 GHz.
6. The transistor of claim 1, wherein the AlGaN barrier layer is about 150 A to 300 A thick.
7. The transistor of claim 1, wherein the GaN buffer layer is about 5000 μm to 15,000 μm thick.
8. The transistor of claim 1, wherein the transistor has experienced essentially no decrease in rf power output (Pout) up to about 70 hours.
9. The transistor of claim 1, wherein the AlGaN barrier layer is made from AlxGa1-xN, wherein 0.15≦x≦0.40.
10. The transistor of claim 1, wherein the rate of degradation of microwave power output, while under continuous microwave operation, is at least 100 times smaller than a conventional high electron mobility transistor that is not pre-treated with ammonia plasma.
11. The transistor of claim 1, wherein the transistor has electron mobility in excess of 1000 cm2/V sec.
12. The transistor of claim 1, further comprising a AlN buffer layer disposed between the GaN buffer layer and the substrate.
US11/962,259 2005-12-09 2007-12-21 SILICON NITRIDE PASSIVATION WITH AMMONIA PLASMA PRETREAMENT FOR IMPROVING RELIABILITY OF AlGaN/GaN HEMTs Abandoned US20080105880A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US11/962,259 US20080105880A1 (en) 2005-12-09 2007-12-21 SILICON NITRIDE PASSIVATION WITH AMMONIA PLASMA PRETREAMENT FOR IMPROVING RELIABILITY OF AlGaN/GaN HEMTs

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/311,592 US7338826B2 (en) 2005-12-09 2005-12-09 Silicon nitride passivation with ammonia plasma pretreatment for improving reliability of AlGaN/GaN HEMTs
US11/962,259 US20080105880A1 (en) 2005-12-09 2007-12-21 SILICON NITRIDE PASSIVATION WITH AMMONIA PLASMA PRETREAMENT FOR IMPROVING RELIABILITY OF AlGaN/GaN HEMTs

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US11/311,592 Division US7338826B2 (en) 2005-12-09 2005-12-09 Silicon nitride passivation with ammonia plasma pretreatment for improving reliability of AlGaN/GaN HEMTs

Publications (1)

Publication Number Publication Date
US20080105880A1 true US20080105880A1 (en) 2008-05-08

Family

ID=38138404

Family Applications (2)

Application Number Title Priority Date Filing Date
US11/311,592 Expired - Fee Related US7338826B2 (en) 2005-12-09 2005-12-09 Silicon nitride passivation with ammonia plasma pretreatment for improving reliability of AlGaN/GaN HEMTs
US11/962,259 Abandoned US20080105880A1 (en) 2005-12-09 2007-12-21 SILICON NITRIDE PASSIVATION WITH AMMONIA PLASMA PRETREAMENT FOR IMPROVING RELIABILITY OF AlGaN/GaN HEMTs

Family Applications Before (1)

Application Number Title Priority Date Filing Date
US11/311,592 Expired - Fee Related US7338826B2 (en) 2005-12-09 2005-12-09 Silicon nitride passivation with ammonia plasma pretreatment for improving reliability of AlGaN/GaN HEMTs

Country Status (1)

Country Link
US (2) US7338826B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100304042A1 (en) * 2009-05-31 2010-12-02 Hsiu-Lien Liao Method for forming superhigh stress layer
US20140318443A1 (en) * 2011-07-25 2014-10-30 Manutius Ip Inc. Nucleation of aluminum nitride on a silicon substrate using an ammonia preflow
US8921220B2 (en) 2012-03-23 2014-12-30 Samsung Electronics Co., Ltd. Selective low-temperature ohmic contact formation method for group III-nitride heterojunction structured device
US9117890B2 (en) 2012-10-09 2015-08-25 Samsung Electronics Co., Ltd. High-electron mobility transistor and method of manufacturing the same
US20170373177A1 (en) * 2016-06-27 2017-12-28 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Semiconductor Device

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4691060B2 (en) * 2007-03-23 2011-06-01 古河電気工業株式会社 GaN-based semiconductor devices
US8026596B2 (en) * 2007-08-15 2011-09-27 International Rectifier Corporation Thermal designs of packaged gallium nitride material devices and methods of packaging
CN102484067A (en) 2009-06-26 2012-05-30 康奈尔大学 Method for forming iii-v semiconductor structures including aluminum-silicon nitride passivation
CN102484070B (en) 2009-06-26 2014-12-10 康奈尔大学 Chemical vapor deposition process for aluminum silicon nitride
JP5136867B2 (en) * 2011-02-03 2013-02-06 次世代パワーデバイス技術研究組合 Semiconductor substrate, semiconductor device, and semiconductor substrate manufacturing method
TWI500157B (en) * 2012-08-09 2015-09-11 Univ Nat Central Field effect transistor device and method for fabricating the same
WO2014066740A1 (en) 2012-10-26 2014-05-01 Element Six Technologies Us Corporation Semiconductor devices with improved reliability and operating life and methods of manufacturing the same
US9018056B2 (en) * 2013-03-15 2015-04-28 The United States Of America, As Represented By The Secretary Of The Navy Complementary field effect transistors using gallium polar and nitrogen polar III-nitride material
US9231064B1 (en) * 2014-08-12 2016-01-05 Raytheon Company Double heterojunction group III-nitride structures
KR102266615B1 (en) 2014-11-17 2021-06-21 삼성전자주식회사 Semiconductor device having field effect transistors and methods of forming the same
KR101750158B1 (en) * 2014-12-26 2017-06-22 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 Hemt-compatible lateral rectifier structure
JP6268229B2 (en) * 2016-06-27 2018-01-24 株式会社サイオクス Nitride semiconductor laminate, method for producing nitride semiconductor laminate, method for producing semiconductor laminate, and method for inspecting semiconductor laminate
JP6838257B2 (en) * 2017-01-06 2021-03-03 住友電工デバイス・イノベーション株式会社 Semiconductor device
CN108091687B (en) * 2017-12-22 2020-10-27 大连芯冠科技有限公司 GaNHEMT with plasma passivation layer and preparation method
WO2020167972A1 (en) * 2019-02-14 2020-08-20 Entegris, Inc. Selective deposition of silicon nitride

Citations (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5179029A (en) * 1990-02-07 1993-01-12 At&T Bell Laboratories Hydrogen plasma passivation of GaAs
US5464664A (en) * 1992-06-16 1995-11-07 At&T Ipm Corp. Downstream ammonia plasma passivation of GaAs
US5764673A (en) * 1995-09-25 1998-06-09 Mitsubishi Denki Kabushiki Kaisha Semiconductor light emitting device
US5913149A (en) * 1992-12-31 1999-06-15 Micron Technology, Inc. Method for fabricating stacked layer silicon nitride for low leakage and high capacitance
US20020142622A1 (en) * 2001-03-28 2002-10-03 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device having buried metal wiring
US20030017692A1 (en) * 1999-08-10 2003-01-23 Hitachi, Ltd. Semiconductor integrated circuit device and manufacturing method of semiconductor integrated circuit device
US20030020092A1 (en) * 2001-07-24 2003-01-30 Primit Parikh Insulating gate AlGaN/GaN HEMT
US20030157815A1 (en) * 2000-08-30 2003-08-21 Weimer Ronald A. Ammonia gas passivation on nitride encapsulated devices
US6737683B2 (en) * 2002-02-28 2004-05-18 Matsushita Electric Industrial Co., Ltd. Semiconductor device composed of a group III-V nitride semiconductor
US20040232440A1 (en) * 2003-05-21 2004-11-25 Sanken Electric Co., Ltd. Compound semiconductor substrates and method of fabrication
US20050258451A1 (en) * 2004-05-20 2005-11-24 Saxler Adam W Methods of fabricating nitride-based transistors having regrown ohmic contact regions and nitride-based transistors having regrown ohmic contact regions
US20060076577A1 (en) * 2004-09-30 2006-04-13 Boos John B High electron mobility transistors with Sb-based channels
US20060108606A1 (en) * 2004-11-23 2006-05-25 Saxler Adam W Cap layers and/or passivation layers for nitride-based transistors, transistor structures and methods of fabricating same
US20060226412A1 (en) * 2005-04-11 2006-10-12 Saxler Adam W Thick semi-insulating or insulating epitaxial gallium nitride layers and devices incorporating same

Patent Citations (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5179029A (en) * 1990-02-07 1993-01-12 At&T Bell Laboratories Hydrogen plasma passivation of GaAs
US5464664A (en) * 1992-06-16 1995-11-07 At&T Ipm Corp. Downstream ammonia plasma passivation of GaAs
US5913149A (en) * 1992-12-31 1999-06-15 Micron Technology, Inc. Method for fabricating stacked layer silicon nitride for low leakage and high capacitance
US5764673A (en) * 1995-09-25 1998-06-09 Mitsubishi Denki Kabushiki Kaisha Semiconductor light emitting device
US20030017692A1 (en) * 1999-08-10 2003-01-23 Hitachi, Ltd. Semiconductor integrated circuit device and manufacturing method of semiconductor integrated circuit device
US20030157815A1 (en) * 2000-08-30 2003-08-21 Weimer Ronald A. Ammonia gas passivation on nitride encapsulated devices
US20020142622A1 (en) * 2001-03-28 2002-10-03 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device having buried metal wiring
US20030020092A1 (en) * 2001-07-24 2003-01-30 Primit Parikh Insulating gate AlGaN/GaN HEMT
US6737683B2 (en) * 2002-02-28 2004-05-18 Matsushita Electric Industrial Co., Ltd. Semiconductor device composed of a group III-V nitride semiconductor
US7122451B2 (en) * 2002-02-28 2006-10-17 Matsushita Electric Industrial Co., Ltd. Method for fabricating a semiconductor device including exposing a group III-V semiconductor to an ammonia plasma
US20040232440A1 (en) * 2003-05-21 2004-11-25 Sanken Electric Co., Ltd. Compound semiconductor substrates and method of fabrication
US20050258451A1 (en) * 2004-05-20 2005-11-24 Saxler Adam W Methods of fabricating nitride-based transistors having regrown ohmic contact regions and nitride-based transistors having regrown ohmic contact regions
US20060076577A1 (en) * 2004-09-30 2006-04-13 Boos John B High electron mobility transistors with Sb-based channels
US20060108606A1 (en) * 2004-11-23 2006-05-25 Saxler Adam W Cap layers and/or passivation layers for nitride-based transistors, transistor structures and methods of fabricating same
US20060226412A1 (en) * 2005-04-11 2006-10-12 Saxler Adam W Thick semi-insulating or insulating epitaxial gallium nitride layers and devices incorporating same

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100304042A1 (en) * 2009-05-31 2010-12-02 Hsiu-Lien Liao Method for forming superhigh stress layer
US20140318443A1 (en) * 2011-07-25 2014-10-30 Manutius Ip Inc. Nucleation of aluminum nitride on a silicon substrate using an ammonia preflow
US9617656B2 (en) * 2011-07-25 2017-04-11 Toshiba Corporation Nucleation of aluminum nitride on a silicon substrate using an ammonia preflow
US10174439B2 (en) 2011-07-25 2019-01-08 Samsung Electronics Co., Ltd. Nucleation of aluminum nitride on a silicon substrate using an ammonia preflow
US8921220B2 (en) 2012-03-23 2014-12-30 Samsung Electronics Co., Ltd. Selective low-temperature ohmic contact formation method for group III-nitride heterojunction structured device
US9117890B2 (en) 2012-10-09 2015-08-25 Samsung Electronics Co., Ltd. High-electron mobility transistor and method of manufacturing the same
US20170373177A1 (en) * 2016-06-27 2017-12-28 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Semiconductor Device
US10283630B2 (en) * 2016-06-27 2019-05-07 Fraunhofer-Gesellschaft Zur Forderung Der Angewandten Forschung E.V. Semiconductor device

Also Published As

Publication number Publication date
US20070131970A1 (en) 2007-06-14
US7338826B2 (en) 2008-03-04

Similar Documents

Publication Publication Date Title
US7338826B2 (en) Silicon nitride passivation with ammonia plasma pretreatment for improving reliability of AlGaN/GaN HEMTs
Edwards et al. Improved reliability of AlGaN-GaN HEMTs using an NH/sub 3/plasma treatment prior to SiN passivation
Liu et al. Enhanced device performance of AlGaN/GaN HEMTs using HfO2 high-k dielectric for surface passivation and gate oxide
Shen et al. High-power polarization-engineered GaN/AlGaN/GaN HEMTs without surface passivation
KR100710654B1 (en) Group ? nitride based fets and hemts with reduced trapping and method for producing the same
Hashizume et al. Suppression of current collapse in insulated gate AlGaN/GaN heterostructure field-effect transistors using ultrathin Al 2 O 3 dielectric
Tan et al. Surface leakage currents in SiN/sub x/passivated AlGaN/GaN HFETs
US7851284B2 (en) Method for making GaN-based high electron mobility transistor
US8354312B2 (en) Semiconductor device fabrication method
TWI450342B (en) Compound semiconductor device and method of manufacturing the same
Chumbes et al. Microwave performance of AlGaN/GaN metal insulator semiconductor field effect transistors on sapphire substrates
Thompson et al. Performance of the AlGaN HEMT structure with a gate extension
Chu et al. Plasma treatment for leakage reduction in AlGaN/GaN and GaN Schottky contacts
Gassoumi et al. Evidence of surface states for AlGaN/GaN/SiC HEMTs passivated Si 3 N 4 by CDLTS
Pei et al. Recessed slant gate AlGaN/GaN high electron mobility transistors with 20.9 W/mm at 10 GHz
US20090001381A1 (en) Semiconductor device
JP2021526308A (en) Semiconductor devices and their manufacturing methods
US20130306978A1 (en) Passivation of group iii-nitride heterojunction devices
US9960266B2 (en) Damage-free plasma-enhanced CVD passivation of AlGaN/GaN high electron mobility transistors
Guo et al. Suppression of interface states between nitride-based gate dielectrics and ultrathin-barrier AlGaN/GaN heterostructure with in situ remote plasma pretreatments
Pei et al. Effect of dielectric thickness on power performance of AlGaN/GaN HEMTs
Malmros et al. Evaluation of an InAlN/AlN/GaN HEMT with Ta‐based ohmic contacts and PECVD SiN passivation
Jessen et al. RF power measurements of InAlN/GaN unstrained HEMTs on SiC substrates at 10 GHz
Tilak et al. Effect of passivation on AlGaN/GaN HEMT device performance
Amir et al. Performance Enhancement of AlGaN/GaN HEMT via Trap-State Improvement Using O $ _ {\text {2}} $ Plasma Treatment

Legal Events

Date Code Title Description
STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION