US20110156000A1 - Method of manufacturing a semiconductor device and semiconductor device - Google Patents

Method of manufacturing a semiconductor device and semiconductor device Download PDF

Info

Publication number
US20110156000A1
US20110156000A1 US12/980,225 US98022510A US2011156000A1 US 20110156000 A1 US20110156000 A1 US 20110156000A1 US 98022510 A US98022510 A US 98022510A US 2011156000 A1 US2011156000 A1 US 2011156000A1
Authority
US
United States
Prior art keywords
layer
transmission layer
transmission
semiconductor device
textured surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US12/980,225
Inventor
Kai Cheng
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Interuniversitair Microelektronica Centrum vzw IMEC
Original Assignee
Interuniversitair Microelektronica Centrum vzw IMEC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Interuniversitair Microelektronica Centrum vzw IMEC filed Critical Interuniversitair Microelektronica Centrum vzw IMEC
Priority to US12/980,225 priority Critical patent/US20110156000A1/en
Assigned to IMEC reassignment IMEC ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: CHENG, KAI
Publication of US20110156000A1 publication Critical patent/US20110156000A1/en
Priority to US14/579,889 priority patent/US10461220B2/en
Abandoned legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22Roughened surfaces, e.g. at the interface between epitaxial layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02587Structure
    • H01L21/0259Microstructure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02636Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639Preparation of substrate for selective deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/16Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
    • H01L33/18Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous within the light emitting region
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of group III and group V of the periodic system
    • H01L33/32Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
    • H01L21/0254Nitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02587Structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02609Crystal orientation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages
    • H01L2933/0058Processes relating to semiconductor body packages relating to optical field-shaping elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0091Scattering means in or on the semiconductor body or semiconductor body package
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0236Special surface textures

Abstract

A method of manufacturing a semiconductor device and the device resulted thereof is disclosed. In one aspect, the device has a heterogeneous layer stack of one or more III-V type materials, at least one transmission layer of the layer stack having a roughened or textured surface for enhancement of light transmission. The method includes (a) growing the transmission layer of a III-V type material, (b) providing a mask layer on the transmission layer, the mask layer leaving first portions of the transmission layer exposed, and (c) partially decomposing the first exposed portions of the transmission layer. Suitably redeposition occurs in a single step with decomposition, so as to obtain a textured surface based on crystal facets of a plurality of grown crystals. The resulting device has a light-emitting element. The transmission layer hereof is suitably present at the top side.

Description

    CROSS REFERENCE TO RELATED APPLICATIONS
  • This application claims priority under 35 U.S.C. §119(e) to U.S. provisional patent application 61/293,094 filed on Jan. 7, 2010, which application is hereby incorporated by reference in its entirety.
  • BACKGROUND OF THE INVENTION
  • 1. Field of the Invention
  • The disclosure relates to a method of manufacturing a semiconductor device comprising a GaN-containing heterogeneous layer stack and a roughened surface for light transmission.
  • The disclosure also relates to a semiconductor device comprising a GaN-containing heterogeneous layer stack on a substrate, the stack comprising a n-type doped layer and a p-type doped layer, the stack having a GaN top layer with first areas having a roughened surface suitable for light transmission.
  • 2. Description of the Related Technology
  • It is known in the art that the light emission from an electroluminescent device or from a light emitting semiconductor diode (a LED) is limited by the total internal reflection occurring at the interface between the semiconductor substrate wherein the device is fabricated and the surrounding medium. Mostly emission of the light to air, with refractive index of unity, is intended. The semiconductor typically has a refractive index ns of 2 to 4. For instance, the refractive index of GaN and AlN are 2.46 and 2 respectively. Snel's law determines that only photons arriving at the semiconductor-air interface with an angle smaller than a critical angle θc=aresin (1/ns) can espace to the air. All other photons are totally reflected at the semiconductor-air interface, and therefore remain in the semiconductor substrate, until eventually they are re-absorbed. Typically, the critical angle for total internal reflection is in the range of 10-20° C. Hence, total internal reflection limits the number of photons escaping the semiconductor substrate to those photons arriving at the semiconductor-air interface with an angle below the critical angle. Only a few percent of the photons generated inside the semiconductor substrate comply with this condition. In order to extract more light from LEDs, efforts have been ongoing for several decades that included wet-chemical etching of a LED surface, employing periodic photonic crystals, planar graded refractive index antireflection coatings, patterning of substrates, particularly of sapphire substrates, and shaping of LED chips.
  • EP0977280 discloses the provision of a roughened surface to improve such light transmission, in particular, light emission, from a semiconductor device such as a LED. A roughened surface provides other angles making that light emitting in an angle relatively perpendicular to the substrate plane still can leave the substrate. Moreover, these angles lead to reflection and recombination with an improved chance of subsequent emission. This leads to overall quantum efficiencies in the order of 20 to 30%. The surface roughening is therein achieved by application of a substantially random distribution of particles on the surface, by reducing the size of the particles and thereafter etching the surface while using the particles as a mask. Preferably, use is made of a monolayer of closed packed colloidal particles. The diameter is reduced by application of an oxygen plasma. The size of the colloidal particles is not strongly critical, but preferentially they have a diameter λs that is 50% to 200% of the wavelength of the light in the semiconductor (λs0/ns, with λ0 the wavelength in vacuum and ns the refractive index of the semiconductor). An alternative is the use of a mask provided by a photoresist. This is particularly relevant for red, near-infrared and infrared LEDs, since for these wavelengths the required texturing features are of the order of 200 nm or larger. This resolution can be achieved by UV or deep UV illumination of a suitable photoresist. EP0977280 discusses specifically GaAs-type layers. However fabrication of submicron patterns by lithography and plasma dry etching is costly, and the etching process could damage the surface of GaN.
  • Wet-chemical texturing of an N-face GaN (000-1) surface of vertical-structured LEDs is disclosed in WO2005/064666. The N-face is the bottom GaN layer when seen in the order of processing. This etching occurs after transfer of the LED to another carrier and removal of the processing substrate, typically sapphire. The p-type doped GaN layer that is the top layer when seen in the order of processing, is however too thin for carrying out the texturing. Wet-chemical etching is known to be very efficient in enhancing light extraction, and hence, is widely used in high-power commercial LEDs. However, KOH-based wet-chemical etching needs additional process steps such as deposition and removal of a protection layer covering ohmic contact to the n-type GaN. In addition, due to crystal-plane-dependent etching rates, it is very difficult to form non-random, optimized or designed features.
  • One alternative method is disclosed in U.S. Pat. No. 7,071,494. Use is made herein of specific growth properties of AlN and AlGaN with an Al-content of at least 50%. Growth herein may occur initially in the form of well textured regions (e.g. crystallic islands) instead of a rather randomly oriented matrix, such as explained in M. Auger et al, Surface and Coatings Technology 180-181 (2004), 140-144. Thereafter, the material is annealed such that the material becomes crystalline. Subsequently, portions of the annealed layer that surround large stable grains are optionally etched away with H2, N2, NH3, HCl and mixtures thereof to form a textured layer. In embodiments where the growth favors three dimensional growth (i.e. crystallic islands), annealing may be sufficient to form the textured layer. A planarizing layer is deposited on top of the textured layer.
  • The result of this known method is a textured surface of large crystal grains of AlN or Al-rich AlGaN, which is overgrown by a planarizing layer of GaN. We observe that the planarizing layer herein effectively reduces the refractive effect of the textured surface, as the difference of the refractive indices of AlN and GaN is less than that between AlN and air or an organic material. Apparently, the insight of U.S. Pat. No. 7,071,494 is that the combination of a textured surface with a planarizing layer provides a suitable surface roughness.
  • It is however a disadvantage of this known method that the combination of a textured surface of AlN or Al-rich AlGaN and a planarizing surface is a very complex and thus expensive structure for obtaining a roughened surface. Moreover, this method of creating a roughened surface shares with the wet-etching the disadvantage that it is very difficult to form non-random, optimized or designed features. As admitted in U.S. Pat. No. 7,071,494, the large, stable grains will survive the etching process, whereas other portions are etched away.
  • SUMMARY OF CERTAIN INVENTIVE ASPECTS
  • A first inventive aspect relates to a method of manufacturing a semiconductor device comprising a heterogeneous layer stack of one or more III-V type materials, at least one transmission layer of the layer stack having a roughened surface for enhancement of light transmission. The method comprises 1) growing the transmission layer of a III-V type material, 2) providing a mask layer on the transmission layer, the mask layer leaving first portions of the transmission layer exposed, and 3) partially decomposing the first exposed portions of the transmission layer, therewith obtaining the roughened surface.
  • The inventor has been found to his surprise that the decomposition step results in the formation of an adequate roughened surface, but only if a mask layer is present on the transmission layer, first portions of the transmission layer being exposed.
  • In a most preferred embodiment, redeposition of the III-V material is carried out generating crystal facets defining a textured surface. The formed crystal facets overcome a major disadvantage of the prior art: the size is relatively uniform. Moreover, the method can be tuned so as to vary density and size of the crystal facets. Furthermore, the transmission layer with crystal facets is stable.
  • The redeposition suitably occurs in a single step with the decomposition of the transmission layer. This is particularly achieved by tuning the composition of the atmosphere in which the single step decomposition and redeposition is carried out. Particularly, this is a nitrogen-rich atmosphere. Atoms liberated by the decomposition are then redeposited, but at another location on the surface that is more energetically favorable.
  • Suitable materials for the transmission layer are materials that have a relatively low decomposition temperature, particularly lower than about 1250° C. Use of such materials for the transmission layer enabled to carry out the step in a controlled manner. Moreover, damage to other layers within the heterogeneous layer stack is kept at a low level. Preferably, the step is carried out at a lower temperature than about 1250° C., for instance in a range of about 800-1150° C. Suitable materials include GaN, InN, InGaN and Al-poor alloys of these materials, such as AlxGa1−xN, with x≦0.3. In the suitable embodiment that the transmission layer forms also the p-type doped layer of the light emitting diode, the decomposition step may be combined with one of the anneal steps typically carried out on the p-type doped layer. This is however not necessary
  • In a most suitable embodiment, the transmission layer is present on a stop layer. The stop layer remains intact when decomposing the transmission layer. The use of such a stop layer is a gentle manner of defining an end point to the decomposition treatment. As such, it can further be exploited to define the size of the crystals. Suitably, the stop layer comprises a material different from the transmission layer. One advantageous implementation hereof is that the material of the stop layer has a decomposition temperature higher than that of the transmission layer. A most suitable combination is that of a transmission layer of GaN and a stop layer of AlGaN.
  • According to a second aspect of the disclosure, a semiconductor device is provided that comprises a heterogeneous layer stack of one or more III-V type materials. At least one transmission layer of the layer stack has a roughened surface for enhancement of light transmission obtainable by the method.
  • According to a third aspect of the disclosure, a semiconductor device is provided that comprises a heterogeneous layer stack of one or more III-V type materials. At least one transmission layer of the layer stack has a roughened or textured surface for enhancement of light transmission. Herein the surface is a textured surface defined by crystal facets of a plurality of crystals grown in first exposed portions of the transmission layer, the plurality being in a range of about 0.01-1000.106/mm2.
  • In one aspect, the transmission layer is provided with a textured surface in the form of a plurality of crystals having crystal facets. The plurality is particularly a large number, e.g. about 0.01-1000.106/mm2, preferably about 0.1-100.106/mm2, particularly about 1-50.106/mm2. Suitably, the diameter of a single crystal is in the range of about 50 to 800 nm. Therewith, the surface is textured in a homogeneous manner, e.g. the crystals are sufficiently fine, and nevertheless with sufficiently large crystal facets to increase the transmission of radiation. The crystals are grown here, as a consequence of the redeposition step. This in-situ and actual growth results in better and more uniform shapes than obtained when the textured surface are created by etching.
  • In one particular embodiment, the textured surface is made to be optically transparent for a selected range of wavelengths. This selected range of wavelengths suitably corresponds to the wavelength of the radiation emitted by the semiconductor device, i.e. any light emitting diode or transistor therein. The transparency for other wavelengths is then typically less than the transparency for the selected range. The range of wavelengths may be defined by tuning the formation of the crystals, and particularly thereof the depth to which the transmission layer is decomposed for the formation of the textured surface. Optionally, the transmission layer is present on a stop layer that defines the depth to which the transmission layer is decomposed. The wavelength may be further tuned by setting the atmosphere in which decomposition occurs (more specifically the nitrogen-content of the atmosphere defining the speed of redeposition). Additionally, the material of the transmission layer can be varied.
  • The textured surface is obtained particularly by decomposition through a mask. In one advantageous embodiment, at least a portion of the area defined by the mask is subsequently used for the provision of a contact. The mask may herein be removed completely and then replaced by a metal contact. Alternatively, holes may be defined through the mask. The mask areas are very suitably for subsequent layer deposition due to the planarity of their surface.
  • As is hereinabove specified with reference to the method, the transmission layer suitably comprises a material with a relatively low decomposition temperature, particularly lower than about 1250° C. Use of such materials for the transmission layer enabled to carry out the step in a controlled manner. Moreover, damage to other layers within the heterogeneous layer stack is kept at a low level. Preferably, the step is carried out at a lower temperature than about 1250° C., for instance in a range of about 800-1150° C. Suitable materials include GaN, InN, InGaN and Al-poor alloys of these materials, such as AlxGa1−xN, with x≦0.3.
  • The device suitably comprises further at least one light emitting element, such as a light emitting diode. Preferably, the light emitting diode is a blue light emitting diode (LED). It has been found that the size of the crystals matches best with blue light, which can be generated most advantageously in GaN-based LEDs. The term blue LED is herein to be understood to refer to a LED able of emitting of blue, violet and/or ultraviolet light, i.e. with a wavelength suitable in the range between about 300 and 500 nm, particularly between about 400 and 500 nm and especially between about 450 and 500 nm.
  • Alternatively, the device may be a solar cell or a hydrogen generator. The latter device is particularly a device based on a InGaN layer that is in operation present within a reservoir of water or an aqueous solution. A junction is then formed between the InGaN and the water. This junction may split water into hydrogen and oxygen, upon provision of a suitable voltage to the InGaN.
  • Suitably, the textured surface is present at a top side of the device when seen in the order of processing. Typically, this top side is the side at which the p-type GaN is present. This evidently has the advantage that it takes away the need of removing the processing substrate. In one implementation the textured surface is covered with a silicon nitride protection layer. Such a silicon nitride layer forms an adequate passivation, and it is optically transparent and has an adequate reflection coefficient. A most suitable version thereof is an in-situ silicon nitride layer, which is a silicon nitride layer that is deposited with chemical vapor deposition, subsequent to other processing. Particularly, it is deposited without an intermediate cooling step to room temperature.
  • In a further implementation, the presence of the textured surface on the top side is combined with the presence of an optical element on the bottom side of the device (e.g. the side of the processing substrate). Such optical element is more particularly a grating or a mirror. This element is intended for reflecting and/or otherwise guiding the generated light. As a result, the light may be directed to the top side, where it adds to the overall efficiency. Moreover, such reflection or guiding suitably changes the orientation of the light. It then may have a higher chance to escape from the element into the air.
  • According to a fourth aspect of the disclosure, an electronic device for confinement of radiation is provided. The radiation is confined into a nanostructure, located within a substrate of the electronic device, by means of surface plasmonic structures on a surface of the substrate. Herein, the surface is a textured surface defined by crystal facets of a plurality of crystals of a transmission layer of a III-V material.
  • It has turned out that a textured surface defined by crystal facets is highly suitable for use as a surface plasmonic structure. In a most suitable implementation, it is thereto covered, at least partially, with an electrically conductive layer, such as a metal, or a conductive nitride or both. The conductive layer is deposited conformally so as not to loose the textured structure. The nanostructure is for instance a cavity or a pore. The textured surface is most suitably prepared by the method. Alternative methods are however not excluded. The nanostructure is suitably defined in an area covered by a mask during the formation of the textured surface. This device is suitably used for the detection of properties of individual molecules, and more particularly biomolecules such as DNA molecules, proteins and the like. Thereto, suitably radiation transmitted through the nanostructure is detected. The principle hereof is described in the non-prepublished application PCT/EP2009/066737 in Applicant's name, which is herein incorporated by reference.
  • In one important embodiment, a light emitting element is present for emission of radiation that is directed to the nanostructure through the surface plasmonic structures. A separate laser is conventionally used as a light source in optical detection. The combination of a light emitting element and the textured surface acting as a surface plasmonic structure may replace the separate laser. This replacement simplifies the set up of such optical detection apparatus and moreover reduces cost considerably.
  • In a further implementation, the electronic device is used in an apparatus further comprising means for translocating molecules through the nanostructure and a detection unit for detecting electromagnetic radiation at least partially generated by excitation of surface plasmon polaritons in the nanostructure and exiting from the nanostructure. The apparatus additionally comprises a light source that is either the light emitting element in the device or an external light source, or a combination of both.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 a-d is a series of diagrammatical, cross-sectional views of stages in the method according to a first embodiment
  • FIG. 2 is a diagrammatical, cross-sectional view of the result of the method according to a second embodiment
  • FIG. 3 a-b show diagrammatical, illustrative view of prior art decomposition;
  • FIG. 4 a-b show diagrammatical, illustrative views of one embodiment of the method, and
  • FIG. 5 is an image made by scanning electromicroscopy (SEM) of the textured surface in accordance with one embodiment.
  • DETAILED DESCRIPTION OF CERTAIN ILLUSTRATIVE EMBODIMENTS
  • The present disclosure will be described with respect to particular embodiments and with reference to certain drawings but the disclosure is not limited thereto but only by the claims. The drawings described are only schematic and are non-limiting. In the drawings, the size of some of the elements may be exaggerated and not drawn on scale for illustrative purposes. The dimensions and the relative dimensions do not correspond to actual reductions to practice of the disclosure. Equal reference numerals in different figures refer to same or like elements.
  • Moreover, the terms top, bottom, over, under and the like in the description and the claims are used for descriptive purposes and not necessarily for describing relative positions. It is to be understood that the terms so used are interchangeable under appropriate circumstances and that the embodiments of the disclosure described herein are capable of operation in other orientations than described or illustrated herein.
  • FIG. 1 a-d is a series of diagrammatical, cross-sectional views of stages in the method according to a first embodiment. The method starts with the configuration of FIG. 1 a comprising a substrate 1 and a transmission layer 2 of a III-V material. The substrate 1 typically comprises a stack of layers of a III-V material which defines a light emitting element. The combination of such layer stack in the substrate 1 with the transmission layer 2 constitutes the heterogeneous layer stack of III-V material as recited in the claims.
  • A suitable configuration of the stack of layers is a quantum well structure interposed between a first device layer that is n-type doped, and a second device layer that is p-type doped. Manufacturing related reasons make that the n-doped layer is usually the bottom layer and the p-doped layer is the top layer. The quantum well structure suitably comprises a stack of alternatingly a first layer and a second layer. Most suitably, the quantum well structure comprises first layers of GaN and second layers of InGaN. The first and the second device layer are typically GaN layers. Suitably, the transmission layer 2 is present on top of the active layer stack, e.g. the quantum well structure and the first and second device layers. It is however not excluded, that the transmission layer is the first or the second device layer.
  • The stack is preferably grown on a silicon substrate, which allows processing in semiconductor fab environments. Good results have been obtained with a silicon (111) substrate, suitably on top of a handling wafer and a buried insulating layer, such a structure also known as an SOI-wafer with a Si(111) device layer. The GaN layers are grown on the (111) silicon, for which a nucleation layer and thereafter a buffer layer are deposited. In order to match the lattice constant of Si(111) as good as possible, it is deemed beneficial that the buffer layer comprises AlxGa1−xN, wherein x is equal or smaller to 1. Suitably, the Al-content decreases with the distance to a top surface of the Si(111) substrate, either gradually or in steps. However, the Si(111) is by no means the only useful substrate material, alternatives including for instance Si(001) and sapphire. Moreover, AlxGa1−xN, wherein x is equal or smaller to 1, is certainly not the only possible buffer layer. The skilled person in the art of GaN epitaxy will be able to find alternatives in the literature.
  • Furthermore, while the p-doped GaN layer may be the top layer in the sequence of grown layers, it is not excluded that the transmission layer is provided on the n-type doped GaN. This is then suitably carried out, after that the top layer is attached to another carrier and the substrate used for processing has been removed at least partially. As a silicon substrate may be removed easily by wet or dry chemical etching, this is a further reason to use a silicon substrate (or SOI) as the processing substrate. The transmission layer 2 may in this case be grown either before the growth of the other layers in the structure or after removal of the processing substrate.
  • It is observed for reasons of clarity that a light emitting diode, in an implementation with a quantum well structure, has been taken as light emitting element in the present description. Another light emitting element, such as a light emitting transistor, and another implementation of a light emitting diode, could be applied as an alternative. Moreover, the III-V material of the layer stack in the above mentioned example comprises GaN and InGaN as functional layers. This is merely an example and other III-V materials and/or a different stack of such materials may be used. Typical examples include AlGaN, InAlGaN.
  • FIG. 1 b shows a second stage in the manufacturing of the device. Herein a mask 4 has been applied on a surface of the transmission layer 2. The mask suitably comprises a dielectric material. Good results have been obtained with SiO2. It is preferably a material onto which no growth of GaN or like materials occurs. The mask layer is provided with a pattern so as to create windows between mask portions. The window defining exposed portions of the transmission layer may have a rectangular, oval, circular or other shape, such as a T-shape. The width of the windows is suitably smaller than about 50 microns and typically larger than about 0.5 microns. Good results have been obtained in first experiments with widths varying from approximately 3 to 20 microns.
  • The transmission layer suitably comprises a material with a relatively low decomposition temperature, particularly lower than about 1250° C. at atmospheric pressure. Use of such materials for the transmission layer enabled to carry out the decomposition step in a controlled manner. Moreover, damage to other layers within the heterogeneous layer stack is kept at a low level. Suitable materials include GaN, InN, InGaN and Al-poor alloys of these materials, such as AlxGa1−xN, with x≦0.3. Layers of AlN and Al-rich AlGaN, for instance AlxGa1−xN, with x≧0.5, have a higher decomposition temperature than about 1250° C. at atmospheric pressure.
  • FIG. 1 c shows a third stage in the manufacturing of the device. Herein, decomposition and suitably also redeposition takes place. Preferably, the step is carried out at a lower temperature than about 1250° C., for instance in a range of about 800-1150° C. Particularly good results have been obtained in the range from about 1000 to 1150° C. It is typically carried out in a Chemical Vapor Deposition reactor, such as typically in use for the growth of III-V materials. The redeposition rate is influenced by setting the nitrogen content in the atmosphere. The nitrogen-content herein particularly refers to nitrogen available for reacting with decomposed Ga into GaN. One suitable manner involves the use of ammonia (NH3). Very good results have been obtained with combinations of ammonia and hydrogen (H2). Mixtures of oxygen and nitrogen could be used alternatively. Preliminary experiments showed that a threshold of the nitrogen content exists: only decomposition (i.e. no redeposition) is found to take place below a threshold level. The actual threshold appears dependent on typical process conditions such as the temperature of operation, the material of the transmission layer, and other gases present in the atmosphere. The equipment in use may further play a role.
  • A plurality of crystals 3 with crystal facets 31 defining the textured surface are thus formed. The crystal facets 31 for instance have a (10-10) or (1-101) orientation in case that the transmission layer comprises GaN. The overall shape of the crystals typically is pyramidal. GaN has a hexagonal structure so that the crystals have a ground plane with a hexagonal shape. Each of the crystal facets then has a triangular shape. It is observed that the actual shape could be different or modified, or at least less perfect. In comparison to a textured surface created by wet-chemical etching it was found that the present structure is more regular. The variation in size, particularly height is reduced, for instance to a standard deviation of less than about 100 nm, preferably less than about 50 nm. The density of crystals is typically reduced, due to the redeposition process in which adsorption occurs at locations with minimum energy, e.g. in an appropriate crystal lattice.
  • FIG. 5 is an image made by scanning electron microscopy (SEM) from a textured surface made in accordance with one embodiment. The black stripes are the masks, in between of which a crystals with crystal facets are present. A scale indicator is included, demonstrating a distance between neighboring masks of approximately about 7 microns in this example. Further measurements on the shown example show that an individual crystal facet had a width of about 353 nm and a height of about 385 nm. Several experiments were carried out with temperatures of 1000 and 1100° C., growth durations of 1 and 10 minutes in an atmosphere of 8 slm NH3 and 7 slm H2. All resulted in the growth of crystals. However, when reducing the NH3 concentration to 2 about slm, merely some roughening was observed.
  • The option of decomposition without redeposition may further be exploited to optimize the shape of the crystals formed in the step. For instance, the generation of the textured surface may be finalized with a step below the threshold level. The decomposition occurring then may give rise to modifications of the overall shape of the textured surface and/or to the size of crystal facets.
  • FIG. 1 d shows the result of a further optional stage. In this further optional stage the decomposition is continued, resulting in a smaller amount of crystals having crystal facets of larger size and having a larger diameter. Since the diameter of the crystals is in the range of the wavelength light (about 300-800 nm), an increase in the diameter of the crystals makes the textured surface more suitable for light transmission of light of larger wavelength (for instance from blue to orange).
  • FIG. 2 shows the result of the manufacturing according to a further embodiment. Herein, a stop layer 5 is present. The stop layer 5 is suitably present on other layers 6 on top of a substrate 1. The stop layer 5 preferably has a decomposition temperature higher than the transmission layer 2. When GaN is chosen as the material of the transmission layer 2, AlN or Al-rich AlGaN is a good choice for the stop layer 5. When InGaN is chosen as the material of the transmission layer 2, AlN, AlGaN, but also GaN may be chosen as the material of the stop layer 5. The stop layer 5 is effective so as to stop the decomposition and redeposition step at a predefined stage of processing. As in the previous embodiment, the transmission layer 2 may be suitably doped to constitute a p-type doped layer that is part of a light emitting layer stack further comprising an n-type doped layer and a quantum well structure. A suitable dopant is for instance Mg. The stop layer 5 is then suitably inserted between p-type doped layer or layers 6 and the transmission layer 2. It is not excluded that both the layer 6 and the transmission layer are p-type doped. Additionally, the stop layer 5 may be p-type doped as well. However, the dopant concentration may vary.
  • The semiconductor device with the textured surface may subsequently be provided with at least one electrode and suitably a protection layer. One suitable implementation for the electrode is the definition in one or more of the areas covered by the mask layer 4. The mask layer 4 could be replaced by one or more metal contact. Stripe-shaped metal contacts are adequate for providing sufficient surface area without hampering transmission of light too much. A suitable metal is for instance a metal that may be applied as underbump metallization (UBM) for subsequent assembly. Typical material include for instance Nickel (Ni), Tin (Sn), Lead (Pb) and alloys of such metals. Instead of replacing the mask layer after the texturing by a metal contact, the mask layer could comprise the metal, or alloy. If desired, the transmission layer 2 may be locally removed, for instance by laser or ebeam irradiation, but alternatively by covering the textured surface with another mask such as a photoresist. Alternatively, dopants may be implanted at the area of the contact. Another suitable implantation involves the provision of an optically transparent, electrically conductive layer on top of the textured surface. A suitable material is for instance indium tin oxide, but tin oxide and electrically conductive polymers may be applied instead.
  • Suitable protection layers include first of all a passivation layer, and additionally a molding compound. Materials for these protection layers are well known in the art and include silicon nitride, polyimide, epoxy.
  • FIGS. 3 a and 3 b, 4 a and 4 b are diagrammatical figures explaining molecular mechanisms behind one embodiment. FIGS. 3 a and 3 b show herein the decomposition without application of a mask. FIGS. 4 a and 4 b show the decomposition and redeposition that occurs when if mask is present.
  • Typically, decomposition of GaN involves sublimation of solid-phase GaN into gaseous GaN (shown as dots 20 in FIG. 3 a). When hydrogen is present in the atmosphere, the sublimation may lead to a reaction with Ga, GaH, N2 and NH3 as reaction products. A careful analysis has been published by M. A. Mastro et al., Phys. Stat. Sol (a), 188 (2001), 467-471, which is incorporated herein by reference. As specified in the article, annealing in H2 at 900° C. resulted in the complete sublimation of the GaN film. FIG. 3 b shows the result wherein a portion 2 a of the transmission layer 2 of GaN has been decomposed by sublimation. It is observed in the article that annealing in an NH3 atmosphere leads to GaN films that are relatively stable.
  • FIGS. 4 a and 4 b show the surprising effect of application of a mask. Now, the mask generates a different process, wherein the annealing, particularly in an atmosphere comprising both hydrogen and ammonia, results in decomposition and redeposition. Herein, sublimation of solid phase GaN into gaseous components 20 still occurs. The available ammonia appears to shift the balance of the sublimation reaction back to solid-phase GaN. However, the GaN (indicated with dots 21) is now incorporated into the lattice of the layer on other positions. In this manner, the more energetically favorable crystal facets 31 are created. Reference is made here to GaN as if it were a molecule that makes a transition from gas phase back into the solid phase. This is not necessarily a physically correct description of the crystallization process. Ga could be a gasphase single atom that only binds with nitrogen upon integration into the crystal lattice.
  • In one suitable embodiment, the transmission layer with the textured surface is used as a surface plasmonic structure, particularly in a method of detection of individual molecules and/or their properties. Thereto, a nanostructure is present in which radiation is confined. The nanostructure is suitably provided with tilted sidewalls. The nanostructure with tilted sidewalls may be or comprise a nanopore with a varying diameter across the membrane, and, in cross-sectional view, a substantially triangular shape. The textured surface is most suitably covered with an electrically conductive layer, for instance a metal such as a noble metal. One therefore may suitably express the method in the embodiment of detection of transmitted radiation as a method comprising the steps of:
  • directing electromagnetic radiation onto the nanostructure in the direction of the first major surface, using thereto the textured layer as a surface plasmonic structure,
  • translocating molecules through the nanostructure, and
  • detecting electromagnetic radiation that exists from the nanostructure away from the second major surface, transmission of electromagnetic radiation through the nanostructure being at least by excitation of surface plasmon polaritons in the nanostructure.
  • The method is particularly suitable for detection of individual molecules. Thereto, the nanostructure is suitably configured to limit the passage of a sample material through the nanostructure to a single molecule at a time. The molecule is for instance a double stranded nucleic acid molecule or a single stranded nucleic acid molecule or a polypeptide molecule or a single ribosome or a cell or a viral particle. The molecule is translocated through the nanostructure by means of any suitable driving force, e.g. by electrophoresis. Radiation originating from at least one light source, such as a laser or a led or another light source. The light interacts with the molecule inside the nanopore 6, this interaction is the basis for biomolecular analysis. Hence the nanopore can be an optical confinement. Suitably, electromagnetic radiation such as light that has been transmitted through the nanopore (rather than only reflected light) is used for the measurements. The detection of the radiation occurs by molecular spectroscopy, and more specifically by Raman spectroscopy, molecular fluorescence spectroscopy or surface enhance infrared absorption spectroscopy. Certain embodiments can involve the use of nanoparticles to enhance the Raman signal obtained from nucleotides. The nanoparticles may be silver or gold nanoparticles, although any nanoparticles capable of providing a surface enhanced Raman spectroscopy (SERS), surface enhanced resonance Raman spectroscopy (SERRS) and/or coherent anti-Stokes Raman spectroscopy (CARS) signal may be used, e.g. Ag, Au, Cu, Al, Ni, Pt, Pd, particularly noble metals.
  • The textured surface is a surface plasmonic structure that can influence the behavior of optically active molecules in several ways. Firstly, due to the focusing of electromagnetic radiation to nanovolumes, molecules can be excited more efficiently. Secondly, the plasmon resonance perturbs the local electromagnetic mode density, modifying the decay rate of local dipole emitters. Such nano-antennas are particularly suitable in case that Raman spectroscopy, molecular fluorescence or surface enhanced infrared absorption spectroscopy is used.
  • In the case, e.g., of Raman spectroscopy, this double effect leads to the well known E4 dependence of the Raman scattering intensity on the local electric field. It further enables probing of vibrational transitions using optical excitation. Additional enhancement can be achieved using resonance Raman (illuminating in resonance with an electronic transition of the target molecule) or coherent anti-stokes Raman scattering (CARS) (a non-linear, 4-wave mixing process). Raman spectroscopy is particularly suitable for sensing segments of larger molecules, such DNA molecules.
  • Preferably, the nanostructure with tilted sidewalls is created such as to create an electromagnetic hotspot. The hotspot is the location where the optical interaction is strongest and where structural or chemical information is harvested. It provides a smaller sensing region than what can be achieved with traditional lens structures or photonic components. The field confining structure provides plasmonic field confinement leading to localization based on gap mode resonance, at the hotspot. As a result, the electromagnetic field gets concentrated in the hotspot. Therewith, the hotspot effectively amplifies the optical signal. The electromagnetic field results from the interaction of the electromagnetic radiation with the matter present. Means for enhancement of the field strength, and thus means for creation of the hotspot, include plasmon carrying metal structures, in particular nano-antennas, and a nanostructure in which cavity effects occur, particularly with a varying diameter. In the latter case, the nanostructure is preferably designed such that the hotspot is present at the position at which the—inner-diameter is smallest. However, alternative shapes of the nanostructure leading to resonance in a limited volume thereof are not excluded.
  • In one embodiment, the textured surface as obtainable with the method is used, wherein the pattern of the mask is defined so as to guide the light towards the nanostructure. For instance, the textured surface has a stripe-shaped surface area with at one end the nanostructure. In a further implementation, all elements (e.g. the light emitting element, the textured layer, the nanostructure and the detection method) are tuned to a single operation wavelength. In a further implementation, the nanostructure may be obtained by selective growth of a GaN layer, as is further elaborated in patent application PCT/EP2009/066739, which is incorporated herein by reference.
  • In a further embodiment, the light source is not an external light source, but is present within the substrate. Light emitted from the light source, typically a light emitting diode, is then transmitted via the textured surface to the nanostructure. While transmission spectroscopy - and hence a nanostructure extending through the substrate—is favorably is used, another form of optical detection is not excluded. While the textured surface may be used as a plasmonic structure to provide a desired orientation to the light, it is not excluded that an additional optical element such as a mirror is used in addition to the textured surface.
  • Though the textured surface obtainable with the method appears most suitable for use as part of a surface plasmonic structure, it is not excluded that a prior art textured surface is used that is obtained with f.i. wet chemical etching with KOH.
  • The foregoing description details certain embodiments of the invention. It will be appreciated, however, that no matter how detailed the foregoing appears in text, the invention may be practiced in many ways. It should be noted that the use of particular terminology when describing certain features or aspects of the invention should not be taken to imply that the terminology is being re-defined herein to be restricted to including any specific characteristics of the features or aspects of the invention with which that terminology is associated.
  • While the above detailed description has shown, described, and pointed out novel features of the invention as applied to various embodiments, it will be understood that various omissions, substitutions, and changes in the form and details of the device or process illustrated may be made by those skilled in the technology without departing from the spirit of the invention. The scope of the invention is indicated by the appended claims rather than by the foregoing description. All changes which come within the meaning and range of equivalency of the claims are to be embraced within their scope.

Claims (19)

1. A method of manufacturing a semiconductor device comprising a heterogeneous layer stack of one or more III-V type materials, at least one transmission layer of the layer stack having a roughened or textured surface for enhancement of light transmission, the method comprising:
growing a transmission layer of a III-V type material;
providing a mask layer on the transmission layer, the mask layer leaving first portions of the transmission layer exposed; and;
partially decomposing the first exposed portions of the transmission layer thereby obtaining a roughened surface.
2. The method according to claim 1, wherein redeposition of the III-V material resulted from the partial decomposition is carried out thereby forming crystal facets defining a textured surface.
3. The method according to claim 2, wherein the redeposition occurs in a single step with the decomposition of the first exposed portions of the transmission layer.
4. The method according to claim 2, wherein the decomposition and redeposition is carried out in an atmosphere comprising nitrogen.
5. The method according to claim 4, wherein the atmosphere comprises ammonia (NH3).
6. The method according to claim 4, wherein the atmosphere further comprises hydrogen (H2).
7. The method according to claim 1, wherein the III-V material has a decomposition temperature at atmospheric pressure of less than 1250° C.
8. The method according to claim 7, wherein the III-V material is chosen from the group of GaN, InGaN, AlxGa1−xN with x≦0.3, AlxInyGa1−x−yN with x≦0.3, y≦1, and InN.
9. The method according to claim 1, wherein the transmission layer is formed on a stop layer that remains intact when decomposing the transmission layer.
10. The method according to claim 9, wherein the stop layer comprises a material different from and with a higher decomposition temperature than the material of the transmission layer.
11. The method according to claim 1, wherein at least part of the mask layer is replaced with at least one metal contact.
12. A semiconductor device manufactured by the method according to claim 1.
13. A semiconductor device comprising:
a substrate; and
a heterogeneous layer stack of one or more III-V type materials formed over the substrate, at least one transmission layer of the layer stack having a roughened or textured surface for enhancement of light transmission, wherein the surface is a textured surface defined by crystal facets of a plurality of crystals grown in first exposed portions of the transmission layer, the plurality of crystals being in the range of 0.01.106 -1000.106 /mm2.
14. The semiconductor device according to claim 13, wherein the transmission layer is present on a stop layer comprising a material different from the material of the transmission layer.
15. The semiconductor device according to claim 13, wherein second portions of the transmission layer have a substantially smooth surface and are covered by a metal contact.
16. The semiconductor device according to claim 15, further comprising a nanostructure within the layer stack, radiation being guided to the nanostructure by the textured surface acting as at least one surface plasmonic structure.
17. The semiconductor device according to claim 13, wherein the III-V material has a decomposition temperature at atmospheric pressure of less than 1250° C., and is chosen from the group of GaN, InGaN, AlxGa1−xN with x≦0.3, AlxInyGa1−x−yN with x≦0.3, y≦1, and InN.
18. The semiconductor device according to claim 13, wherein the stack of layers comprises a light emitting layer stack provided with an n-type doped layer, a quantum well structure and a p-type doped layer in consecutive order, wherein the transmission layer constitutes the p-type doped layer or is present on top of the p-type doped layer.
19. The semiconductor device according to claim 18, further comprising a reflecting optical element, wherein the light emitting layer stack is present between the reflecting optical element and the textured surface of the transmission layer.
US12/980,225 2009-12-30 2010-12-28 Method of manufacturing a semiconductor device and semiconductor device Abandoned US20110156000A1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US12/980,225 US20110156000A1 (en) 2009-12-30 2010-12-28 Method of manufacturing a semiconductor device and semiconductor device
US14/579,889 US10461220B2 (en) 2009-12-30 2014-12-22 Method of manufacturing a semiconductor device and a semiconductor device

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
EP09180938.4 2009-12-30
EP09180938.4A EP2341558B1 (en) 2009-12-30 2009-12-30 Method of manufacturing a semiconductor device
US29309410P 2010-01-07 2010-01-07
US12/980,225 US20110156000A1 (en) 2009-12-30 2010-12-28 Method of manufacturing a semiconductor device and semiconductor device

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US14/579,889 Division US10461220B2 (en) 2009-12-30 2014-12-22 Method of manufacturing a semiconductor device and a semiconductor device

Publications (1)

Publication Number Publication Date
US20110156000A1 true US20110156000A1 (en) 2011-06-30

Family

ID=42135903

Family Applications (2)

Application Number Title Priority Date Filing Date
US12/980,225 Abandoned US20110156000A1 (en) 2009-12-30 2010-12-28 Method of manufacturing a semiconductor device and semiconductor device
US14/579,889 Active US10461220B2 (en) 2009-12-30 2014-12-22 Method of manufacturing a semiconductor device and a semiconductor device

Family Applications After (1)

Application Number Title Priority Date Filing Date
US14/579,889 Active US10461220B2 (en) 2009-12-30 2014-12-22 Method of manufacturing a semiconductor device and a semiconductor device

Country Status (3)

Country Link
US (2) US20110156000A1 (en)
EP (1) EP2341558B1 (en)
JP (1) JP5635394B2 (en)

Cited By (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120273821A1 (en) * 2011-04-27 2012-11-01 Sino-American Silicon Prodcuts Inc. Method for patterning an epitaxial substrate, a light emitting diode and a method for forming a light emitting diode
US20140126165A1 (en) * 2012-11-06 2014-05-08 Infineon Technologies Austria Ag Packaged Nano-Structured Component and Method of Making a Packaged Nano-Structured Component
US20140138613A1 (en) * 2012-11-16 2014-05-22 Sang-mook Kim Light emitting diode having heterogeneous protrusion structures
US20140191398A1 (en) * 2013-01-09 2014-07-10 Sensor Electronic Technology, Inc. Ultraviolet Reflective Rough Adhesive Contact
US20140231758A1 (en) * 2013-02-18 2014-08-21 Samsung Display Co., Ltd. Display device using photonic crystal
US8900800B2 (en) 2011-11-23 2014-12-02 Imec Method for producing a GaNLED device
US20150108494A1 (en) * 2013-10-22 2015-04-23 Epistar Corporation Light-emitting device and manufacturing method thereof
US9136422B1 (en) * 2012-01-19 2015-09-15 Alta Devices, Inc. Texturing a layer in an optoelectronic device for improved angle randomization of light
US20150318437A1 (en) * 2012-12-20 2015-11-05 Forschungszentrum Jülich GmbH Single-photon source suitable for mass production and production method
US20160087143A1 (en) * 2013-04-26 2016-03-24 Agency For Science, Technology And Research High speed surface plasmon coupled light emitting diodes
US9502594B2 (en) 2012-01-19 2016-11-22 Alta Devices, Inc. Thin-film semiconductor optoelectronic device with textured front and/or back surface prepared from template layer and etching
US9583650B1 (en) * 2016-01-15 2017-02-28 Korea Advanced Institute Of Science And Technology Integrated plasmonic circuit and method of manufacturing the same
US9691921B2 (en) 2009-10-14 2017-06-27 Alta Devices, Inc. Textured metallic back reflector
US9768329B1 (en) 2009-10-23 2017-09-19 Alta Devices, Inc. Multi-junction optoelectronic device
US9768357B2 (en) 2013-01-09 2017-09-19 Sensor Electronic Technology, Inc. Ultraviolet reflective rough adhesive contact
US20180301571A1 (en) * 2017-04-13 2018-10-18 International Business Machines Corporation Monolithically integrated high voltage photovoltaics with textured surface formed during the growth of wide bandgap materials
US10276749B2 (en) 2013-01-09 2019-04-30 Sensor Electronic Technology, Inc. Ultraviolet reflective rough adhesive contact
US10326033B2 (en) 2008-10-23 2019-06-18 Alta Devices, Inc. Photovoltaic device
US10615304B2 (en) 2010-10-13 2020-04-07 Alta Devices, Inc. Optoelectronic device with dielectric layer and method of manufacture
US11038080B2 (en) 2012-01-19 2021-06-15 Utica Leaseco, Llc Thin-film semiconductor optoelectronic device with textured front and/or back surface prepared from etching
US11201263B2 (en) 2017-09-07 2021-12-14 Enkris Semiconductor, Inc. Surface roughening method for light emitting device and light emitting device
US11271133B2 (en) 2009-10-23 2022-03-08 Utica Leaseco, Llc Multi-junction optoelectronic device with group IV semiconductor as a bottom junction
US11271128B2 (en) 2009-10-23 2022-03-08 Utica Leaseco, Llc Multi-junction optoelectronic device

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6268724B2 (en) * 2013-03-18 2018-01-31 沖電気工業株式会社 Nitride semiconductor texture structure, nitride semiconductor light emitting device, and texture structure forming method
JP6314558B2 (en) * 2014-03-12 2018-04-25 沖電気工業株式会社 Nitride semiconductor, nitride semiconductor texture structure forming method, and nitride semiconductor texture structure
KR102587958B1 (en) * 2017-02-03 2023-10-11 삼성전자주식회사 Meta optical device and method of fabricating the same
CN109802004B (en) * 2017-11-17 2021-01-15 中国科学院半导体研究所 Preparation method of optical trap structure of infrared detector
FR3082053B1 (en) * 2018-05-29 2020-09-11 Commissariat Energie Atomique PROCESS FOR MANUFACTURING A GAN-TYPE LIGHT-LUMINESCENT DIODE
JP7092051B2 (en) * 2019-01-18 2022-06-28 日本電信電話株式会社 How to make a field effect transistor
WO2022240716A2 (en) * 2021-05-10 2022-11-17 The Regents Of The University Of California Iii-nitride based devices grown on a thin template on thermally decomposed material
WO2024064881A1 (en) * 2022-09-22 2024-03-28 Rochester Institute Of Technology Method of in-situ texturing iii-v semiconductors using halomethane compounds

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040119082A1 (en) * 2002-12-19 2004-06-24 Kabushiki Kaisha Toshiba Nitride based semiconductor light-emitting device and method of manufacturing the same
US20050224816A1 (en) * 2004-03-30 2005-10-13 Kim Sun W Nitride based semiconductor having improved external quantum efficiency and fabrication method thereof
US20060094138A1 (en) * 2004-10-29 2006-05-04 South Epitaxy Corporation Method for manufacturing high efficiency light-emitting diodes
US7071494B2 (en) * 2002-12-11 2006-07-04 Lumileds Lighting U.S. Llc Light emitting device with enhanced optical scattering
US7244957B2 (en) * 2004-02-26 2007-07-17 Toyoda Gosei Co., Ltd. Group III nitride compound semiconductor light-emitting device and method for producing the same
US20080135856A1 (en) * 2006-11-03 2008-06-12 Lg Electronics Inc. Light emitting device having vertical topology and method for manufacturing the same
US20080142814A1 (en) * 2005-01-11 2008-06-19 Chen-Fu Chu Light emitting diodes (leds) with improved light extraction by roughening
US20090087994A1 (en) * 2007-09-28 2009-04-02 Samsung Electro-Mechanics Co., Ltd Method of forming fine patterns and manufacturing semiconductor light emitting device using the same

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7235819B2 (en) * 1991-03-18 2007-06-26 The Trustees Of Boston University Semiconductor device having group III nitride buffer layer and growth layers
EP0977280A3 (en) 1998-07-28 2008-11-26 Interuniversitair Micro-Elektronica Centrum Vzw Devices for emitting radiation with a high efficiency and a method for fabricating such devices
JP4277617B2 (en) * 2003-08-08 2009-06-10 日立電線株式会社 Manufacturing method of semiconductor light emitting device
GB2407702A (en) * 2003-10-28 2005-05-04 Sharp Kk A semiconductor light-emitting device
WO2005064666A1 (en) * 2003-12-09 2005-07-14 The Regents Of The University Of California Highly efficient gallium nitride based light emitting diodes via surface roughening
US7615398B2 (en) * 2006-11-28 2009-11-10 Luxtaltek Corporation Pyramidal photonic crystal light emitting device
EP2196796A1 (en) 2008-12-09 2010-06-16 Imec Single molecule optical spectroscopy in solid-state nanopores in a transmission-based approach
KR101134810B1 (en) * 2009-03-03 2012-04-13 엘지이노텍 주식회사 Light emitting device and method for fabricating the same

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7071494B2 (en) * 2002-12-11 2006-07-04 Lumileds Lighting U.S. Llc Light emitting device with enhanced optical scattering
US20040119082A1 (en) * 2002-12-19 2004-06-24 Kabushiki Kaisha Toshiba Nitride based semiconductor light-emitting device and method of manufacturing the same
US7244957B2 (en) * 2004-02-26 2007-07-17 Toyoda Gosei Co., Ltd. Group III nitride compound semiconductor light-emitting device and method for producing the same
US20050224816A1 (en) * 2004-03-30 2005-10-13 Kim Sun W Nitride based semiconductor having improved external quantum efficiency and fabrication method thereof
US20060094138A1 (en) * 2004-10-29 2006-05-04 South Epitaxy Corporation Method for manufacturing high efficiency light-emitting diodes
US20080142814A1 (en) * 2005-01-11 2008-06-19 Chen-Fu Chu Light emitting diodes (leds) with improved light extraction by roughening
US20080135856A1 (en) * 2006-11-03 2008-06-12 Lg Electronics Inc. Light emitting device having vertical topology and method for manufacturing the same
US20090087994A1 (en) * 2007-09-28 2009-04-02 Samsung Electro-Mechanics Co., Ltd Method of forming fine patterns and manufacturing semiconductor light emitting device using the same

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
Christine C Mitchell, Michael E Coltrin, Jung Han, Mass transport in the epitaxial lateral overgrowth of gallium nitride, Journal of Crystal Growth, Volume 222, Issues 1-2, January 2001, Pages 144-153, ISSN 0022-0248, http://dx.doi.org/10.1016/S0022-0248(00)00874-5. (http://www.sciencedirect.com/science/article/pii/S0022024800008745) *
D.D. Koleske, M.E. Coltrin, K.C. Cross, C.C. Mitchell, A.A. Allerman, Understanding GaN nucleation layer evolution on sapphire, Journal of Crystal Growth, Volume 273, Issues 1-2, 17 December 2004, Pages 86-99, ISSN 0022-0248, http://dx.doi.org/10.1016/j.jcrysgro.2004.08.126. (http://www.sciencedirect.com/science/article/pii/S0022024804009923) *

Cited By (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10326033B2 (en) 2008-10-23 2019-06-18 Alta Devices, Inc. Photovoltaic device
US10505058B2 (en) 2008-10-23 2019-12-10 Alta Devices, Inc. Photovoltaic device
US9691921B2 (en) 2009-10-14 2017-06-27 Alta Devices, Inc. Textured metallic back reflector
US9768329B1 (en) 2009-10-23 2017-09-19 Alta Devices, Inc. Multi-junction optoelectronic device
US11271128B2 (en) 2009-10-23 2022-03-08 Utica Leaseco, Llc Multi-junction optoelectronic device
US11271133B2 (en) 2009-10-23 2022-03-08 Utica Leaseco, Llc Multi-junction optoelectronic device with group IV semiconductor as a bottom junction
US10615304B2 (en) 2010-10-13 2020-04-07 Alta Devices, Inc. Optoelectronic device with dielectric layer and method of manufacture
US20120273821A1 (en) * 2011-04-27 2012-11-01 Sino-American Silicon Prodcuts Inc. Method for patterning an epitaxial substrate, a light emitting diode and a method for forming a light emitting diode
US8742442B2 (en) * 2011-04-27 2014-06-03 Sino-American Silicon Products Inc. Method for patterning an epitaxial substrate, a light emitting diode and a method for forming a light emitting diode
US8900800B2 (en) 2011-11-23 2014-12-02 Imec Method for producing a GaNLED device
US9136422B1 (en) * 2012-01-19 2015-09-15 Alta Devices, Inc. Texturing a layer in an optoelectronic device for improved angle randomization of light
US10008628B2 (en) 2012-01-19 2018-06-26 Alta Devices, Inc. Thin-film semiconductor optoelectronic device with textured front and/or back surface prepared from template layer and etching
US9537025B1 (en) 2012-01-19 2017-01-03 Alta Devices, Inc. Texturing a layer in an optoelectronic device for improved angle randomization of light
US11038080B2 (en) 2012-01-19 2021-06-15 Utica Leaseco, Llc Thin-film semiconductor optoelectronic device with textured front and/or back surface prepared from etching
US11942566B2 (en) 2012-01-19 2024-03-26 Utica Leaseco, Llc Thin-film semiconductor optoelectronic device with textured front and/or back surface prepared from etching
US9502594B2 (en) 2012-01-19 2016-11-22 Alta Devices, Inc. Thin-film semiconductor optoelectronic device with textured front and/or back surface prepared from template layer and etching
US9249014B2 (en) * 2012-11-06 2016-02-02 Infineon Technologies Austria Ag Packaged nano-structured component and method of making a packaged nano-structured component
US20140126165A1 (en) * 2012-11-06 2014-05-08 Infineon Technologies Austria Ag Packaged Nano-Structured Component and Method of Making a Packaged Nano-Structured Component
US20140138613A1 (en) * 2012-11-16 2014-05-22 Sang-mook Kim Light emitting diode having heterogeneous protrusion structures
US9000414B2 (en) * 2012-11-16 2015-04-07 Korea Photonics Technology Institute Light emitting diode having heterogeneous protrusion structures
US20150318437A1 (en) * 2012-12-20 2015-11-05 Forschungszentrum Jülich GmbH Single-photon source suitable for mass production and production method
US10074771B2 (en) * 2012-12-20 2018-09-11 Forschungszentrum Juelich Gmbh Single-photon source suitable for mass production and production method
US9287449B2 (en) * 2013-01-09 2016-03-15 Sensor Electronic Technology, Inc. Ultraviolet reflective rough adhesive contact
US20140191398A1 (en) * 2013-01-09 2014-07-10 Sensor Electronic Technology, Inc. Ultraviolet Reflective Rough Adhesive Contact
US10276749B2 (en) 2013-01-09 2019-04-30 Sensor Electronic Technology, Inc. Ultraviolet reflective rough adhesive contact
US9768357B2 (en) 2013-01-09 2017-09-19 Sensor Electronic Technology, Inc. Ultraviolet reflective rough adhesive contact
US9412974B2 (en) * 2013-02-18 2016-08-09 Samsung Display Co., Ltd. Display device using photonic crystal
US20140231758A1 (en) * 2013-02-18 2014-08-21 Samsung Display Co., Ltd. Display device using photonic crystal
US9768347B2 (en) * 2013-04-26 2017-09-19 Agency For Science, Technology And Research High speed surface plasmon coupled light emitting diodes
US20160087143A1 (en) * 2013-04-26 2016-03-24 Agency For Science, Technology And Research High speed surface plasmon coupled light emitting diodes
US20200006595A1 (en) * 2013-10-22 2020-01-02 Epistar Corporation Light-emitting device and manufacturing method thereof
US10453995B2 (en) * 2013-10-22 2019-10-22 Epistar Corporation Light-emitting device and manufacturing method thereof
US11005007B2 (en) * 2013-10-22 2021-05-11 Epistar Corporation Light-emitting device and manufacturing method thereof
US20150108494A1 (en) * 2013-10-22 2015-04-23 Epistar Corporation Light-emitting device and manufacturing method thereof
US9847450B2 (en) * 2013-10-22 2017-12-19 Epistar Corporation Light-emitting device and manufacturing method thereof
US9583650B1 (en) * 2016-01-15 2017-02-28 Korea Advanced Institute Of Science And Technology Integrated plasmonic circuit and method of manufacturing the same
US10957806B2 (en) * 2017-04-13 2021-03-23 International Business Machines Corporation Monolithically integrated high voltage photovoltaics with textured surface formed during the growth of wide bandgap materials
US20180301571A1 (en) * 2017-04-13 2018-10-18 International Business Machines Corporation Monolithically integrated high voltage photovoltaics with textured surface formed during the growth of wide bandgap materials
US11201263B2 (en) 2017-09-07 2021-12-14 Enkris Semiconductor, Inc. Surface roughening method for light emitting device and light emitting device

Also Published As

Publication number Publication date
EP2341558A1 (en) 2011-07-06
US10461220B2 (en) 2019-10-29
US20150179883A1 (en) 2015-06-25
JP2011139067A (en) 2011-07-14
EP2341558B1 (en) 2019-04-24
JP5635394B2 (en) 2014-12-03

Similar Documents

Publication Publication Date Title
US10461220B2 (en) Method of manufacturing a semiconductor device and a semiconductor device
EP3577730B1 (en) Lasers or leds based on nanowires grown on graphene type substrates
JP5145353B2 (en) Nanostructured LED array with collimating reflector
TWI419352B (en) Grown photonic crystals in semiconductor light emitting devices
US8816374B2 (en) Light emitting diode with graphene layer
US20100295088A1 (en) Textured-surface light emitting diode and method of manufacture
US20120153254A1 (en) Inverted Light Emitting Diode Having Plasmonically Enhanced Emission
US8823044B2 (en) Light emitting diode with graphene layer
CN102064471B (en) GaN-based semiconductor laser and manufacturing method thereof
Zhao et al. Progress of GaN‐Based Optoelectronic Devices Integrated with Optical Resonances
Sung et al. Physics and device structures of highly efficient silicon quantum dots based silicon nitride light-emitting diodes
US20140306256A1 (en) Light emitting diode
US9236538B2 (en) Method for making light emitting diode
US8796716B2 (en) Light emitting diode
Cheng et al. Enhanced light collection of GaN light emitting devices by redirecting the lateral emission using nanorod reflectors
US8790940B2 (en) Method for making light emitting diode
US11769858B2 (en) Light emitting device and method of making the same
KR101613557B1 (en) nitride semiconductor device and method for fabricating the same
Jakhar Enhancing Light Extraction Efficiency Of GaN/InGaN Light Emitting Diode By Using Nano Structures…
Gˆırgel Development of InGaN/GaN core-shell light emitters
KR20110096990A (en) Method for forming pattern of semiconductor device
Ben Slimane III-Nitride Micro and Nano Structures for Solid State Lightning

Legal Events

Date Code Title Description
STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION